arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <mach/common.h>
  25 #include <mach/control.h>
  26 #include <mach/cpu.h>
  27
  28 static struct omap_chip_id omap_chip;
  29 static unsigned int omap_revision;
  30
  31 u32 omap3_features;
  32
  33 unsigned int omap_rev(void)
  34 {
  35         return omap_revision;
  36 }
  37 EXPORT_SYMBOL(omap_rev);
  38
  39 /**
  40  * omap_chip_is - test whether currently running OMAP matches a chip type
  41  * @oc: omap_chip_t to test against
  42  *
  43  * Test whether the currently-running OMAP chip matches the supplied
  44  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  45  */
  46 int omap_chip_is(struct omap_chip_id oci)
  47 {
  48         return (oci.oc & omap_chip.oc) ? 1 : 0;
  49 }
  50 EXPORT_SYMBOL(omap_chip_is);
  51
  52 int omap_type(void)
  53 {
  54         u32 val = 0;
  55
  56         if (cpu_is_omap24xx())
  57                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  58         else if (cpu_is_omap34xx())
  59                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  60         else {
  61                 pr_err("Cannot detect omap type!\n");
  62                 goto out;
  63         }
  64
  65         val &= OMAP2_DEVICETYPE_MASK;
  66         val >>= 8;
  67
  68 out:
  69         return val;
  70 }
  71 EXPORT_SYMBOL(omap_type);
  72
  73
  74 /*----------------------------------------------------------------------------*/
  75
  76 #define OMAP_TAP_IDCODE         0x0204
  77 #define OMAP_TAP_DIE_ID_0       0x0218
  78 #define OMAP_TAP_DIE_ID_1       0x021C
  79 #define OMAP_TAP_DIE_ID_2       0x0220
  80 #define OMAP_TAP_DIE_ID_3       0x0224
  81
  82 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  83
  84 struct omap_id {
  85         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  86         u8      dev;            /* Device type from production_id reg */
  87         u32     type;           /* Combined type id copied to omap_revision */
  88 };
  89
  90 /* Register values to detect the OMAP version */
  91 static struct omap_id omap_ids[] __initdata = {
  92         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  93         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  94         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  95         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  96         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  97         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
  98 };
  99
 100 static void __iomem *tap_base;
 101 static u16 tap_prod_id;
 102
 103 void __init omap24xx_check_revision(void)
 104 {
 105         int i, j;
 106         u32 idcode, prod_id;
 107         u16 hawkeye;
 108         u8  dev_type, rev;
 109
 110         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 111         prod_id = read_tap_reg(tap_prod_id);
 112         hawkeye = (idcode >> 12) & 0xffff;
 113         rev = (idcode >> 28) & 0x0f;
 114         dev_type = (prod_id >> 16) & 0x0f;
 115
 116         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 117                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 118         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
 119                  read_tap_reg(OMAP_TAP_DIE_ID_0));
 120         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 121                  read_tap_reg(OMAP_TAP_DIE_ID_1),
 122                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 123         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 124                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 125         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 126                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 127         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 128                  prod_id, dev_type);
 129
 130         /* Check hawkeye ids */
 131         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 132                 if (hawkeye == omap_ids[i].hawkeye)
 133                         break;
 134         }
 135
 136         if (i == ARRAY_SIZE(omap_ids)) {
 137                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 138                 return;
 139         }
 140
 141         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 142                 if (dev_type == omap_ids[j].dev)
 143                         break;
 144         }
 145
 146         if (j == ARRAY_SIZE(omap_ids)) {
 147                 printk(KERN_ERR "Unknown OMAP device type. "
 148                                 "Handling it as OMAP%04x\n",
 149                                 omap_ids[i].type >> 16);
 150                 j = i;
 151         }
 152
 153         pr_info("OMAP%04x", omap_rev() >> 16);
 154         if ((omap_rev() >> 8) & 0x0f)
 155                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 156         pr_info("\n");
 157 }
 158
 159 #define OMAP3_CHECK_FEATURE(status,feat)                                \
 160         if (((status & OMAP3_ ##feat## _MASK)                           \
 161                 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) {   \
 162                 omap3_features |= OMAP3_HAS_ ##feat;                    \
 163         }
 164
 165 void __init omap3_check_features(void)
 166 {
 167         u32 status;
 168
 169         omap3_features = 0;
 170
 171         status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
 172
 173         OMAP3_CHECK_FEATURE(status, L2CACHE);
 174         OMAP3_CHECK_FEATURE(status, IVA);
 175         OMAP3_CHECK_FEATURE(status, SGX);
 176         OMAP3_CHECK_FEATURE(status, NEON);
 177         OMAP3_CHECK_FEATURE(status, ISP);
 178
 179         /*
 180          * TODO: Get additional info (where applicable)
 181          *       e.g. Size of L2 cache.
 182          */
 183 }
 184
 185 void __init omap3_check_revision(void)
 186 {
 187         u32 cpuid, idcode;
 188         u16 hawkeye;
 189         u8 rev;
 190
 191         /*
 192          * We cannot access revision registers on ES1.0.
 193          * If the processor type is Cortex-A8 and the revision is 0x0
 194          * it means its Cortex r0p0 which is 3430 ES1.0.
 195          */
 196         cpuid = read_cpuid(CPUID_ID);
 197         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 198                 omap_revision = OMAP3430_REV_ES1_0;
 199                 return;
 200         }
 201
 202         /*
 203          * Detection for 34xx ES2.0 and above can be done with just
 204          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 205          * Note that rev does not map directly to our defined processor
 206          * revision numbers as ES1.0 uses value 0.
 207          */
 208         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 209         hawkeye = (idcode >> 12) & 0xffff;
 210         rev = (idcode >> 28) & 0xff;
 211
 212         if (hawkeye == 0xb7ae) {
 213                 switch (rev) {
 214                 case 0: /* Take care of early samples */
 215                 case 1:
 216                         omap_revision = OMAP3430_REV_ES2_0;
 217                         break;
 218                 case 2:
 219                         omap_revision = OMAP3430_REV_ES2_1;
 220                         break;
 221                 case 3:
 222                         omap_revision = OMAP3430_REV_ES3_0;
 223                         break;
 224                 case 4:
 225                         omap_revision = OMAP3430_REV_ES3_1;
 226                         break;
 227                 default:
 228                         /* Use the latest known revision as default */
 229                         omap_revision = OMAP3430_REV_ES3_1;
 230                 }
 231         }
 232 }
 233
 234 #define OMAP3_SHOW_FEATURE(feat)                \
 235         if (omap3_has_ ##feat()) {              \
 236                 pr_info (" - "#feat" : Y");     \
 237         } else {                                \
 238                 pr_info (" - "#feat" : N");     \
 239         }
 240
 241 void __init omap3_cpuinfo(void)
 242 {
 243         u8 rev = GET_OMAP_REVISION();
 244         char cpu_name[16], cpu_rev[16];
 245
 246         /* OMAP3430 and OMAP3530 are assumed to be same.
 247          *
 248          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 249          * on available features. Upon detection, update the CPU id
 250          * and CPU class bits.
 251          */
 252         if (omap3_has_iva() && omap3_has_sgx()) {
 253                 strcpy(cpu_name, "3430/3530");
 254         }
 255         else if (omap3_has_sgx()) {
 256                 omap_revision = OMAP3525_REV(rev);
 257                 strcpy(cpu_name, "3525");
 258         }
 259         else if (omap3_has_iva()) {
 260                 omap_revision = OMAP3515_REV(rev);
 261                 strcpy(cpu_name, "3515");
 262         }
 263         else {
 264                 omap_revision = OMAP3503_REV(rev);
 265                 strcpy(cpu_name, "3503");
 266         }
 267
 268         switch (rev) {
 269         case OMAP_REVBITS_00:
 270                 strcpy(cpu_rev, "1.0");
 271                 break;
 272         case OMAP_REVBITS_10:
 273                 strcpy(cpu_rev, "2.0");
 274                 break;
 275         case OMAP_REVBITS_20:
 276                 strcpy(cpu_rev, "2.1");
 277                 break;
 278         case OMAP_REVBITS_30:
 279                 strcpy(cpu_rev, "3.0");
 280                 break;
 281         case OMAP_REVBITS_40:
 282                 strcpy(cpu_rev, "3.1");
 283                 break;
 284         default:
 285                 /* Use the latest known revision as default */
 286                 strcpy(cpu_rev, "3.1");
 287         }
 288
 289         /*
 290          * Print verbose information
 291          */
 292         pr_info("OMAP%s ES%s\n", cpu_name, cpu_rev);
 293
 294         OMAP3_SHOW_FEATURE(l2cache);
 295         OMAP3_SHOW_FEATURE(iva);
 296         OMAP3_SHOW_FEATURE(sgx);
 297         OMAP3_SHOW_FEATURE(neon);
 298         OMAP3_SHOW_FEATURE(isp);
 299 }
 300
 301 /*
 302  * Try to detect the exact revision of the omap we're running on
 303  */
 304 void __init omap2_check_revision(void)
 305 {
 306         /*
 307          * At this point we have an idea about the processor revision set
 308          * earlier with omap2_set_globals_tap().
 309          */
 310         if (cpu_is_omap24xx())
 311                 omap24xx_check_revision();
 312         else if (cpu_is_omap34xx()) {
 313                 omap3_check_features();
 314                 omap3_check_revision();
 315                 omap3_cpuinfo();
 316         }
 317         else if (cpu_is_omap44xx()) {
 318                 printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
 319                 return;
 320         } else
 321                 pr_err("OMAP revision unknown, please fix!\n");
 322
 323         /*
 324          * OK, now we know the exact revision. Initialize omap_chip bits
 325          * for powerdowmain and clockdomain code.
 326          */
 327         if (cpu_is_omap243x()) {
 328                 /* Currently only supports 2430ES2.1 and 2430-all */
 329                 omap_chip.oc |= CHIP_IS_OMAP2430;
 330         } else if (cpu_is_omap242x()) {
 331                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 332                 omap_chip.oc |= CHIP_IS_OMAP2420;
 333         } else if (cpu_is_omap343x()) {
 334                 omap_chip.oc = CHIP_IS_OMAP3430;
 335                 if (omap_rev() == OMAP3430_REV_ES1_0)
 336                         omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 337                 else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
 338                          omap_rev() <= OMAP3430_REV_ES2_1)
 339                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 340                 else if (omap_rev() == OMAP3430_REV_ES3_0)
 341                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 342                 else if (omap_rev() == OMAP3430_REV_ES3_1)
 343                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 344         } else {
 345                 pr_err("Uninitialized omap_chip, please fix!\n");
 346         }
 347 }
 348
 349 /*
 350  * Set up things for map_io and processor detection later on. Gets called
 351  * pretty much first thing from board init. For multi-omap, this gets
 352  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 353  * detect the exact revision later on in omap2_detect_revision() once map_io
 354  * is done.
 355  */
 356 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 357 {
 358         omap_revision = omap2_globals->class;
 359         tap_base = omap2_globals->tap;
 360
 361         if (cpu_is_omap34xx())
 362                 tap_prod_id = 0x0210;
 363         else
 364                 tap_prod_id = 0x0208;
 365 }