PRCM: 34XX: Fix wrong shift value used in dpll4_m4x2_ck enable bit
[linux-ginger.git] / drivers / char / agp / generic.c
blob564daaa6c7d0ef7bf98e4701e2b9b1b1253a2b34
1 /*
2 * AGPGART driver.
3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2005 Dave Jones.
5 * Copyright (C) 1999 Jeff Hartmann.
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * TODO:
28 * - Allocate more than order 0 pages to avoid too much linear map splitting.
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/pagemap.h>
34 #include <linux/miscdevice.h>
35 #include <linux/pm.h>
36 #include <linux/agp_backend.h>
37 #include <linux/vmalloc.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/mm.h>
40 #include <linux/sched.h>
41 #include <asm/io.h>
42 #include <asm/cacheflush.h>
43 #include <asm/pgtable.h>
44 #include "agp.h"
46 __u32 *agp_gatt_table;
47 int agp_memory_reserved;
50 * Needed by the Nforce GART driver for the time being. Would be
51 * nice to do this some other way instead of needing this export.
53 EXPORT_SYMBOL_GPL(agp_memory_reserved);
56 * Generic routines for handling agp_memory structures -
57 * They use the basic page allocation routines to do the brunt of the work.
60 void agp_free_key(int key)
62 if (key < 0)
63 return;
65 if (key < MAXKEY)
66 clear_bit(key, agp_bridge->key_list);
68 EXPORT_SYMBOL(agp_free_key);
71 static int agp_get_key(void)
73 int bit;
75 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
76 if (bit < MAXKEY) {
77 set_bit(bit, agp_bridge->key_list);
78 return bit;
80 return -1;
83 void agp_flush_chipset(struct agp_bridge_data *bridge)
85 if (bridge->driver->chipset_flush)
86 bridge->driver->chipset_flush(bridge);
88 EXPORT_SYMBOL(agp_flush_chipset);
91 * Use kmalloc if possible for the page list. Otherwise fall back to
92 * vmalloc. This speeds things up and also saves memory for small AGP
93 * regions.
96 void agp_alloc_page_array(size_t size, struct agp_memory *mem)
98 mem->memory = NULL;
99 mem->vmalloc_flag = false;
101 if (size <= 2*PAGE_SIZE)
102 mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY);
103 if (mem->memory == NULL) {
104 mem->memory = vmalloc(size);
105 mem->vmalloc_flag = true;
108 EXPORT_SYMBOL(agp_alloc_page_array);
110 void agp_free_page_array(struct agp_memory *mem)
112 if (mem->vmalloc_flag) {
113 vfree(mem->memory);
114 } else {
115 kfree(mem->memory);
118 EXPORT_SYMBOL(agp_free_page_array);
121 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
123 struct agp_memory *new;
124 unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
126 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
127 if (new == NULL)
128 return NULL;
130 new->key = agp_get_key();
132 if (new->key < 0) {
133 kfree(new);
134 return NULL;
137 agp_alloc_page_array(alloc_size, new);
139 if (new->memory == NULL) {
140 agp_free_key(new->key);
141 kfree(new);
142 return NULL;
144 new->num_scratch_pages = 0;
145 return new;
148 struct agp_memory *agp_create_memory(int scratch_pages)
150 struct agp_memory *new;
152 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
153 if (new == NULL)
154 return NULL;
156 new->key = agp_get_key();
158 if (new->key < 0) {
159 kfree(new);
160 return NULL;
163 agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
165 if (new->memory == NULL) {
166 agp_free_key(new->key);
167 kfree(new);
168 return NULL;
170 new->num_scratch_pages = scratch_pages;
171 new->type = AGP_NORMAL_MEMORY;
172 return new;
174 EXPORT_SYMBOL(agp_create_memory);
177 * agp_free_memory - free memory associated with an agp_memory pointer.
179 * @curr: agp_memory pointer to be freed.
181 * It is the only function that can be called when the backend is not owned
182 * by the caller. (So it can free memory on client death.)
184 void agp_free_memory(struct agp_memory *curr)
186 size_t i;
188 if (curr == NULL)
189 return;
191 if (curr->is_bound)
192 agp_unbind_memory(curr);
194 if (curr->type >= AGP_USER_TYPES) {
195 agp_generic_free_by_type(curr);
196 return;
199 if (curr->type != 0) {
200 curr->bridge->driver->free_by_type(curr);
201 return;
203 if (curr->page_count != 0) {
204 for (i = 0; i < curr->page_count; i++) {
205 curr->memory[i] = (unsigned long)gart_to_virt(curr->memory[i]);
206 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
207 AGP_PAGE_DESTROY_UNMAP);
209 for (i = 0; i < curr->page_count; i++) {
210 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
211 AGP_PAGE_DESTROY_FREE);
214 agp_free_key(curr->key);
215 agp_free_page_array(curr);
216 kfree(curr);
218 EXPORT_SYMBOL(agp_free_memory);
220 #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
223 * agp_allocate_memory - allocate a group of pages of a certain type.
225 * @page_count: size_t argument of the number of pages
226 * @type: u32 argument of the type of memory to be allocated.
228 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
229 * maps to physical ram. Any other type is device dependent.
231 * It returns NULL whenever memory is unavailable.
233 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
234 size_t page_count, u32 type)
236 int scratch_pages;
237 struct agp_memory *new;
238 size_t i;
240 if (!bridge)
241 return NULL;
243 if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp)
244 return NULL;
246 if (type >= AGP_USER_TYPES) {
247 new = agp_generic_alloc_user(page_count, type);
248 if (new)
249 new->bridge = bridge;
250 return new;
253 if (type != 0) {
254 new = bridge->driver->alloc_by_type(page_count, type);
255 if (new)
256 new->bridge = bridge;
257 return new;
260 scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
262 new = agp_create_memory(scratch_pages);
264 if (new == NULL)
265 return NULL;
267 for (i = 0; i < page_count; i++) {
268 void *addr = bridge->driver->agp_alloc_page(bridge);
270 if (addr == NULL) {
271 agp_free_memory(new);
272 return NULL;
274 new->memory[i] = virt_to_gart(addr);
275 new->page_count++;
277 new->bridge = bridge;
279 return new;
281 EXPORT_SYMBOL(agp_allocate_memory);
284 /* End - Generic routines for handling agp_memory structures */
287 static int agp_return_size(void)
289 int current_size;
290 void *temp;
292 temp = agp_bridge->current_size;
294 switch (agp_bridge->driver->size_type) {
295 case U8_APER_SIZE:
296 current_size = A_SIZE_8(temp)->size;
297 break;
298 case U16_APER_SIZE:
299 current_size = A_SIZE_16(temp)->size;
300 break;
301 case U32_APER_SIZE:
302 current_size = A_SIZE_32(temp)->size;
303 break;
304 case LVL2_APER_SIZE:
305 current_size = A_SIZE_LVL2(temp)->size;
306 break;
307 case FIXED_APER_SIZE:
308 current_size = A_SIZE_FIX(temp)->size;
309 break;
310 default:
311 current_size = 0;
312 break;
315 current_size -= (agp_memory_reserved / (1024*1024));
316 if (current_size <0)
317 current_size = 0;
318 return current_size;
322 int agp_num_entries(void)
324 int num_entries;
325 void *temp;
327 temp = agp_bridge->current_size;
329 switch (agp_bridge->driver->size_type) {
330 case U8_APER_SIZE:
331 num_entries = A_SIZE_8(temp)->num_entries;
332 break;
333 case U16_APER_SIZE:
334 num_entries = A_SIZE_16(temp)->num_entries;
335 break;
336 case U32_APER_SIZE:
337 num_entries = A_SIZE_32(temp)->num_entries;
338 break;
339 case LVL2_APER_SIZE:
340 num_entries = A_SIZE_LVL2(temp)->num_entries;
341 break;
342 case FIXED_APER_SIZE:
343 num_entries = A_SIZE_FIX(temp)->num_entries;
344 break;
345 default:
346 num_entries = 0;
347 break;
350 num_entries -= agp_memory_reserved>>PAGE_SHIFT;
351 if (num_entries<0)
352 num_entries = 0;
353 return num_entries;
355 EXPORT_SYMBOL_GPL(agp_num_entries);
359 * agp_copy_info - copy bridge state information
361 * @info: agp_kern_info pointer. The caller should insure that this pointer is valid.
363 * This function copies information about the agp bridge device and the state of
364 * the agp backend into an agp_kern_info pointer.
366 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
368 memset(info, 0, sizeof(struct agp_kern_info));
369 if (!bridge) {
370 info->chipset = NOT_SUPPORTED;
371 return -EIO;
374 info->version.major = bridge->version->major;
375 info->version.minor = bridge->version->minor;
376 info->chipset = SUPPORTED;
377 info->device = bridge->dev;
378 if (bridge->mode & AGPSTAT_MODE_3_0)
379 info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
380 else
381 info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
382 info->aper_base = bridge->gart_bus_addr;
383 info->aper_size = agp_return_size();
384 info->max_memory = bridge->max_memory_agp;
385 info->current_memory = atomic_read(&bridge->current_memory_agp);
386 info->cant_use_aperture = bridge->driver->cant_use_aperture;
387 info->vm_ops = bridge->vm_ops;
388 info->page_mask = ~0UL;
389 return 0;
391 EXPORT_SYMBOL(agp_copy_info);
393 /* End - Routine to copy over information structure */
396 * Routines for handling swapping of agp_memory into the GATT -
397 * These routines take agp_memory and insert them into the GATT.
398 * They call device specific routines to actually write to the GATT.
402 * agp_bind_memory - Bind an agp_memory structure into the GATT.
404 * @curr: agp_memory pointer
405 * @pg_start: an offset into the graphics aperture translation table
407 * It returns -EINVAL if the pointer == NULL.
408 * It returns -EBUSY if the area of the table requested is already in use.
410 int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
412 int ret_val;
414 if (curr == NULL)
415 return -EINVAL;
417 if (curr->is_bound) {
418 printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
419 return -EINVAL;
421 if (!curr->is_flushed) {
422 curr->bridge->driver->cache_flush();
423 curr->is_flushed = true;
425 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
427 if (ret_val != 0)
428 return ret_val;
430 curr->is_bound = true;
431 curr->pg_start = pg_start;
432 return 0;
434 EXPORT_SYMBOL(agp_bind_memory);
438 * agp_unbind_memory - Removes an agp_memory structure from the GATT
440 * @curr: agp_memory pointer to be removed from the GATT.
442 * It returns -EINVAL if this piece of agp_memory is not currently bound to
443 * the graphics aperture translation table or if the agp_memory pointer == NULL
445 int agp_unbind_memory(struct agp_memory *curr)
447 int ret_val;
449 if (curr == NULL)
450 return -EINVAL;
452 if (!curr->is_bound) {
453 printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
454 return -EINVAL;
457 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
459 if (ret_val != 0)
460 return ret_val;
462 curr->is_bound = false;
463 curr->pg_start = 0;
464 return 0;
466 EXPORT_SYMBOL(agp_unbind_memory);
468 /* End - Routines for handling swapping of agp_memory into the GATT */
471 /* Generic Agp routines - Start */
472 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
474 u32 tmp;
476 if (*requested_mode & AGP2_RESERVED_MASK) {
477 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
478 *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
479 *requested_mode &= ~AGP2_RESERVED_MASK;
483 * Some dumb bridges are programmed to disobey the AGP2 spec.
484 * This is likely a BIOS misprogramming rather than poweron default, or
485 * it would be a lot more common.
486 * https://bugs.freedesktop.org/show_bug.cgi?id=8816
487 * AGPv2 spec 6.1.9 states:
488 * The RATE field indicates the data transfer rates supported by this
489 * device. A.G.P. devices must report all that apply.
490 * Fix them up as best we can.
492 switch (*bridge_agpstat & 7) {
493 case 4:
494 *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
495 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate"
496 "Fixing up support for x2 & x1\n");
497 break;
498 case 2:
499 *bridge_agpstat |= AGPSTAT2_1X;
500 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate"
501 "Fixing up support for x1\n");
502 break;
503 default:
504 break;
507 /* Check the speed bits make sense. Only one should be set. */
508 tmp = *requested_mode & 7;
509 switch (tmp) {
510 case 0:
511 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
512 *requested_mode |= AGPSTAT2_1X;
513 break;
514 case 1:
515 case 2:
516 break;
517 case 3:
518 *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */
519 break;
520 case 4:
521 break;
522 case 5:
523 case 6:
524 case 7:
525 *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
526 break;
529 /* disable SBA if it's not supported */
530 if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
531 *bridge_agpstat &= ~AGPSTAT_SBA;
533 /* Set rate */
534 if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
535 *bridge_agpstat &= ~AGPSTAT2_4X;
537 if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
538 *bridge_agpstat &= ~AGPSTAT2_2X;
540 if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
541 *bridge_agpstat &= ~AGPSTAT2_1X;
543 /* Now we know what mode it should be, clear out the unwanted bits. */
544 if (*bridge_agpstat & AGPSTAT2_4X)
545 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */
547 if (*bridge_agpstat & AGPSTAT2_2X)
548 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */
550 if (*bridge_agpstat & AGPSTAT2_1X)
551 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */
553 /* Apply any errata. */
554 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
555 *bridge_agpstat &= ~AGPSTAT_FW;
557 if (agp_bridge->flags & AGP_ERRATA_SBA)
558 *bridge_agpstat &= ~AGPSTAT_SBA;
560 if (agp_bridge->flags & AGP_ERRATA_1X) {
561 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
562 *bridge_agpstat |= AGPSTAT2_1X;
565 /* If we've dropped down to 1X, disable fast writes. */
566 if (*bridge_agpstat & AGPSTAT2_1X)
567 *bridge_agpstat &= ~AGPSTAT_FW;
571 * requested_mode = Mode requested by (typically) X.
572 * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
573 * vga_agpstat = PCI_AGP_STATUS from graphic card.
575 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
577 u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
578 u32 tmp;
580 if (*requested_mode & AGP3_RESERVED_MASK) {
581 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
582 *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
583 *requested_mode &= ~AGP3_RESERVED_MASK;
586 /* Check the speed bits make sense. */
587 tmp = *requested_mode & 7;
588 if (tmp == 0) {
589 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
590 *requested_mode |= AGPSTAT3_4X;
592 if (tmp >= 3) {
593 printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
594 *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
597 /* ARQSZ - Set the value to the maximum one.
598 * Don't allow the mode register to override values. */
599 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
600 max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
602 /* Calibration cycle.
603 * Don't allow the mode register to override values. */
604 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
605 min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
607 /* SBA *must* be supported for AGP v3 */
608 *bridge_agpstat |= AGPSTAT_SBA;
611 * Set speed.
612 * Check for invalid speeds. This can happen when applications
613 * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
615 if (*requested_mode & AGPSTAT_MODE_3_0) {
617 * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
618 * have been passed a 3.0 mode, but with 2.x speed bits set.
619 * AGP2.x 4x -> AGP3.0 4x.
621 if (*requested_mode & AGPSTAT2_4X) {
622 printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
623 current->comm, *requested_mode);
624 *requested_mode &= ~AGPSTAT2_4X;
625 *requested_mode |= AGPSTAT3_4X;
627 } else {
629 * The caller doesn't know what they are doing. We are in 3.0 mode,
630 * but have been passed an AGP 2.x mode.
631 * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
633 printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
634 current->comm, *requested_mode);
635 *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
636 *requested_mode |= AGPSTAT3_4X;
639 if (*requested_mode & AGPSTAT3_8X) {
640 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
641 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
642 *bridge_agpstat |= AGPSTAT3_4X;
643 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
644 return;
646 if (!(*vga_agpstat & AGPSTAT3_8X)) {
647 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
648 *bridge_agpstat |= AGPSTAT3_4X;
649 printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
650 return;
652 /* All set, bridge & device can do AGP x8*/
653 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
654 goto done;
656 } else if (*requested_mode & AGPSTAT3_4X) {
657 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
658 *bridge_agpstat |= AGPSTAT3_4X;
659 goto done;
661 } else {
664 * If we didn't specify an AGP mode, we see if both
665 * the graphics card, and the bridge can do x8, and use if so.
666 * If not, we fall back to x4 mode.
668 if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
669 printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
670 "supported by bridge & card (x8).\n");
671 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
672 *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
673 } else {
674 printk(KERN_INFO PFX "Fell back to AGPx4 mode because");
675 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
676 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
677 *bridge_agpstat, origbridge);
678 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
679 *bridge_agpstat |= AGPSTAT3_4X;
681 if (!(*vga_agpstat & AGPSTAT3_8X)) {
682 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
683 *vga_agpstat, origvga);
684 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
685 *vga_agpstat |= AGPSTAT3_4X;
690 done:
691 /* Apply any errata. */
692 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
693 *bridge_agpstat &= ~AGPSTAT_FW;
695 if (agp_bridge->flags & AGP_ERRATA_SBA)
696 *bridge_agpstat &= ~AGPSTAT_SBA;
698 if (agp_bridge->flags & AGP_ERRATA_1X) {
699 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
700 *bridge_agpstat |= AGPSTAT2_1X;
706 * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
707 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
708 * @requested_mode: requested agp_stat from userspace (Typically from X)
709 * @bridge_agpstat: current agp_stat from AGP bridge.
711 * This function will hunt for an AGP graphics card, and try to match
712 * the requested mode to the capabilities of both the bridge and the card.
714 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
716 struct pci_dev *device = NULL;
717 u32 vga_agpstat;
718 u8 cap_ptr;
720 for (;;) {
721 device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
722 if (!device) {
723 printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
724 return 0;
726 cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
727 if (cap_ptr)
728 break;
732 * Ok, here we have a AGP device. Disable impossible
733 * settings, and adjust the readqueue to the minimum.
735 pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
737 /* adjust RQ depth */
738 bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
739 min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
740 min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
742 /* disable FW if it's not supported */
743 if (!((bridge_agpstat & AGPSTAT_FW) &&
744 (vga_agpstat & AGPSTAT_FW) &&
745 (requested_mode & AGPSTAT_FW)))
746 bridge_agpstat &= ~AGPSTAT_FW;
748 /* Check to see if we are operating in 3.0 mode */
749 if (agp_bridge->mode & AGPSTAT_MODE_3_0)
750 agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
751 else
752 agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
754 pci_dev_put(device);
755 return bridge_agpstat;
757 EXPORT_SYMBOL(agp_collect_device_status);
760 void agp_device_command(u32 bridge_agpstat, bool agp_v3)
762 struct pci_dev *device = NULL;
763 int mode;
765 mode = bridge_agpstat & 0x7;
766 if (agp_v3)
767 mode *= 4;
769 for_each_pci_dev(device) {
770 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
771 if (!agp)
772 continue;
774 printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
775 agp_v3 ? 3 : 2, pci_name(device), mode);
776 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
779 EXPORT_SYMBOL(agp_device_command);
782 void get_agp_version(struct agp_bridge_data *bridge)
784 u32 ncapid;
786 /* Exit early if already set by errata workarounds. */
787 if (bridge->major_version != 0)
788 return;
790 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
791 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
792 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
794 EXPORT_SYMBOL(get_agp_version);
797 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
799 u32 bridge_agpstat, temp;
801 get_agp_version(agp_bridge);
803 printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
804 agp_bridge->major_version,
805 agp_bridge->minor_version,
806 pci_name(agp_bridge->dev));
808 pci_read_config_dword(agp_bridge->dev,
809 agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
811 bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
812 if (bridge_agpstat == 0)
813 /* Something bad happened. FIXME: Return error code? */
814 return;
816 bridge_agpstat |= AGPSTAT_AGP_ENABLE;
818 /* Do AGP version specific frobbing. */
819 if (bridge->major_version >= 3) {
820 if (bridge->mode & AGPSTAT_MODE_3_0) {
821 /* If we have 3.5, we can do the isoch stuff. */
822 if (bridge->minor_version >= 5)
823 agp_3_5_enable(bridge);
824 agp_device_command(bridge_agpstat, true);
825 return;
826 } else {
827 /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
828 bridge_agpstat &= ~(7<<10) ;
829 pci_read_config_dword(bridge->dev,
830 bridge->capndx+AGPCTRL, &temp);
831 temp |= (1<<9);
832 pci_write_config_dword(bridge->dev,
833 bridge->capndx+AGPCTRL, temp);
835 printk(KERN_INFO PFX "Device is in legacy mode,"
836 " falling back to 2.x\n");
840 /* AGP v<3 */
841 agp_device_command(bridge_agpstat, false);
843 EXPORT_SYMBOL(agp_generic_enable);
846 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
848 char *table;
849 char *table_end;
850 int size;
851 int page_order;
852 int num_entries;
853 int i;
854 void *temp;
855 struct page *page;
857 /* The generic routines can't handle 2 level gatt's */
858 if (bridge->driver->size_type == LVL2_APER_SIZE)
859 return -EINVAL;
861 table = NULL;
862 i = bridge->aperture_size_idx;
863 temp = bridge->current_size;
864 size = page_order = num_entries = 0;
866 if (bridge->driver->size_type != FIXED_APER_SIZE) {
867 do {
868 switch (bridge->driver->size_type) {
869 case U8_APER_SIZE:
870 size = A_SIZE_8(temp)->size;
871 page_order =
872 A_SIZE_8(temp)->page_order;
873 num_entries =
874 A_SIZE_8(temp)->num_entries;
875 break;
876 case U16_APER_SIZE:
877 size = A_SIZE_16(temp)->size;
878 page_order = A_SIZE_16(temp)->page_order;
879 num_entries = A_SIZE_16(temp)->num_entries;
880 break;
881 case U32_APER_SIZE:
882 size = A_SIZE_32(temp)->size;
883 page_order = A_SIZE_32(temp)->page_order;
884 num_entries = A_SIZE_32(temp)->num_entries;
885 break;
886 /* This case will never really happen. */
887 case FIXED_APER_SIZE:
888 case LVL2_APER_SIZE:
889 default:
890 size = page_order = num_entries = 0;
891 break;
894 table = alloc_gatt_pages(page_order);
896 if (table == NULL) {
897 i++;
898 switch (bridge->driver->size_type) {
899 case U8_APER_SIZE:
900 bridge->current_size = A_IDX8(bridge);
901 break;
902 case U16_APER_SIZE:
903 bridge->current_size = A_IDX16(bridge);
904 break;
905 case U32_APER_SIZE:
906 bridge->current_size = A_IDX32(bridge);
907 break;
908 /* These cases will never really happen. */
909 case FIXED_APER_SIZE:
910 case LVL2_APER_SIZE:
911 default:
912 break;
914 temp = bridge->current_size;
915 } else {
916 bridge->aperture_size_idx = i;
918 } while (!table && (i < bridge->driver->num_aperture_sizes));
919 } else {
920 size = ((struct aper_size_info_fixed *) temp)->size;
921 page_order = ((struct aper_size_info_fixed *) temp)->page_order;
922 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
923 table = alloc_gatt_pages(page_order);
926 if (table == NULL)
927 return -ENOMEM;
929 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
931 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
932 SetPageReserved(page);
934 bridge->gatt_table_real = (u32 *) table;
935 agp_gatt_table = (void *)table;
937 bridge->driver->cache_flush();
938 #ifdef CONFIG_X86
939 set_memory_uc((unsigned long)table, 1 << page_order);
940 bridge->gatt_table = (void *)table;
941 #else
942 bridge->gatt_table = ioremap_nocache(virt_to_gart(table),
943 (PAGE_SIZE * (1 << page_order)));
944 bridge->driver->cache_flush();
945 #endif
947 if (bridge->gatt_table == NULL) {
948 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
949 ClearPageReserved(page);
951 free_gatt_pages(table, page_order);
953 return -ENOMEM;
955 bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real);
957 /* AK: bogus, should encode addresses > 4GB */
958 for (i = 0; i < num_entries; i++) {
959 writel(bridge->scratch_page, bridge->gatt_table+i);
960 readl(bridge->gatt_table+i); /* PCI Posting. */
963 return 0;
965 EXPORT_SYMBOL(agp_generic_create_gatt_table);
967 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
969 int page_order;
970 char *table, *table_end;
971 void *temp;
972 struct page *page;
974 temp = bridge->current_size;
976 switch (bridge->driver->size_type) {
977 case U8_APER_SIZE:
978 page_order = A_SIZE_8(temp)->page_order;
979 break;
980 case U16_APER_SIZE:
981 page_order = A_SIZE_16(temp)->page_order;
982 break;
983 case U32_APER_SIZE:
984 page_order = A_SIZE_32(temp)->page_order;
985 break;
986 case FIXED_APER_SIZE:
987 page_order = A_SIZE_FIX(temp)->page_order;
988 break;
989 case LVL2_APER_SIZE:
990 /* The generic routines can't deal with 2 level gatt's */
991 return -EINVAL;
992 break;
993 default:
994 page_order = 0;
995 break;
998 /* Do not worry about freeing memory, because if this is
999 * called, then all agp memory is deallocated and removed
1000 * from the table. */
1002 #ifdef CONFIG_X86
1003 set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1004 #else
1005 iounmap(bridge->gatt_table);
1006 #endif
1007 table = (char *) bridge->gatt_table_real;
1008 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1010 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1011 ClearPageReserved(page);
1013 free_gatt_pages(bridge->gatt_table_real, page_order);
1015 agp_gatt_table = NULL;
1016 bridge->gatt_table = NULL;
1017 bridge->gatt_table_real = NULL;
1018 bridge->gatt_bus_addr = 0;
1020 return 0;
1022 EXPORT_SYMBOL(agp_generic_free_gatt_table);
1025 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1027 int num_entries;
1028 size_t i;
1029 off_t j;
1030 void *temp;
1031 struct agp_bridge_data *bridge;
1032 int mask_type;
1034 bridge = mem->bridge;
1035 if (!bridge)
1036 return -EINVAL;
1038 if (mem->page_count == 0)
1039 return 0;
1041 temp = bridge->current_size;
1043 switch (bridge->driver->size_type) {
1044 case U8_APER_SIZE:
1045 num_entries = A_SIZE_8(temp)->num_entries;
1046 break;
1047 case U16_APER_SIZE:
1048 num_entries = A_SIZE_16(temp)->num_entries;
1049 break;
1050 case U32_APER_SIZE:
1051 num_entries = A_SIZE_32(temp)->num_entries;
1052 break;
1053 case FIXED_APER_SIZE:
1054 num_entries = A_SIZE_FIX(temp)->num_entries;
1055 break;
1056 case LVL2_APER_SIZE:
1057 /* The generic routines can't deal with 2 level gatt's */
1058 return -EINVAL;
1059 break;
1060 default:
1061 num_entries = 0;
1062 break;
1065 num_entries -= agp_memory_reserved/PAGE_SIZE;
1066 if (num_entries < 0) num_entries = 0;
1068 if (type != mem->type)
1069 return -EINVAL;
1071 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1072 if (mask_type != 0) {
1073 /* The generic routines know nothing of memory types */
1074 return -EINVAL;
1077 /* AK: could wrap */
1078 if ((pg_start + mem->page_count) > num_entries)
1079 return -EINVAL;
1081 j = pg_start;
1083 while (j < (pg_start + mem->page_count)) {
1084 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1085 return -EBUSY;
1086 j++;
1089 if (!mem->is_flushed) {
1090 bridge->driver->cache_flush();
1091 mem->is_flushed = true;
1094 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1095 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type),
1096 bridge->gatt_table+j);
1098 readl(bridge->gatt_table+j-1); /* PCI Posting. */
1100 bridge->driver->tlb_flush(mem);
1101 return 0;
1103 EXPORT_SYMBOL(agp_generic_insert_memory);
1106 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1108 size_t i;
1109 struct agp_bridge_data *bridge;
1110 int mask_type;
1112 bridge = mem->bridge;
1113 if (!bridge)
1114 return -EINVAL;
1116 if (mem->page_count == 0)
1117 return 0;
1119 if (type != mem->type)
1120 return -EINVAL;
1122 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1123 if (mask_type != 0) {
1124 /* The generic routines know nothing of memory types */
1125 return -EINVAL;
1128 /* AK: bogus, should encode addresses > 4GB */
1129 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1130 writel(bridge->scratch_page, bridge->gatt_table+i);
1132 readl(bridge->gatt_table+i-1); /* PCI Posting. */
1134 bridge->driver->tlb_flush(mem);
1135 return 0;
1137 EXPORT_SYMBOL(agp_generic_remove_memory);
1139 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1141 return NULL;
1143 EXPORT_SYMBOL(agp_generic_alloc_by_type);
1145 void agp_generic_free_by_type(struct agp_memory *curr)
1147 agp_free_page_array(curr);
1148 agp_free_key(curr->key);
1149 kfree(curr);
1151 EXPORT_SYMBOL(agp_generic_free_by_type);
1153 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1155 struct agp_memory *new;
1156 int i;
1157 int pages;
1159 pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1160 new = agp_create_user_memory(page_count);
1161 if (new == NULL)
1162 return NULL;
1164 for (i = 0; i < page_count; i++)
1165 new->memory[i] = 0;
1166 new->page_count = 0;
1167 new->type = type;
1168 new->num_scratch_pages = pages;
1170 return new;
1172 EXPORT_SYMBOL(agp_generic_alloc_user);
1175 * Basic Page Allocation Routines -
1176 * These routines handle page allocation and by default they reserve the allocated
1177 * memory. They also handle incrementing the current_memory_agp value, Which is checked
1178 * against a maximum value.
1181 void *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1183 struct page * page;
1185 page = alloc_page(GFP_KERNEL | GFP_DMA32);
1186 if (page == NULL)
1187 return NULL;
1189 map_page_into_agp(page);
1191 get_page(page);
1192 atomic_inc(&agp_bridge->current_memory_agp);
1193 return page_address(page);
1195 EXPORT_SYMBOL(agp_generic_alloc_page);
1198 void agp_generic_destroy_page(void *addr, int flags)
1200 struct page *page;
1202 if (addr == NULL)
1203 return;
1205 page = virt_to_page(addr);
1206 if (flags & AGP_PAGE_DESTROY_UNMAP)
1207 unmap_page_from_agp(page);
1209 if (flags & AGP_PAGE_DESTROY_FREE) {
1210 put_page(page);
1211 free_page((unsigned long)addr);
1212 atomic_dec(&agp_bridge->current_memory_agp);
1215 EXPORT_SYMBOL(agp_generic_destroy_page);
1217 /* End Basic Page Allocation Routines */
1221 * agp_enable - initialise the agp point-to-point connection.
1223 * @mode: agp mode register value to configure with.
1225 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1227 if (!bridge)
1228 return;
1229 bridge->driver->agp_enable(bridge, mode);
1231 EXPORT_SYMBOL(agp_enable);
1233 /* When we remove the global variable agp_bridge from all drivers
1234 * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1237 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1239 if (list_empty(&agp_bridges))
1240 return NULL;
1242 return agp_bridge;
1245 static void ipi_handler(void *null)
1247 flush_agp_cache();
1250 void global_cache_flush(void)
1252 if (on_each_cpu(ipi_handler, NULL, 1, 1) != 0)
1253 panic(PFX "timed out waiting for the other CPUs!\n");
1255 EXPORT_SYMBOL(global_cache_flush);
1257 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1258 unsigned long addr, int type)
1260 /* memory type is ignored in the generic routine */
1261 if (bridge->driver->masks)
1262 return addr | bridge->driver->masks[0].mask;
1263 else
1264 return addr;
1266 EXPORT_SYMBOL(agp_generic_mask_memory);
1268 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1269 int type)
1271 if (type >= AGP_USER_TYPES)
1272 return 0;
1273 return type;
1275 EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1278 * These functions are implemented according to the AGPv3 spec,
1279 * which covers implementation details that had previously been
1280 * left open.
1283 int agp3_generic_fetch_size(void)
1285 u16 temp_size;
1286 int i;
1287 struct aper_size_info_16 *values;
1289 pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1290 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1292 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1293 if (temp_size == values[i].size_value) {
1294 agp_bridge->previous_size =
1295 agp_bridge->current_size = (void *) (values + i);
1297 agp_bridge->aperture_size_idx = i;
1298 return values[i].size;
1301 return 0;
1303 EXPORT_SYMBOL(agp3_generic_fetch_size);
1305 void agp3_generic_tlbflush(struct agp_memory *mem)
1307 u32 ctrl;
1308 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1309 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1310 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1312 EXPORT_SYMBOL(agp3_generic_tlbflush);
1314 int agp3_generic_configure(void)
1316 u32 temp;
1317 struct aper_size_info_16 *current_size;
1319 current_size = A_SIZE_16(agp_bridge->current_size);
1321 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1322 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1324 /* set aperture size */
1325 pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1326 /* set gart pointer */
1327 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1328 /* enable aperture and GTLB */
1329 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1330 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1331 return 0;
1333 EXPORT_SYMBOL(agp3_generic_configure);
1335 void agp3_generic_cleanup(void)
1337 u32 ctrl;
1338 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1339 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1341 EXPORT_SYMBOL(agp3_generic_cleanup);
1343 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1345 {4096, 1048576, 10,0x000},
1346 {2048, 524288, 9, 0x800},
1347 {1024, 262144, 8, 0xc00},
1348 { 512, 131072, 7, 0xe00},
1349 { 256, 65536, 6, 0xf00},
1350 { 128, 32768, 5, 0xf20},
1351 { 64, 16384, 4, 0xf30},
1352 { 32, 8192, 3, 0xf38},
1353 { 16, 4096, 2, 0xf3c},
1354 { 8, 2048, 1, 0xf3e},
1355 { 4, 1024, 0, 0xf3f}
1357 EXPORT_SYMBOL(agp3_generic_sizes);