drivers/media/video/arv.c

   1 /*
   2  * Colour AR M64278(VGA) driver for Video4Linux
   3  *
   4  * Copyright (C) 2003   Takeo Takahashi <takahashi.takeo@renesas.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  *
  11  * Some code is taken from AR driver sample program for M3T-M32700UT.
  12  *
  13  * AR driver sample (M32R SDK):
  14  *     Copyright (c) 2003 RENESAS TECHNOROGY CORPORATION
  15  *     AND RENESAS SOLUTIONS CORPORATION
  16  *     All Rights Reserved.
  17  *
  18  * 2003-09-01:  Support w3cam by Takeo Takahashi
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/module.h>
  23 #include <linux/delay.h>
  24 #include <linux/errno.h>
  25 #include <linux/fs.h>
  26 #include <linux/kernel.h>
  27 #include <linux/slab.h>
  28 #include <linux/mm.h>
  29 #include <linux/sched.h>
  30 #include <linux/videodev.h>
  31 #include <media/v4l2-common.h>
  32 #include <linux/mutex.h>
  33
  34 #include <asm/uaccess.h>
  35 #include <asm/m32r.h>
  36 #include <asm/io.h>
  37 #include <asm/dma.h>
  38 #include <asm/byteorder.h>
  39
  40 #if 0
  41 #define DEBUG(n, args...) printk(args)
  42 #define CHECK_LOST      1
  43 #else
  44 #define DEBUG(n, args...)
  45 #define CHECK_LOST      0
  46 #endif
  47
  48 /*
  49  * USE_INT is always 0, interrupt mode is not available
  50  * on linux due to lack of speed
  51  */
  52 #define USE_INT         0       /* Don't modify */
  53
  54 #define VERSION "0.03"
  55
  56 #define ar_inl(addr)            inl((unsigned long)(addr))
  57 #define ar_outl(val, addr)      outl((unsigned long)(val),(unsigned long)(addr))
  58
  59 extern struct cpuinfo_m32r      boot_cpu_data;
  60
  61 /*
  62  * CCD pixel size
  63  *      Note that M32700UT does not support CIF mode, but QVGA is
  64  *      supported by M32700UT hardware using VGA mode of AR LSI.
  65  *
  66  *      Supported: VGA  (Normal mode, Interlace mode)
  67  *                 QVGA (Always Interlace mode of VGA)
  68  *
  69  */
  70 #define AR_WIDTH_VGA            640
  71 #define AR_HEIGHT_VGA           480
  72 #define AR_WIDTH_QVGA           320
  73 #define AR_HEIGHT_QVGA          240
  74 #define MIN_AR_WIDTH            AR_WIDTH_QVGA
  75 #define MIN_AR_HEIGHT           AR_HEIGHT_QVGA
  76 #define MAX_AR_WIDTH            AR_WIDTH_VGA
  77 #define MAX_AR_HEIGHT           AR_HEIGHT_VGA
  78
  79 /* bits & bytes per pixel */
  80 #define AR_BITS_PER_PIXEL       16
  81 #define AR_BYTES_PER_PIXEL      (AR_BITS_PER_PIXEL/8)
  82
  83 /* line buffer size */
  84 #define AR_LINE_BYTES_VGA       (AR_WIDTH_VGA * AR_BYTES_PER_PIXEL)
  85 #define AR_LINE_BYTES_QVGA      (AR_WIDTH_QVGA * AR_BYTES_PER_PIXEL)
  86 #define MAX_AR_LINE_BYTES       AR_LINE_BYTES_VGA
  87
  88 /* frame size & type */
  89 #define AR_FRAME_BYTES_VGA \
  90         (AR_WIDTH_VGA * AR_HEIGHT_VGA * AR_BYTES_PER_PIXEL)
  91 #define AR_FRAME_BYTES_QVGA \
  92         (AR_WIDTH_QVGA * AR_HEIGHT_QVGA * AR_BYTES_PER_PIXEL)
  93 #define MAX_AR_FRAME_BYTES \
  94         (MAX_AR_WIDTH * MAX_AR_HEIGHT * AR_BYTES_PER_PIXEL)
  95
  96 #define AR_MAX_FRAME            15
  97
  98 /* capture size */
  99 #define AR_SIZE_VGA             0
 100 #define AR_SIZE_QVGA            1
 101
 102 /* capture mode */
 103 #define AR_MODE_INTERLACE       0
 104 #define AR_MODE_NORMAL          1
 105
 106 struct ar_device {
 107         struct video_device *vdev;
 108         unsigned int start_capture;     /* duaring capture in INT. mode. */
 109 #if USE_INT
 110         unsigned char *line_buff;       /* DMA line buffer */
 111 #endif
 112         unsigned char *frame[MAX_AR_HEIGHT];    /* frame data */
 113         short size;                     /* capture size */
 114         short mode;                     /* capture mode */
 115         int width, height;
 116         int frame_bytes, line_bytes;
 117         wait_queue_head_t wait;
 118         struct mutex lock;
 119 };
 120
 121 static int video_nr = -1;       /* video device number (first free) */
 122 static unsigned char    yuv[MAX_AR_FRAME_BYTES];
 123
 124 /* module parameters */
 125 /* default frequency */
 126 #define DEFAULT_FREQ    50      /* 50 or 75 (MHz) is available as BCLK */
 127 static int freq = DEFAULT_FREQ; /* BCLK: available 50 or 70 (MHz) */
 128 static int vga;                 /* default mode(0:QVGA mode, other:VGA mode) */
 129 static int vga_interlace;       /* 0 is normal mode for, else interlace mode */
 130 module_param(freq, int, 0);
 131 module_param(vga, int, 0);
 132 module_param(vga_interlace, int, 0);
 133
 134 static int ar_initialize(struct video_device *dev);
 135
 136 static inline void wait_for_vsync(void)
 137 {
 138         while (ar_inl(ARVCR0) & ARVCR0_VDS)     /* wait for VSYNC */
 139                 cpu_relax();
 140         while (!(ar_inl(ARVCR0) & ARVCR0_VDS))  /* wait for VSYNC */
 141                 cpu_relax();
 142 }
 143
 144 static inline void wait_acknowledge(void)
 145 {
 146         int i;
 147
 148         for (i = 0; i < 1000; i++)
 149                 cpu_relax();
 150         while (ar_inl(PLDI2CSTS) & PLDI2CSTS_NOACK)
 151                 cpu_relax();
 152 }
 153
 154 /*******************************************************************
 155  * I2C functions
 156  *******************************************************************/
 157 void iic(int n, unsigned long addr, unsigned long data1, unsigned long data2,
 158          unsigned long data3)
 159 {
 160         int i;
 161
 162         /* Slave Address */
 163         ar_outl(addr, PLDI2CDATA);
 164         wait_for_vsync();
 165
 166         /* Start */
 167         ar_outl(1, PLDI2CCND);
 168         wait_acknowledge();
 169
 170         /* Transfer data 1 */
 171         ar_outl(data1, PLDI2CDATA);
 172         wait_for_vsync();
 173         ar_outl(PLDI2CSTEN_STEN, PLDI2CSTEN);
 174         wait_acknowledge();
 175
 176         /* Transfer data 2 */
 177         ar_outl(data2, PLDI2CDATA);
 178         wait_for_vsync();
 179         ar_outl(PLDI2CSTEN_STEN, PLDI2CSTEN);
 180         wait_acknowledge();
 181
 182         if (n == 3) {
 183                 /* Transfer data 3 */
 184                 ar_outl(data3, PLDI2CDATA);
 185                 wait_for_vsync();
 186                 ar_outl(PLDI2CSTEN_STEN, PLDI2CSTEN);
 187                 wait_acknowledge();
 188         }
 189
 190         /* Stop */
 191         for (i = 0; i < 100; i++)
 192                 cpu_relax();
 193         ar_outl(2, PLDI2CCND);
 194         ar_outl(2, PLDI2CCND);
 195
 196         while (ar_inl(PLDI2CSTS) & PLDI2CSTS_BB)
 197                 cpu_relax();
 198 }
 199
 200
 201 void init_iic(void)
 202 {
 203         DEBUG(1, "init_iic:\n");
 204
 205         /*
 206          * ICU Setting (iic)
 207          */
 208         /* I2C Setting */
 209         ar_outl(0x0, PLDI2CCR);         /* I2CCR Disable                   */
 210         ar_outl(0x0300, PLDI2CMOD);     /* I2CMOD ACK/8b-data/7b-addr/auto */
 211         ar_outl(0x1, PLDI2CACK);        /* I2CACK ACK                      */
 212
 213         /* I2C CLK */
 214         /* 50MH-100k */
 215         if (freq == 75) {
 216                 ar_outl(369, PLDI2CFREQ);       /* BCLK = 75MHz */
 217         } else if (freq == 50) {
 218                 ar_outl(244, PLDI2CFREQ);       /* BCLK = 50MHz */
 219         } else {
 220                 ar_outl(244, PLDI2CFREQ);       /* default: BCLK = 50MHz */
 221         }
 222         ar_outl(0x1, PLDI2CCR);         /* I2CCR Enable */
 223 }
 224
 225 /**************************************************************************
 226  *
 227  * Video4Linux Interface functions
 228  *
 229  **************************************************************************/
 230
 231 static inline void disable_dma(void)
 232 {
 233         ar_outl(0x8000, M32R_DMAEN_PORTL);      /* disable DMA0 */
 234 }
 235
 236 static inline void enable_dma(void)
 237 {
 238         ar_outl(0x8080, M32R_DMAEN_PORTL);      /* enable DMA0 */
 239 }
 240
 241 static inline void clear_dma_status(void)
 242 {
 243         ar_outl(0x8000, M32R_DMAEDET_PORTL);    /* clear status */
 244 }
 245
 246 static inline void wait_for_vertical_sync(int exp_line)
 247 {
 248 #if CHECK_LOST
 249         int tmout = 10000;      /* FIXME */
 250         int l;
 251
 252         /*
 253          * check HCOUNT because we cannot check vertical sync.
 254          */
 255         for (; tmout >= 0; tmout--) {
 256                 l = ar_inl(ARVHCOUNT);
 257                 if (l == exp_line)
 258                         break;
 259         }
 260         if (tmout < 0)
 261                 printk("arv: lost %d -> %d\n", exp_line, l);
 262 #else
 263         while (ar_inl(ARVHCOUNT) != exp_line)
 264                 cpu_relax();
 265 #endif
 266 }
 267
 268 static ssize_t ar_read(struct file *file, char *buf, size_t count, loff_t *ppos)
 269 {
 270         struct video_device *v = video_devdata(file);
 271         struct ar_device *ar = v->priv;
 272         long ret = ar->frame_bytes;             /* return read bytes */
 273         unsigned long arvcr1 = 0;
 274         unsigned long flags;
 275         unsigned char *p;
 276         int h, w;
 277         unsigned char *py, *pu, *pv;
 278 #if ! USE_INT
 279         int l;
 280 #endif
 281
 282         DEBUG(1, "ar_read()\n");
 283
 284         if (ar->size == AR_SIZE_QVGA)
 285                 arvcr1 |= ARVCR1_QVGA;
 286         if (ar->mode == AR_MODE_NORMAL)
 287                 arvcr1 |= ARVCR1_NORMAL;
 288
 289         mutex_lock(&ar->lock);
 290
 291 #if USE_INT
 292         local_irq_save(flags);
 293         disable_dma();
 294         ar_outl(0xa1871300, M32R_DMA0CR0_PORTL);
 295         ar_outl(0x01000000, M32R_DMA0CR1_PORTL);
 296
 297         /* set AR FIFO address as source(BSEL5) */
 298         ar_outl(ARDATA32, M32R_DMA0CSA_PORTL);
 299         ar_outl(ARDATA32, M32R_DMA0RSA_PORTL);
 300         ar_outl(ar->line_buff, M32R_DMA0CDA_PORTL);     /* destination addr. */
 301         ar_outl(ar->line_buff, M32R_DMA0RDA_PORTL);     /* reload address */
 302         ar_outl(ar->line_bytes, M32R_DMA0CBCUT_PORTL);  /* byte count (bytes) */
 303         ar_outl(ar->line_bytes, M32R_DMA0RBCUT_PORTL);  /* reload count (bytes) */
 304
 305         /*
 306          * Okey , kicks AR LSI to invoke an interrupt
 307          */
 308         ar->start_capture = 0;
 309         ar_outl(arvcr1 | ARVCR1_HIEN, ARVCR1);
 310         local_irq_restore(flags);
 311         /* .... AR interrupts .... */
 312         interruptible_sleep_on(&ar->wait);
 313         if (signal_pending(current)) {
 314                 printk("arv: interrupted while get frame data.\n");
 315                 ret = -EINTR;
 316                 goto out_up;
 317         }
 318 #else   /* ! USE_INT */
 319         /* polling */
 320         ar_outl(arvcr1, ARVCR1);
 321         disable_dma();
 322         ar_outl(0x8000, M32R_DMAEDET_PORTL);
 323         ar_outl(0xa0861300, M32R_DMA0CR0_PORTL);
 324         ar_outl(0x01000000, M32R_DMA0CR1_PORTL);
 325         ar_outl(ARDATA32, M32R_DMA0CSA_PORTL);
 326         ar_outl(ARDATA32, M32R_DMA0RSA_PORTL);
 327         ar_outl(ar->line_bytes, M32R_DMA0CBCUT_PORTL);
 328         ar_outl(ar->line_bytes, M32R_DMA0RBCUT_PORTL);
 329
 330         local_irq_save(flags);
 331         while (ar_inl(ARVHCOUNT) != 0)          /* wait for 0 */
 332                 cpu_relax();
 333         if (ar->mode == AR_MODE_INTERLACE && ar->size == AR_SIZE_VGA) {
 334                 for (h = 0; h < ar->height; h++) {
 335                         wait_for_vertical_sync(h);
 336                         if (h < (AR_HEIGHT_VGA/2))
 337                                 l = h << 1;
 338                         else
 339                                 l = (((h - (AR_HEIGHT_VGA/2)) << 1) + 1);
 340                         ar_outl(virt_to_phys(ar->frame[l]), M32R_DMA0CDA_PORTL);
 341                         enable_dma();
 342                         while (!(ar_inl(M32R_DMAEDET_PORTL) & 0x8000))
 343                                 cpu_relax();
 344                         disable_dma();
 345                         clear_dma_status();
 346                         ar_outl(0xa0861300, M32R_DMA0CR0_PORTL);
 347                 }
 348         } else {
 349                 for (h = 0; h < ar->height; h++) {
 350                         wait_for_vertical_sync(h);
 351                         ar_outl(virt_to_phys(ar->frame[h]), M32R_DMA0CDA_PORTL);
 352                         enable_dma();
 353                         while (!(ar_inl(M32R_DMAEDET_PORTL) & 0x8000))
 354                                 cpu_relax();
 355                         disable_dma();
 356                         clear_dma_status();
 357                         ar_outl(0xa0861300, M32R_DMA0CR0_PORTL);
 358                 }
 359         }
 360         local_irq_restore(flags);
 361 #endif  /* ! USE_INT */
 362
 363         /*
 364          * convert YUV422 to YUV422P
 365          *      +--------------------+
 366          *      |  Y0,Y1,...         |
 367          *      |  ..............Yn  |
 368          *      +--------------------+
 369          *      |  U0,U1,........Un  |
 370          *      +--------------------+
 371          *      |  V0,V1,........Vn  |
 372          *      +--------------------+
 373          */
 374         py = yuv;
 375         pu = py + (ar->frame_bytes / 2);
 376         pv = pu + (ar->frame_bytes / 4);
 377         for (h = 0; h < ar->height; h++) {
 378                 p = ar->frame[h];
 379                 for (w = 0; w < ar->line_bytes; w += 4) {
 380                         *py++ = *p++;
 381                         *pu++ = *p++;
 382                         *py++ = *p++;
 383                         *pv++ = *p++;
 384                 }
 385         }
 386         if (copy_to_user(buf, yuv, ar->frame_bytes)) {
 387                 printk("arv: failed while copy_to_user yuv.\n");
 388                 ret = -EFAULT;
 389                 goto out_up;
 390         }
 391         DEBUG(1, "ret = %d\n", ret);
 392 out_up:
 393         mutex_unlock(&ar->lock);
 394         return ret;
 395 }
 396
 397 static int ar_do_ioctl(struct inode *inode, struct file *file,
 398                        unsigned int cmd, void *arg)
 399 {
 400         struct video_device *dev = video_devdata(file);
 401         struct ar_device *ar = dev->priv;
 402
 403         DEBUG(1, "ar_ioctl()\n");
 404         switch(cmd) {
 405         case VIDIOCGCAP:
 406         {
 407                 struct video_capability *b = arg;
 408                 DEBUG(1, "VIDIOCGCAP:\n");
 409                 strcpy(b->name, ar->vdev->name);
 410                 b->type = VID_TYPE_CAPTURE;
 411                 b->channels = 0;
 412                 b->audios = 0;
 413                 b->maxwidth = MAX_AR_WIDTH;
 414                 b->maxheight = MAX_AR_HEIGHT;
 415                 b->minwidth = MIN_AR_WIDTH;
 416                 b->minheight = MIN_AR_HEIGHT;
 417                 return 0;
 418         }
 419         case VIDIOCGCHAN:
 420                 DEBUG(1, "VIDIOCGCHAN:\n");
 421                 return 0;
 422         case VIDIOCSCHAN:
 423                 DEBUG(1, "VIDIOCSCHAN:\n");
 424                 return 0;
 425         case VIDIOCGTUNER:
 426                 DEBUG(1, "VIDIOCGTUNER:\n");
 427                 return 0;
 428         case VIDIOCSTUNER:
 429                 DEBUG(1, "VIDIOCSTUNER:\n");
 430                 return 0;
 431         case VIDIOCGPICT:
 432                 DEBUG(1, "VIDIOCGPICT:\n");
 433                 return 0;
 434         case VIDIOCSPICT:
 435                 DEBUG(1, "VIDIOCSPICT:\n");
 436                 return 0;
 437         case VIDIOCCAPTURE:
 438                 DEBUG(1, "VIDIOCCAPTURE:\n");
 439                 return -EINVAL;
 440         case VIDIOCGWIN:
 441         {
 442                 struct video_window *w = arg;
 443                 DEBUG(1, "VIDIOCGWIN:\n");
 444                 memset(w, 0, sizeof(*w));
 445                 w->width = ar->width;
 446                 w->height = ar->height;
 447                 return 0;
 448         }
 449         case VIDIOCSWIN:
 450         {
 451                 struct video_window *w = arg;
 452                 DEBUG(1, "VIDIOCSWIN:\n");
 453                 if ((w->width != AR_WIDTH_VGA || w->height != AR_HEIGHT_VGA) &&
 454                     (w->width != AR_WIDTH_QVGA || w->height != AR_HEIGHT_QVGA))
 455                                 return -EINVAL;
 456
 457                 mutex_lock(&ar->lock);
 458                 ar->width = w->width;
 459                 ar->height = w->height;
 460                 if (ar->width == AR_WIDTH_VGA) {
 461                         ar->size = AR_SIZE_VGA;
 462                         ar->frame_bytes = AR_FRAME_BYTES_VGA;
 463                         ar->line_bytes = AR_LINE_BYTES_VGA;
 464                         if (vga_interlace)
 465                                 ar->mode = AR_MODE_INTERLACE;
 466                         else
 467                                 ar->mode = AR_MODE_NORMAL;
 468                 } else {
 469                         ar->size = AR_SIZE_QVGA;
 470                         ar->frame_bytes = AR_FRAME_BYTES_QVGA;
 471                         ar->line_bytes = AR_LINE_BYTES_QVGA;
 472                         ar->mode = AR_MODE_INTERLACE;
 473                 }
 474                 mutex_unlock(&ar->lock);
 475                 return 0;
 476         }
 477         case VIDIOCGFBUF:
 478                 DEBUG(1, "VIDIOCGFBUF:\n");
 479                 return -EINVAL;
 480         case VIDIOCSFBUF:
 481                 DEBUG(1, "VIDIOCSFBUF:\n");
 482                 return -EINVAL;
 483         case VIDIOCKEY:
 484                 DEBUG(1, "VIDIOCKEY:\n");
 485                 return 0;
 486         case VIDIOCGFREQ:
 487                 DEBUG(1, "VIDIOCGFREQ:\n");
 488                 return -EINVAL;
 489         case VIDIOCSFREQ:
 490                 DEBUG(1, "VIDIOCSFREQ:\n");
 491                 return -EINVAL;
 492         case VIDIOCGAUDIO:
 493                 DEBUG(1, "VIDIOCGAUDIO:\n");
 494                 return -EINVAL;
 495         case VIDIOCSAUDIO:
 496                 DEBUG(1, "VIDIOCSAUDIO:\n");
 497                 return -EINVAL;
 498         case VIDIOCSYNC:
 499                 DEBUG(1, "VIDIOCSYNC:\n");
 500                 return -EINVAL;
 501         case VIDIOCMCAPTURE:
 502                 DEBUG(1, "VIDIOCMCAPTURE:\n");
 503                 return -EINVAL;
 504         case VIDIOCGMBUF:
 505                 DEBUG(1, "VIDIOCGMBUF:\n");
 506                 return -EINVAL;
 507         case VIDIOCGUNIT:
 508                 DEBUG(1, "VIDIOCGUNIT:\n");
 509                 return -EINVAL;
 510         case VIDIOCGCAPTURE:
 511                 DEBUG(1, "VIDIOCGCAPTURE:\n");
 512                 return -EINVAL;
 513         case VIDIOCSCAPTURE:
 514                 DEBUG(1, "VIDIOCSCAPTURE:\n");
 515                 return -EINVAL;
 516         case VIDIOCSPLAYMODE:
 517                 DEBUG(1, "VIDIOCSPLAYMODE:\n");
 518                 return -EINVAL;
 519         case VIDIOCSWRITEMODE:
 520                 DEBUG(1, "VIDIOCSWRITEMODE:\n");
 521                 return -EINVAL;
 522         case VIDIOCGPLAYINFO:
 523                 DEBUG(1, "VIDIOCGPLAYINFO:\n");
 524                 return -EINVAL;
 525         case VIDIOCSMICROCODE:
 526                 DEBUG(1, "VIDIOCSMICROCODE:\n");
 527                 return -EINVAL;
 528         case VIDIOCGVBIFMT:
 529                 DEBUG(1, "VIDIOCGVBIFMT:\n");
 530                 return -EINVAL;
 531         case VIDIOCSVBIFMT:
 532                 DEBUG(1, "VIDIOCSVBIFMT:\n");
 533                 return -EINVAL;
 534         default:
 535                 DEBUG(1, "Unknown ioctl(0x%08x)\n", cmd);
 536                 return -ENOIOCTLCMD;
 537         }
 538         return 0;
 539 }
 540
 541 static int ar_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 542                     unsigned long arg)
 543 {
 544         return video_usercopy(inode, file, cmd, arg, ar_do_ioctl);
 545 }
 546
 547 #if USE_INT
 548 /*
 549  * Interrupt handler
 550  */
 551 static void ar_interrupt(int irq, void *dev)
 552 {
 553         struct ar_device *ar = dev;
 554         unsigned int line_count;
 555         unsigned int line_number;
 556         unsigned int arvcr1;
 557
 558         line_count = ar_inl(ARVHCOUNT);                 /* line number */
 559         if (ar->mode == AR_MODE_INTERLACE && ar->size == AR_SIZE_VGA) {
 560                 /* operations for interlace mode */
 561                 if ( line_count < (AR_HEIGHT_VGA/2) )   /* even line */
 562                         line_number = (line_count << 1);
 563                 else                                    /* odd line */
 564                         line_number =
 565                         (((line_count - (AR_HEIGHT_VGA/2)) << 1) + 1);
 566         } else {
 567                 line_number = line_count;
 568         }
 569
 570         if (line_number == 0) {
 571                 /*
 572                  * It is an interrupt for line 0.
 573                  * we have to start capture.
 574                  */
 575                 disable_dma();
 576 #if 0
 577                 ar_outl(ar->line_buff, M32R_DMA0CDA_PORTL);     /* needless? */
 578 #endif
 579                 memcpy(ar->frame[0], ar->line_buff, ar->line_bytes);
 580 #if 0
 581                 ar_outl(0xa1861300, M32R_DMA0CR0_PORTL);
 582 #endif
 583                 enable_dma();
 584                 ar->start_capture = 1;                  /* during capture */
 585                 return;
 586         }
 587
 588         if (ar->start_capture == 1 && line_number <= (ar->height - 1)) {
 589                 disable_dma();
 590                 memcpy(ar->frame[line_number], ar->line_buff, ar->line_bytes);
 591
 592                 /*
 593                  * if captured all line of a frame, disable AR interrupt
 594                  * and wake a process up.
 595                  */
 596                 if (line_number == (ar->height - 1)) {  /* end  of line */
 597
 598                         ar->start_capture = 0;
 599
 600                         /* disable AR interrupt request */
 601                         arvcr1 = ar_inl(ARVCR1);
 602                         arvcr1 &= ~ARVCR1_HIEN;         /* clear int. flag */
 603                         ar_outl(arvcr1, ARVCR1);        /* disable */
 604                         wake_up_interruptible(&ar->wait);
 605                 } else {
 606 #if 0
 607                         ar_outl(ar->line_buff, M32R_DMA0CDA_PORTL);
 608                         ar_outl(0xa1861300, M32R_DMA0CR0_PORTL);
 609 #endif
 610                         enable_dma();
 611                 }
 612         }
 613 }
 614 #endif
 615
 616 /*
 617  * ar_initialize()
 618  *      ar_initialize() is called by video_register_device() and
 619  *      initializes AR LSI and peripherals.
 620  *
 621  *      -1 is returned in all failures.
 622  *      0 is returned in success.
 623  *
 624  */
 625 static int ar_initialize(struct video_device *dev)
 626 {
 627         struct ar_device *ar = dev->priv;
 628         unsigned long cr = 0;
 629         int i,found=0;
 630
 631         DEBUG(1, "ar_initialize:\n");
 632
 633         /*
 634          * initialize AR LSI
 635          */
 636         ar_outl(0, ARVCR0);             /* assert reset of AR LSI */
 637         for (i = 0; i < 0x18; i++)      /* wait for over 10 cycles @ 27MHz */
 638                 cpu_relax();
 639         ar_outl(ARVCR0_RST, ARVCR0);    /* negate reset of AR LSI (enable) */
 640         for (i = 0; i < 0x40d; i++)     /* wait for over 420 cycles @ 27MHz */
 641                 cpu_relax();
 642
 643         /* AR uses INT3 of CPU as interrupt pin. */
 644         ar_outl(ARINTSEL_INT3, ARINTSEL);
 645
 646         if (ar->size == AR_SIZE_QVGA)
 647                 cr |= ARVCR1_QVGA;
 648         if (ar->mode == AR_MODE_NORMAL)
 649                 cr |= ARVCR1_NORMAL;
 650         ar_outl(cr, ARVCR1);
 651
 652         /*
 653          * Initialize IIC so that CPU can communicate with AR LSI,
 654          * and send boot commands to AR LSI.
 655          */
 656         init_iic();
 657
 658         for (i = 0; i < 0x100000; i++) {        /* > 0xa1d10,  56ms */
 659                 if ((ar_inl(ARVCR0) & ARVCR0_VDS)) {    /* VSYNC */
 660                         found = 1;
 661                         break;
 662                 }
 663         }
 664
 665         if (found == 0)
 666                 return -ENODEV;
 667
 668         printk("arv: Initializing ");
 669
 670         iic(2,0x78,0x11,0x01,0x00);     /* start */
 671         iic(3,0x78,0x12,0x00,0x06);
 672         iic(3,0x78,0x12,0x12,0x30);
 673         iic(3,0x78,0x12,0x15,0x58);
 674         iic(3,0x78,0x12,0x17,0x30);
 675         printk(".");
 676         iic(3,0x78,0x12,0x1a,0x97);
 677         iic(3,0x78,0x12,0x1b,0xff);
 678         iic(3,0x78,0x12,0x1c,0xff);
 679         iic(3,0x78,0x12,0x26,0x10);
 680         iic(3,0x78,0x12,0x27,0x00);
 681         printk(".");
 682         iic(2,0x78,0x34,0x02,0x00);
 683         iic(2,0x78,0x7a,0x10,0x00);
 684         iic(2,0x78,0x80,0x39,0x00);
 685         iic(2,0x78,0x81,0xe6,0x00);
 686         iic(2,0x78,0x8d,0x00,0x00);
 687         printk(".");
 688         iic(2,0x78,0x8e,0x0c,0x00);
 689         iic(2,0x78,0x8f,0x00,0x00);
 690 #if 0
 691         iic(2,0x78,0x90,0x00,0x00);     /* AWB on=1 off=0 */
 692 #endif
 693         iic(2,0x78,0x93,0x01,0x00);
 694         iic(2,0x78,0x94,0xcd,0x00);
 695         iic(2,0x78,0x95,0x00,0x00);
 696         printk(".");
 697         iic(2,0x78,0x96,0xa0,0x00);
 698         iic(2,0x78,0x97,0x00,0x00);
 699         iic(2,0x78,0x98,0x60,0x00);
 700         iic(2,0x78,0x99,0x01,0x00);
 701         iic(2,0x78,0x9a,0x19,0x00);
 702         printk(".");
 703         iic(2,0x78,0x9b,0x02,0x00);
 704         iic(2,0x78,0x9c,0xe8,0x00);
 705         iic(2,0x78,0x9d,0x02,0x00);
 706         iic(2,0x78,0x9e,0x2e,0x00);
 707         iic(2,0x78,0xb8,0x78,0x00);
 708         iic(2,0x78,0xba,0x05,0x00);
 709 #if 0
 710         iic(2,0x78,0x83,0x8c,0x00);     /* brightness */
 711 #endif
 712         printk(".");
 713
 714         /* color correction */
 715         iic(3,0x78,0x49,0x00,0x95);     /* a            */
 716         iic(3,0x78,0x49,0x01,0x96);     /* b            */
 717         iic(3,0x78,0x49,0x03,0x85);     /* c            */
 718         iic(3,0x78,0x49,0x04,0x97);     /* d            */
 719         iic(3,0x78,0x49,0x02,0x7e);     /* e(Lo)        */
 720         iic(3,0x78,0x49,0x05,0xa4);     /* f(Lo)        */
 721         iic(3,0x78,0x49,0x06,0x04);     /* e(Hi)        */
 722         iic(3,0x78,0x49,0x07,0x04);     /* e(Hi)        */
 723         iic(2,0x78,0x48,0x01,0x00);     /* on=1 off=0   */
 724
 725         printk(".");
 726         iic(2,0x78,0x11,0x00,0x00);     /* end */
 727         printk(" done\n");
 728         return 0;
 729 }
 730
 731
 732 void ar_release(struct video_device *vfd)
 733 {
 734         struct ar_device *ar = vfd->priv;
 735         mutex_lock(&ar->lock);
 736         video_device_release(vfd);
 737 }
 738
 739 /****************************************************************************
 740  *
 741  * Video4Linux Module functions
 742  *
 743  ****************************************************************************/
 744 static const struct file_operations ar_fops = {
 745         .owner          = THIS_MODULE,
 746         .open           = video_exclusive_open,
 747         .release        = video_exclusive_release,
 748         .read           = ar_read,
 749         .ioctl          = ar_ioctl,
 750 #ifdef CONFIG_COMPAT
 751         .compat_ioctl   = v4l_compat_ioctl32,
 752 #endif
 753         .llseek         = no_llseek,
 754 };
 755
 756 static struct video_device ar_template = {
 757         .owner          = THIS_MODULE,
 758         .name           = "Colour AR VGA",
 759         .type           = VID_TYPE_CAPTURE,
 760         .fops           = &ar_fops,
 761         .release        = ar_release,
 762         .minor          = -1,
 763 };
 764
 765 #define ALIGN4(x)       ((((int)(x)) & 0x3) == 0)
 766 static struct ar_device ardev;
 767
 768 static int __init ar_init(void)
 769 {
 770         struct ar_device *ar;
 771         int ret;
 772         int i;
 773
 774         DEBUG(1, "ar_init:\n");
 775         ret = -EIO;
 776         printk(KERN_INFO "arv: Colour AR VGA driver %s\n", VERSION);
 777
 778         ar = &ardev;
 779         memset(ar, 0, sizeof(struct ar_device));
 780
 781 #if USE_INT
 782         /* allocate a DMA buffer for 1 line.  */
 783         ar->line_buff = kmalloc(MAX_AR_LINE_BYTES, GFP_KERNEL | GFP_DMA);
 784         if (ar->line_buff == NULL || ! ALIGN4(ar->line_buff)) {
 785                 printk("arv: buffer allocation failed for DMA.\n");
 786                 ret = -ENOMEM;
 787                 goto out_end;
 788         }
 789 #endif
 790         /* allocate buffers for a frame */
 791         for (i = 0; i < MAX_AR_HEIGHT; i++) {
 792                 ar->frame[i] = kmalloc(MAX_AR_LINE_BYTES, GFP_KERNEL);
 793                 if (ar->frame[i] == NULL || ! ALIGN4(ar->frame[i])) {
 794                         printk("arv: buffer allocation failed for frame.\n");
 795                         ret = -ENOMEM;
 796                         goto out_line_buff;
 797                 }
 798         }
 799
 800         ar->vdev = video_device_alloc();
 801         if (!ar->vdev) {
 802                 printk(KERN_ERR "arv: video_device_alloc() failed\n");
 803                 return -ENOMEM;
 804         }
 805         memcpy(ar->vdev, &ar_template, sizeof(ar_template));
 806         ar->vdev->priv = ar;
 807
 808         if (vga) {
 809                 ar->width       = AR_WIDTH_VGA;
 810                 ar->height      = AR_HEIGHT_VGA;
 811                 ar->size        = AR_SIZE_VGA;
 812                 ar->frame_bytes = AR_FRAME_BYTES_VGA;
 813                 ar->line_bytes  = AR_LINE_BYTES_VGA;
 814                 if (vga_interlace)
 815                         ar->mode = AR_MODE_INTERLACE;
 816                 else
 817                         ar->mode = AR_MODE_NORMAL;
 818         } else {
 819                 ar->width       = AR_WIDTH_QVGA;
 820                 ar->height      = AR_HEIGHT_QVGA;
 821                 ar->size        = AR_SIZE_QVGA;
 822                 ar->frame_bytes = AR_FRAME_BYTES_QVGA;
 823                 ar->line_bytes  = AR_LINE_BYTES_QVGA;
 824                 ar->mode        = AR_MODE_INTERLACE;
 825         }
 826         mutex_init(&ar->lock);
 827         init_waitqueue_head(&ar->wait);
 828
 829 #if USE_INT
 830         if (request_irq(M32R_IRQ_INT3, ar_interrupt, 0, "arv", ar)) {
 831                 printk("arv: request_irq(%d) failed.\n", M32R_IRQ_INT3);
 832                 ret = -EIO;
 833                 goto out_irq;
 834         }
 835 #endif
 836
 837         if (ar_initialize(ar->vdev) != 0) {
 838                 printk("arv: M64278 not found.\n");
 839                 ret = -ENODEV;
 840                 goto out_dev;
 841         }
 842
 843         /*
 844          * ok, we can initialize h/w according to parameters,
 845          * so register video device as a frame grabber type.
 846          * device is named "video[0-64]".
 847          * video_register_device() initializes h/w using ar_initialize().
 848          */
 849         if (video_register_device(ar->vdev, VFL_TYPE_GRABBER, video_nr) != 0) {
 850                 /* return -1, -ENFILE(full) or others */
 851                 printk("arv: register video (Colour AR) failed.\n");
 852                 ret = -ENODEV;
 853                 goto out_dev;
 854         }
 855
 856         printk("video%d: Found M64278 VGA (IRQ %d, Freq %dMHz).\n",
 857                 ar->vdev->minor, M32R_IRQ_INT3, freq);
 858
 859         return 0;
 860
 861 out_dev:
 862 #if USE_INT
 863         free_irq(M32R_IRQ_INT3, ar);
 864
 865 out_irq:
 866 #endif
 867         for (i = 0; i < MAX_AR_HEIGHT; i++)
 868                 kfree(ar->frame[i]);
 869
 870 out_line_buff:
 871 #if USE_INT
 872         kfree(ar->line_buff);
 873
 874 out_end:
 875 #endif
 876         return ret;
 877 }
 878
 879
 880 static int __init ar_init_module(void)
 881 {
 882         freq = (boot_cpu_data.bus_clock / 1000000);
 883         printk("arv: Bus clock %d\n", freq);
 884         if (freq != 50 && freq != 75)
 885                 freq = DEFAULT_FREQ;
 886         return ar_init();
 887 }
 888
 889 static void __exit ar_cleanup_module(void)
 890 {
 891         struct ar_device *ar;
 892         int i;
 893
 894         ar = &ardev;
 895         video_unregister_device(ar->vdev);
 896 #if USE_INT
 897         free_irq(M32R_IRQ_INT3, ar);
 898 #endif
 899         for (i = 0; i < MAX_AR_HEIGHT; i++)
 900                 kfree(ar->frame[i]);
 901 #if USE_INT
 902         kfree(ar->line_buff);
 903 #endif
 904 }
 905
 906 module_init(ar_init_module);
 907 module_exit(ar_cleanup_module);
 908
 909 MODULE_AUTHOR("Takeo Takahashi <takahashi.takeo@renesas.com>");
 910 MODULE_DESCRIPTION("Colour AR M64278(VGA) for Video4Linux");
 911 MODULE_LICENSE("GPL");