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PRCM: 34XX: Fix wrong shift value used in dpll4_m4x2_ck enable bit
[linux-ginger.git] / drivers / media / video / cx88 / cx88-dvb.c
blobd96173ff1dbac4a0096f854cdb0cc8008d4b8f7e
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-simple.h"
49 #include "tda9887.h"
50 #include "s5h1411.h"
51
52 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
53 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
54 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
55 MODULE_LICENSE("GPL");
56
57 static unsigned int debug;
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
60
61 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
62
63 #define dprintk(level,fmt, arg...) if (debug >= level) \
64 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
65
66 /* ------------------------------------------------------------------ */
67
68 static int dvb_buf_setup(struct videobuf_queue *q,
69 unsigned int *count, unsigned int *size)
70 {
71 struct cx8802_dev *dev = q->priv_data;
72
73 dev->ts_packet_size = 188 * 4;
74 dev->ts_packet_count = 32;
75
76 *size = dev->ts_packet_size * dev->ts_packet_count;
77 *count = 32;
78 return 0;
79 }
80
81 static int dvb_buf_prepare(struct videobuf_queue *q,
82 struct videobuf_buffer *vb, enum v4l2_field field)
83 {
84 struct cx8802_dev *dev = q->priv_data;
85 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
86 }
87
88 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
89 {
90 struct cx8802_dev *dev = q->priv_data;
91 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
92 }
93
94 static void dvb_buf_release(struct videobuf_queue *q,
95 struct videobuf_buffer *vb)
96 {
97 cx88_free_buffer(q, (struct cx88_buffer*)vb);
98 }
99
100 static struct videobuf_queue_ops dvb_qops = {
101 .buf_setup = dvb_buf_setup,
102 .buf_prepare = dvb_buf_prepare,
103 .buf_queue = dvb_buf_queue,
104 .buf_release = dvb_buf_release,
105 };
106
107 /* ------------------------------------------------------------------ */
108
109 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
110 {
111 struct cx8802_dev *dev= fe->dvb->priv;
112 struct cx8802_driver *drv = NULL;
113 int ret = 0;
114
115 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
116 if (drv) {
117 if (acquire)
118 ret = drv->request_acquire(drv);
119 else
120 ret = drv->request_release(drv);
121 }
122
123 return ret;
124 }
125
126 /* ------------------------------------------------------------------ */
127
128 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
129 {
130 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
131 static u8 reset [] = { RESET, 0x80 };
132 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
133 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
134 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
135 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
136
137 mt352_write(fe, clock_config, sizeof(clock_config));
138 udelay(200);
139 mt352_write(fe, reset, sizeof(reset));
140 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
141
142 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
143 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
144 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
145 return 0;
146 }
147
148 static int dvico_dual_demod_init(struct dvb_frontend *fe)
149 {
150 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
151 static u8 reset [] = { RESET, 0x80 };
152 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
153 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
154 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
155 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
156
157 mt352_write(fe, clock_config, sizeof(clock_config));
158 udelay(200);
159 mt352_write(fe, reset, sizeof(reset));
160 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
161
162 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
163 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
164 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
165
166 return 0;
167 }
168
169 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
170 {
171 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
172 static u8 reset [] = { 0x50, 0x80 };
173 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
174 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
175 0x00, 0xFF, 0x00, 0x40, 0x40 };
176 static u8 dntv_extra[] = { 0xB5, 0x7A };
177 static u8 capt_range_cfg[] = { 0x75, 0x32 };
178
179 mt352_write(fe, clock_config, sizeof(clock_config));
180 udelay(2000);
181 mt352_write(fe, reset, sizeof(reset));
182 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
183
184 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
185 udelay(2000);
186 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
187 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
188
189 return 0;
190 }
191
192 static struct mt352_config dvico_fusionhdtv = {
193 .demod_address = 0x0f,
194 .demod_init = dvico_fusionhdtv_demod_init,
195 };
196
197 static struct mt352_config dntv_live_dvbt_config = {
198 .demod_address = 0x0f,
199 .demod_init = dntv_live_dvbt_demod_init,
200 };
201
202 static struct mt352_config dvico_fusionhdtv_dual = {
203 .demod_address = 0x0f,
204 .demod_init = dvico_dual_demod_init,
205 };
206
207 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
208 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
209 {
210 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
211 static u8 reset [] = { 0x50, 0x80 };
212 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
213 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
214 0x00, 0xFF, 0x00, 0x40, 0x40 };
215 static u8 dntv_extra[] = { 0xB5, 0x7A };
216 static u8 capt_range_cfg[] = { 0x75, 0x32 };
217
218 mt352_write(fe, clock_config, sizeof(clock_config));
219 udelay(2000);
220 mt352_write(fe, reset, sizeof(reset));
221 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
222
223 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
224 udelay(2000);
225 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
226 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
227
228 return 0;
229 }
230
231 static struct mt352_config dntv_live_dvbt_pro_config = {
232 .demod_address = 0x0f,
233 .no_tuner = 1,
234 .demod_init = dntv_live_dvbt_pro_demod_init,
235 };
236 #endif
237
238 static struct zl10353_config dvico_fusionhdtv_hybrid = {
239 .demod_address = 0x0f,
240 .no_tuner = 1,
241 };
242
243 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
244 .demod_address = 0x0f,
245 .if2 = 45600,
246 .no_tuner = 1,
247 };
248
249 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
250 .demod_address = 0x0f,
251 .if2 = 4560,
252 .no_tuner = 1,
253 .demod_init = dvico_fusionhdtv_demod_init,
254 };
255
256 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
257 .demod_address = 0x0f,
258 };
259
260 static struct cx22702_config connexant_refboard_config = {
261 .demod_address = 0x43,
262 .output_mode = CX22702_SERIAL_OUTPUT,
263 };
264
265 static struct cx22702_config hauppauge_hvr_config = {
266 .demod_address = 0x63,
267 .output_mode = CX22702_SERIAL_OUTPUT,
268 };
269
270 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
271 {
272 struct cx8802_dev *dev= fe->dvb->priv;
273 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
274 return 0;
275 }
276
277 static struct or51132_config pchdtv_hd3000 = {
278 .demod_address = 0x15,
279 .set_ts_params = or51132_set_ts_param,
280 };
281
282 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
283 {
284 struct cx8802_dev *dev= fe->dvb->priv;
285 struct cx88_core *core = dev->core;
286
287 dprintk(1, "%s: index = %d\n", __func__, index);
288 if (index == 0)
289 cx_clear(MO_GP0_IO, 8);
290 else
291 cx_set(MO_GP0_IO, 8);
292 return 0;
293 }
294
295 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
296 {
297 struct cx8802_dev *dev= fe->dvb->priv;
298 if (is_punctured)
299 dev->ts_gen_cntrl |= 0x04;
300 else
301 dev->ts_gen_cntrl &= ~0x04;
302 return 0;
303 }
304
305 static struct lgdt330x_config fusionhdtv_3_gold = {
306 .demod_address = 0x0e,
307 .demod_chip = LGDT3302,
308 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
309 .set_ts_params = lgdt330x_set_ts_param,
310 };
311
312 static struct lgdt330x_config fusionhdtv_5_gold = {
313 .demod_address = 0x0e,
314 .demod_chip = LGDT3303,
315 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
316 .set_ts_params = lgdt330x_set_ts_param,
317 };
318
319 static struct lgdt330x_config pchdtv_hd5500 = {
320 .demod_address = 0x59,
321 .demod_chip = LGDT3303,
322 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
323 .set_ts_params = lgdt330x_set_ts_param,
324 };
325
326 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
327 {
328 struct cx8802_dev *dev= fe->dvb->priv;
329 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
330 return 0;
331 }
332
333 static struct nxt200x_config ati_hdtvwonder = {
334 .demod_address = 0x0a,
335 .set_ts_params = nxt200x_set_ts_param,
336 };
337
338 static int cx24123_set_ts_param(struct dvb_frontend* fe,
339 int is_punctured)
340 {
341 struct cx8802_dev *dev= fe->dvb->priv;
342 dev->ts_gen_cntrl = 0x02;
343 return 0;
344 }
345
346 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
347 fe_sec_voltage_t voltage)
348 {
349 struct cx8802_dev *dev= fe->dvb->priv;
350 struct cx88_core *core = dev->core;
351
352 if (voltage == SEC_VOLTAGE_OFF)
353 cx_write(MO_GP0_IO, 0x000006fb);
354 else
355 cx_write(MO_GP0_IO, 0x000006f9);
356
357 if (core->prev_set_voltage)
358 return core->prev_set_voltage(fe, voltage);
359 return 0;
360 }
361
362 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
363 fe_sec_voltage_t voltage)
364 {
365 struct cx8802_dev *dev= fe->dvb->priv;
366 struct cx88_core *core = dev->core;
367
368 if (voltage == SEC_VOLTAGE_OFF) {
369 dprintk(1,"LNB Voltage OFF\n");
370 cx_write(MO_GP0_IO, 0x0000efff);
371 }
372
373 if (core->prev_set_voltage)
374 return core->prev_set_voltage(fe, voltage);
375 return 0;
376 }
377
378 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
379 {
380 struct cx88_core *core = ptr;
381
382 switch (command) {
383 case XC2028_TUNER_RESET:
384 /* Send the tuner in then out of reset */
385 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
386
387 switch (core->boardnr) {
388 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
389 /* GPIO-4 xc3028 tuner */
390
391 cx_set(MO_GP0_IO, 0x00001000);
392 cx_clear(MO_GP0_IO, 0x00000010);
393 msleep(100);
394 cx_set(MO_GP0_IO, 0x00000010);
395 msleep(100);
396 break;
397 }
398
399 break;
400 case XC2028_RESET_CLK:
401 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
402 break;
403 default:
404 dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
405 command, arg);
406 return -EINVAL;
407 }
408
409 return 0;
410 }
411
412 static struct cx24123_config geniatech_dvbs_config = {
413 .demod_address = 0x55,
414 .set_ts_params = cx24123_set_ts_param,
415 };
416
417 static struct cx24123_config hauppauge_novas_config = {
418 .demod_address = 0x55,
419 .set_ts_params = cx24123_set_ts_param,
420 };
421
422 static struct cx24123_config kworld_dvbs_100_config = {
423 .demod_address = 0x15,
424 .set_ts_params = cx24123_set_ts_param,
425 .lnb_polarity = 1,
426 };
427
428 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
429 .demod_address = 0x32 >> 1,
430 .output_mode = S5H1409_PARALLEL_OUTPUT,
431 .gpio = S5H1409_GPIO_ON,
432 .qam_if = 44000,
433 .inversion = S5H1409_INVERSION_OFF,
434 .status_mode = S5H1409_DEMODLOCKING,
435 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
436 };
437
438 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
439 .demod_address = 0x32 >> 1,
440 .output_mode = S5H1409_SERIAL_OUTPUT,
441 .gpio = S5H1409_GPIO_OFF,
442 .inversion = S5H1409_INVERSION_OFF,
443 .status_mode = S5H1409_DEMODLOCKING,
444 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
445 };
446
447 static struct s5h1409_config kworld_atsc_120_config = {
448 .demod_address = 0x32 >> 1,
449 .output_mode = S5H1409_SERIAL_OUTPUT,
450 .gpio = S5H1409_GPIO_OFF,
451 .inversion = S5H1409_INVERSION_OFF,
452 .status_mode = S5H1409_DEMODLOCKING,
453 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
454 };
455
456 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
457 .i2c_address = 0x64,
458 .if_khz = 5380,
459 .tuner_callback = cx88_tuner_callback,
460 };
461
462 static struct zl10353_config cx88_geniatech_x8000_mt = {
463 .demod_address = (0x1e >> 1),
464 .no_tuner = 1,
465 };
466
467 static struct s5h1411_config dvico_fusionhdtv7_config = {
468 .output_mode = S5H1411_SERIAL_OUTPUT,
469 .gpio = S5H1411_GPIO_ON,
470 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
471 .qam_if = S5H1411_IF_44000,
472 .vsb_if = S5H1411_IF_44000,
473 .inversion = S5H1411_INVERSION_OFF,
474 .status_mode = S5H1411_DEMODLOCKING
475 };
476
477 static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
478 .i2c_address = 0xc2 >> 1,
479 .if_khz = 5380,
480 .tuner_callback = cx88_tuner_callback,
481 };
482
483 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
484 {
485 struct dvb_frontend *fe;
486 struct xc2028_ctrl ctl;
487 struct xc2028_config cfg = {
488 .i2c_adap = &dev->core->i2c_adap,
489 .i2c_addr = addr,
490 .ctrl = &ctl,
491 .callback = cx88_tuner_callback,
492 };
493
494 if (!dev->dvb.frontend) {
495 printk(KERN_ERR "%s/2: dvb frontend not attached. "
496 "Can't attach xc3028\n",
497 dev->core->name);
498 return -EINVAL;
499 }
500
501 /*
502 * Some xc3028 devices may be hidden by an I2C gate. This is known
503 * to happen with some s5h1409-based devices.
504 * Now that I2C gate is open, sets up xc3028 configuration
505 */
506 cx88_setup_xc3028(dev->core, &ctl);
507
508 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
509 if (!fe) {
510 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
511 dev->core->name);
512 return -EINVAL;
513 }
514
515 printk(KERN_INFO "%s/2: xc3028 attached\n",
516 dev->core->name);
517
518 return 0;
519 }
520
521 static int dvb_register(struct cx8802_dev *dev)
522 {
523 struct cx88_core *core = dev->core;
524
525 /* init struct videobuf_dvb */
526 dev->dvb.name = core->name;
527 dev->ts_gen_cntrl = 0x0c;
528
529 /* init frontend */
530 switch (core->boardnr) {
531 case CX88_BOARD_HAUPPAUGE_DVB_T1:
532 dev->dvb.frontend = dvb_attach(cx22702_attach,
533 &connexant_refboard_config,
534 &core->i2c_adap);
535 if (dev->dvb.frontend != NULL) {
536 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
537 0x61, &core->i2c_adap,
538 DVB_PLL_THOMSON_DTT759X))
539 goto frontend_detach;
540 }
541 break;
542 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
543 case CX88_BOARD_CONEXANT_DVB_T1:
544 case CX88_BOARD_KWORLD_DVB_T_CX22702:
545 case CX88_BOARD_WINFAST_DTV1000:
546 dev->dvb.frontend = dvb_attach(cx22702_attach,
547 &connexant_refboard_config,
548 &core->i2c_adap);
549 if (dev->dvb.frontend != NULL) {
550 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
551 0x60, &core->i2c_adap,
552 DVB_PLL_THOMSON_DTT7579))
553 goto frontend_detach;
554 }
555 break;
556 case CX88_BOARD_WINFAST_DTV2000H:
557 case CX88_BOARD_HAUPPAUGE_HVR1100:
558 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
559 case CX88_BOARD_HAUPPAUGE_HVR1300:
560 case CX88_BOARD_HAUPPAUGE_HVR3000:
561 dev->dvb.frontend = dvb_attach(cx22702_attach,
562 &hauppauge_hvr_config,
563 &core->i2c_adap);
564 if (dev->dvb.frontend != NULL) {
565 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
566 &core->i2c_adap, 0x61,
567 TUNER_PHILIPS_FMD1216ME_MK3))
568 goto frontend_detach;
569 }
570 break;
571 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
572 dev->dvb.frontend = dvb_attach(mt352_attach,
573 &dvico_fusionhdtv,
574 &core->i2c_adap);
575 if (dev->dvb.frontend != NULL) {
576 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
577 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
578 goto frontend_detach;
579 break;
580 }
581 /* ZL10353 replaces MT352 on later cards */
582 dev->dvb.frontend = dvb_attach(zl10353_attach,
583 &dvico_fusionhdtv_plus_v1_1,
584 &core->i2c_adap);
585 if (dev->dvb.frontend != NULL) {
586 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
587 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
588 goto frontend_detach;
589 }
590 break;
591 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
592 /* The tin box says DEE1601, but it seems to be DTT7579
593 * compatible, with a slightly different MT352 AGC gain. */
594 dev->dvb.frontend = dvb_attach(mt352_attach,
595 &dvico_fusionhdtv_dual,
596 &core->i2c_adap);
597 if (dev->dvb.frontend != NULL) {
598 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
599 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
600 goto frontend_detach;
601 break;
602 }
603 /* ZL10353 replaces MT352 on later cards */
604 dev->dvb.frontend = dvb_attach(zl10353_attach,
605 &dvico_fusionhdtv_plus_v1_1,
606 &core->i2c_adap);
607 if (dev->dvb.frontend != NULL) {
608 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
609 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
610 goto frontend_detach;
611 }
612 break;
613 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
614 dev->dvb.frontend = dvb_attach(mt352_attach,
615 &dvico_fusionhdtv,
616 &core->i2c_adap);
617 if (dev->dvb.frontend != NULL) {
618 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
619 0x61, NULL, DVB_PLL_LG_Z201))
620 goto frontend_detach;
621 }
622 break;
623 case CX88_BOARD_KWORLD_DVB_T:
624 case CX88_BOARD_DNTV_LIVE_DVB_T:
625 case CX88_BOARD_ADSTECH_DVB_T_PCI:
626 dev->dvb.frontend = dvb_attach(mt352_attach,
627 &dntv_live_dvbt_config,
628 &core->i2c_adap);
629 if (dev->dvb.frontend != NULL) {
630 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
631 0x61, NULL, DVB_PLL_UNKNOWN_1))
632 goto frontend_detach;
633 }
634 break;
635 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
636 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
637 /* MT352 is on a secondary I2C bus made from some GPIO lines */
638 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
639 &dev->vp3054->adap);
640 if (dev->dvb.frontend != NULL) {
641 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
642 &core->i2c_adap, 0x61,
643 TUNER_PHILIPS_FMD1216ME_MK3))
644 goto frontend_detach;
645 }
646 #else
647 printk(KERN_ERR "%s/2: built without vp3054 support\n",
648 core->name);
649 #endif
650 break;
651 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
652 dev->dvb.frontend = dvb_attach(zl10353_attach,
653 &dvico_fusionhdtv_hybrid,
654 &core->i2c_adap);
655 if (dev->dvb.frontend != NULL) {
656 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
657 &core->i2c_adap, 0x61,
658 TUNER_THOMSON_FE6600))
659 goto frontend_detach;
660 }
661 break;
662 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
663 dev->dvb.frontend = dvb_attach(zl10353_attach,
664 &dvico_fusionhdtv_xc3028,
665 &core->i2c_adap);
666 if (dev->dvb.frontend == NULL)
667 dev->dvb.frontend = dvb_attach(mt352_attach,
668 &dvico_fusionhdtv_mt352_xc3028,
669 &core->i2c_adap);
670 /*
671 * On this board, the demod provides the I2C bus pullup.
672 * We must not permit gate_ctrl to be performed, or
673 * the xc3028 cannot communicate on the bus.
674 */
675 if (dev->dvb.frontend)
676 dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
677 if (attach_xc3028(0x61, dev) < 0)
678 return -EINVAL;
679 break;
680 case CX88_BOARD_PCHDTV_HD3000:
681 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
682 &core->i2c_adap);
683 if (dev->dvb.frontend != NULL) {
684 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
685 &core->i2c_adap, 0x61,
686 TUNER_THOMSON_DTT761X))
687 goto frontend_detach;
688 }
689 break;
690 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
691 dev->ts_gen_cntrl = 0x08;
692
693 /* Do a hardware reset of chip before using it. */
694 cx_clear(MO_GP0_IO, 1);
695 mdelay(100);
696 cx_set(MO_GP0_IO, 1);
697 mdelay(200);
698
699 /* Select RF connector callback */
700 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
701 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
702 &fusionhdtv_3_gold,
703 &core->i2c_adap);
704 if (dev->dvb.frontend != NULL) {
705 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
706 &core->i2c_adap, 0x61,
707 TUNER_MICROTUNE_4042FI5))
708 goto frontend_detach;
709 }
710 break;
711 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
712 dev->ts_gen_cntrl = 0x08;
713
714 /* Do a hardware reset of chip before using it. */
715 cx_clear(MO_GP0_IO, 1);
716 mdelay(100);
717 cx_set(MO_GP0_IO, 9);
718 mdelay(200);
719 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
720 &fusionhdtv_3_gold,
721 &core->i2c_adap);
722 if (dev->dvb.frontend != NULL) {
723 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
724 &core->i2c_adap, 0x61,
725 TUNER_THOMSON_DTT761X))
726 goto frontend_detach;
727 }
728 break;
729 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
730 dev->ts_gen_cntrl = 0x08;
731
732 /* Do a hardware reset of chip before using it. */
733 cx_clear(MO_GP0_IO, 1);
734 mdelay(100);
735 cx_set(MO_GP0_IO, 1);
736 mdelay(200);
737 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
738 &fusionhdtv_5_gold,
739 &core->i2c_adap);
740 if (dev->dvb.frontend != NULL) {
741 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
742 &core->i2c_adap, 0x61,
743 TUNER_LG_TDVS_H06XF))
744 goto frontend_detach;
745 if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
746 &core->i2c_adap, 0x43))
747 goto frontend_detach;
748 }
749 break;
750 case CX88_BOARD_PCHDTV_HD5500:
751 dev->ts_gen_cntrl = 0x08;
752
753 /* Do a hardware reset of chip before using it. */
754 cx_clear(MO_GP0_IO, 1);
755 mdelay(100);
756 cx_set(MO_GP0_IO, 1);
757 mdelay(200);
758 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
759 &pchdtv_hd5500,
760 &core->i2c_adap);
761 if (dev->dvb.frontend != NULL) {
762 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
763 &core->i2c_adap, 0x61,
764 TUNER_LG_TDVS_H06XF))
765 goto frontend_detach;
766 if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
767 &core->i2c_adap, 0x43))
768 goto frontend_detach;
769 }
770 break;
771 case CX88_BOARD_ATI_HDTVWONDER:
772 dev->dvb.frontend = dvb_attach(nxt200x_attach,
773 &ati_hdtvwonder,
774 &core->i2c_adap);
775 if (dev->dvb.frontend != NULL) {
776 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
777 &core->i2c_adap, 0x61,
778 TUNER_PHILIPS_TUV1236D))
779 goto frontend_detach;
780 }
781 break;
782 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
783 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
784 dev->dvb.frontend = dvb_attach(cx24123_attach,
785 &hauppauge_novas_config,
786 &core->i2c_adap);
787 if (dev->dvb.frontend) {
788 if (!dvb_attach(isl6421_attach, dev->dvb.frontend,
789 &core->i2c_adap, 0x08, 0x00, 0x00))
790 goto frontend_detach;
791 }
792 break;
793 case CX88_BOARD_KWORLD_DVBS_100:
794 dev->dvb.frontend = dvb_attach(cx24123_attach,
795 &kworld_dvbs_100_config,
796 &core->i2c_adap);
797 if (dev->dvb.frontend) {
798 core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
799 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
800 }
801 break;
802 case CX88_BOARD_GENIATECH_DVBS:
803 dev->dvb.frontend = dvb_attach(cx24123_attach,
804 &geniatech_dvbs_config,
805 &core->i2c_adap);
806 if (dev->dvb.frontend) {
807 core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
808 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
809 }
810 break;
811 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
812 dev->dvb.frontend = dvb_attach(s5h1409_attach,
813 &pinnacle_pctv_hd_800i_config,
814 &core->i2c_adap);
815 if (dev->dvb.frontend != NULL) {
816 /* tuner_config.video_dev must point to
817 * i2c_adap.algo_data
818 */
819 if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
820 &core->i2c_adap,
821 &pinnacle_pctv_hd_800i_tuner_config,
822 core->i2c_adap.algo_data))
823 goto frontend_detach;
824 }
825 break;
826 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
827 dev->dvb.frontend = dvb_attach(s5h1409_attach,
828 &dvico_hdtv5_pci_nano_config,
829 &core->i2c_adap);
830 if (dev->dvb.frontend != NULL) {
831 struct dvb_frontend *fe;
832 struct xc2028_config cfg = {
833 .i2c_adap = &core->i2c_adap,
834 .i2c_addr = 0x61,
835 .callback = cx88_pci_nano_callback,
836 };
837 static struct xc2028_ctrl ctl = {
838 .fname = "xc3028-v27.fw",
839 .max_len = 64,
840 .scode_table = XC3028_FE_OREN538,
841 };
842
843 fe = dvb_attach(xc2028_attach,
844 dev->dvb.frontend, &cfg);
845 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
846 fe->ops.tuner_ops.set_config(fe, &ctl);
847 }
848 break;
849 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
850 dev->dvb.frontend = dvb_attach(zl10353_attach,
851 &cx88_geniatech_x8000_mt,
852 &core->i2c_adap);
853 if (attach_xc3028(0x61, dev) < 0)
854 goto frontend_detach;
855 break;
856 case CX88_BOARD_GENIATECH_X8000_MT:
857 dev->ts_gen_cntrl = 0x00;
858
859 dev->dvb.frontend = dvb_attach(zl10353_attach,
860 &cx88_geniatech_x8000_mt,
861 &core->i2c_adap);
862 if (attach_xc3028(0x61, dev) < 0)
863 goto frontend_detach;
864 break;
865 case CX88_BOARD_KWORLD_ATSC_120:
866 dev->dvb.frontend = dvb_attach(s5h1409_attach,
867 &kworld_atsc_120_config,
868 &core->i2c_adap);
869 if (attach_xc3028(0x61, dev) < 0)
870 goto frontend_detach;
871 break;
872 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
873 dev->dvb.frontend = dvb_attach(s5h1411_attach,
874 &dvico_fusionhdtv7_config,
875 &core->i2c_adap);
876 if (dev->dvb.frontend != NULL) {
877 /* tuner_config.video_dev must point to
878 * i2c_adap.algo_data
879 */
880 if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
881 &core->i2c_adap,
882 &dvico_fusionhdtv7_tuner_config,
883 core->i2c_adap.algo_data))
884 goto frontend_detach;
885 }
886 break;
887 default:
888 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
889 core->name);
890 break;
891 }
892 if (NULL == dev->dvb.frontend) {
893 printk(KERN_ERR
894 "%s/2: frontend initialization failed\n",
895 core->name);
896 return -EINVAL;
897 }
898
899 /* Ensure all frontends negotiate bus access */
900 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
901
902 /* Put the analog decoder in standby to keep it quiet */
903 cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
904
905 /* register everything */
906 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
907 &dev->pci->dev, adapter_nr);
908
909 frontend_detach:
910 if (dev->dvb.frontend) {
911 dvb_frontend_detach(dev->dvb.frontend);
912 dev->dvb.frontend = NULL;
913 }
914 return -EINVAL;
915 }
916
917 /* ----------------------------------------------------------- */
918
919 /* CX8802 MPEG -> mini driver - We have been given the hardware */
920 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
921 {
922 struct cx88_core *core = drv->core;
923 int err = 0;
924 dprintk( 1, "%s\n", __func__);
925
926 switch (core->boardnr) {
927 case CX88_BOARD_HAUPPAUGE_HVR1300:
928 /* We arrive here with either the cx23416 or the cx22702
929 * on the bus. Take the bus from the cx23416 and enable the
930 * cx22702 demod
931 */
932 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
933 cx_clear(MO_GP0_IO, 0x00000004);
934 udelay(1000);
935 break;
936 default:
937 err = -ENODEV;
938 }
939 return err;
940 }
941
942 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
943 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
944 {
945 struct cx88_core *core = drv->core;
946 int err = 0;
947 dprintk( 1, "%s\n", __func__);
948
949 switch (core->boardnr) {
950 case CX88_BOARD_HAUPPAUGE_HVR1300:
951 /* Do Nothing, leave the cx22702 on the bus. */
952 break;
953 default:
954 err = -ENODEV;
955 }
956 return err;
957 }
958
959 static int cx8802_dvb_probe(struct cx8802_driver *drv)
960 {
961 struct cx88_core *core = drv->core;
962 struct cx8802_dev *dev = drv->core->dvbdev;
963 int err;
964
965 dprintk( 1, "%s\n", __func__);
966 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
967 core->boardnr,
968 core->name,
969 core->pci_bus,
970 core->pci_slot);
971
972 err = -ENODEV;
973 if (!(core->board.mpeg & CX88_MPEG_DVB))
974 goto fail_core;
975
976 /* If vp3054 isn't enabled, a stub will just return 0 */
977 err = vp3054_i2c_probe(dev);
978 if (0 != err)
979 goto fail_core;
980
981 /* dvb stuff */
982 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
983 videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
984 &dev->pci->dev, &dev->slock,
985 V4L2_BUF_TYPE_VIDEO_CAPTURE,
986 V4L2_FIELD_TOP,
987 sizeof(struct cx88_buffer),
988 dev);
989 err = dvb_register(dev);
990 if (err != 0)
991 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
992 core->name, err);
993
994 fail_core:
995 return err;
996 }
997
998 static int cx8802_dvb_remove(struct cx8802_driver *drv)
999 {
1000 struct cx8802_dev *dev = drv->core->dvbdev;
1001
1002 /* dvb */
1003 if (dev->dvb.frontend)
1004 videobuf_dvb_unregister(&dev->dvb);
1005
1006 vp3054_i2c_remove(dev);
1007
1008 return 0;
1009 }
1010
1011 static struct cx8802_driver cx8802_dvb_driver = {
1012 .type_id = CX88_MPEG_DVB,
1013 .hw_access = CX8802_DRVCTL_SHARED,
1014 .probe = cx8802_dvb_probe,
1015 .remove = cx8802_dvb_remove,
1016 .advise_acquire = cx8802_dvb_advise_acquire,
1017 .advise_release = cx8802_dvb_advise_release,
1018 };
1019
1020 static int dvb_init(void)
1021 {
1022 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
1023 (CX88_VERSION_CODE >> 16) & 0xff,
1024 (CX88_VERSION_CODE >> 8) & 0xff,
1025 CX88_VERSION_CODE & 0xff);
1026 #ifdef SNAPSHOT
1027 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
1028 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1029 #endif
1030 return cx8802_register_driver(&cx8802_dvb_driver);
1031 }
1032
1033 static void dvb_fini(void)
1034 {
1035 cx8802_unregister_driver(&cx8802_dvb_driver);
1036 }
1037
1038 module_init(dvb_init);
1039 module_exit(dvb_fini);
1040
1041 /*
1042 * Local variables:
1043 * c-basic-offset: 8
1044 * compile-command: "make DVB=1"
1045 * End:
1046 */
Linux for Ginger Game Console