drivers/media/video/ov9640.h

   1 /*
   2  * drivers/media/video/ov9640.h
   3  *
   4  * Register definitions for the OmniVision OV9640 CameraChip.
   5  *
   6  * Author: Andy Lowe (source@mvista.com)
   7  *
   8  * Copyright (C) 2004 MontaVista Software, Inc.
   9  * Copyright (C) 2004 Texas Instruments.
  10  *
  11  * This file is licensed under the terms of the GNU General Public License
  12  * version 2. This program is licensed "as is" without any warranty of any
  13  * kind, whether express or implied.
  14  */
  15
  16 #ifndef OV9640_H
  17 #define OV9640_H
  18
  19 #define OV9640_I2C_ADDR         0x30
  20
  21 /* define register offsets for the OV9640 sensor chip */
  22 #define OV9640_GAIN             0x00
  23 #define OV9640_BLUE             0x01
  24 #define OV9640_RED              0x02
  25 #define OV9640_VREF             0x03
  26 #define OV9640_COM1             0x04
  27 #define OV9640_BAVE             0x05
  28 #define OV9640_GEAVE            0x06
  29 #define OV9640_RAVE             0x08
  30 #define OV9640_COM2             0x09
  31 #define OV9640_PID              0x0A
  32 #define OV9640_VER              0x0B
  33 #define OV9640_COM3             0x0C
  34 #define OV9640_COM4             0x0D
  35 #define OV9640_COM5             0x0E
  36 #define OV9640_COM6             0x0F
  37 #define OV9640_AECH             0x10
  38 #define OV9640_CLKRC            0x11
  39 #define OV9640_COM7             0x12
  40 #define OV9640_COM8             0x13
  41 #define OV9640_COM9             0x14
  42 #define OV9640_COM10            0x15
  43 #define OV9640_HSTRT            0x17
  44 #define OV9640_HSTOP            0x18
  45 #define OV9640_VSTRT            0x19
  46 #define OV9640_VSTOP            0x1A
  47 #define OV9640_PSHFT            0x1B
  48 #define OV9640_MIDH             0x1C
  49 #define OV9640_MIDL             0x1D
  50 #define OV9640_MVFP             0x1E
  51 #define OV9640_LAEC             0x1F
  52 #define OV9640_BOS              0x20
  53 #define OV9640_GBOS             0x21
  54 #define OV9640_GROS             0x22
  55 #define OV9640_ROS              0x23
  56 #define OV9640_AEW              0x24
  57 #define OV9640_AEB              0x25
  58 #define OV9640_VPT              0x26
  59 #define OV9640_BBIAS            0x27
  60 #define OV9640_GBBIAS           0x28
  61 #define OV9640_EXHCH            0x2A
  62 #define OV9640_EXHCL            0x2B
  63 #define OV9640_RBIAS            0x2C
  64 #define OV9640_ADVFL            0x2D
  65 #define OV9640_ADVFH            0x2E
  66 #define OV9640_YAVE             0x2F
  67 #define OV9640_HSYST            0x30
  68 #define OV9640_HSYEN            0x31
  69 #define OV9640_HREF             0x32
  70 #define OV9640_CHLF             0x33
  71 #define OV9640_ARBLM            0x34
  72 #define OV9640_ADC              0x37
  73 #define OV9640_ACOM             0x38
  74 #define OV9640_OFON             0x39
  75 #define OV9640_TSLB             0x3A
  76 #define OV9640_COM11            0x3B
  77 #define OV9640_COM12            0x3C
  78 #define OV9640_COM13            0x3D
  79 #define OV9640_COM14            0x3E
  80 #define OV9640_EDGE             0x3F
  81 #define OV9640_COM15            0x40
  82 #define OV9640_COM16            0x41
  83 #define OV9640_COM17            0x42
  84 #define OV9640_MTX1             0x4F
  85 #define OV9640_MTX2             0x50
  86 #define OV9640_MTX3             0x51
  87 #define OV9640_MTX4             0x52
  88 #define OV9640_MTX5             0x53
  89 #define OV9640_MTX6             0x54
  90 #define OV9640_MTX7             0x55
  91 #define OV9640_MTX8             0x56
  92 #define OV9640_MTX9             0x57
  93 #define OV9640_MTXS             0x58
  94 #define OV9640_LCC1             0x62
  95 #define OV9640_LCC2             0x63
  96 #define OV9640_LCC3             0x64
  97 #define OV9640_LCC4             0x65
  98 #define OV9640_LCC5             0x66
  99 #define OV9640_MANU             0x67
 100 #define OV9640_MANV             0x68
 101 #define OV9640_HV               0x69
 102 #define OV9640_MBD              0x6A
 103 #define OV9640_DBLV             0x6B
 104 #define OV9640_GSP1             0x6C
 105 #define OV9640_GSP2             0x6D
 106 #define OV9640_GSP3             0x6E
 107 #define OV9640_GSP4             0x6F
 108 #define OV9640_GSP5             0x70
 109 #define OV9640_GSP6             0x71
 110 #define OV9640_GSP7             0x72
 111 #define OV9640_GSP8             0x73
 112 #define OV9640_GSP9             0x74
 113 #define OV9640_GSP10            0x75
 114 #define OV9640_GSP11            0x76
 115 #define OV9640_GSP12            0x77
 116 #define OV9640_GSP13            0x78
 117 #define OV9640_GSP14            0x79
 118 #define OV9640_GSP15            0x7A
 119 #define OV9640_GSP16            0x7B
 120 #define OV9640_GST1             0x7C
 121 #define OV9640_GST2             0x7D
 122 #define OV9640_GST3             0x7E
 123 #define OV9640_GST4             0x7F
 124 #define OV9640_GST5             0x80
 125 #define OV9640_GST6             0x81
 126 #define OV9640_GST7             0x82
 127 #define OV9640_GST8             0x83
 128 #define OV9640_GST9             0x84
 129 #define OV9640_GST10            0x85
 130 #define OV9640_GST11            0x86
 131 #define OV9640_GST12            0x87
 132 #define OV9640_GST13            0x88
 133 #define OV9640_GST14            0x89
 134 #define OV9640_GST15            0x8A
 135
 136 #define OV9640_NUM_REGS         (OV9640_GST15 + 1)
 137
 138 #define OV9640_PID_MAGIC        0x96    /* high byte of product ID number */
 139 #define OV9640_VER_REV2         0x48    /* low byte of product ID number */
 140 #define OV9640_VER_REV3         0x49    /* low byte of product ID number */
 141 #define OV9640_MIDH_MAGIC       0x7F    /* high byte of mfg ID */
 142 #define OV9640_MIDL_MAGIC       0xA2    /* low byte of mfg ID */
 143
 144 #define OV9640_REG_TERM 0xFF    /* terminating list entry for reg */
 145 #define OV9640_VAL_TERM 0xFF    /* terminating list entry for val */
 146
 147 /*
 148  * The nominal xclk input frequency of the OV9640 is 24MHz, maximum
 149  * frequency is 48MHz, and minimum frequency is 10MHz.
 150  */
 151 #define OV9640_XCLK_MIN 10000000
 152 #define OV9640_XCLK_MAX 48000000
 153 #define OV9640_XCLK_NOM 24000000
 154
 155 /* define a structure for ov9640 register initialization values */
 156 struct ov9640_reg {
 157         unsigned char reg;
 158         unsigned char val;
 159 };
 160
 161 enum image_size { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA };
 162 enum pixel_format { YUV, RGB565, RGB555 };
 163
 164 #define NUM_IMAGE_SIZES 7
 165 #define NUM_PIXEL_FORMATS 3
 166
 167 struct capture_size {
 168         unsigned long width;
 169         unsigned long height;
 170 };
 171
 172 struct ov9640_platform_data {
 173         /* Set power state, zero is off, non-zero is on. */
 174         int (*power_set)(int power);
 175         /* Default registers written after power-on or reset. */
 176         const struct ov9640_reg *default_regs;
 177         int (*ifparm)(struct v4l2_ifparm *p);
 178 };
 179
 180 /*
 181  * Array of image sizes supported by OV9640.  These must be ordered from
 182  * smallest image size to largest.
 183  */
 184 const static struct capture_size ov9640_sizes[] = {
 185         {   88,  72 },  /* QQCIF */
 186         {  160, 120 },  /* QQVGA */
 187         {  176, 144 },  /* QCIF */
 188         {  320, 240 },  /* QVGA */
 189         {  352, 288 },  /* CIF */
 190         {  640, 480 },  /* VGA */
 191         { 1280, 960 },  /* SXGA */
 192 };
 193
 194 #endif /* ifndef OV9640_H */