drivers/mmc/host/at91_mci.c

   1 /*
   2  *  linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
   3  *
   4  *  Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
   5  *
   6  *  Copyright (C) 2006 Malcolm Noyes
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 /*
  14    This is the AT91 MCI driver that has been tested with both MMC cards
  15    and SD-cards.  Boards that support write protect are now supported.
  16    The CCAT91SBC001 board does not support SD cards.
  17
  18    The three entry points are at91_mci_request, at91_mci_set_ios
  19    and at91_mci_get_ro.
  20
  21    SET IOS
  22      This configures the device to put it into the correct mode and clock speed
  23      required.
  24
  25    MCI REQUEST
  26      MCI request processes the commands sent in the mmc_request structure. This
  27      can consist of a processing command and a stop command in the case of
  28      multiple block transfers.
  29
  30      There are three main types of request, commands, reads and writes.
  31
  32      Commands are straight forward. The command is submitted to the controller and
  33      the request function returns. When the controller generates an interrupt to indicate
  34      the command is finished, the response to the command are read and the mmc_request_done
  35      function called to end the request.
  36
  37      Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
  38      controller to manage the transfers.
  39
  40      A read is done from the controller directly to the scatterlist passed in from the request.
  41      Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
  42      swapped in the scatterlist buffers.  AT91SAM926x are not affected by this bug.
  43
  44      The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
  45
  46      A write is slightly different in that the bytes to write are read from the scatterlist
  47      into a dma memory buffer (this is in case the source buffer should be read only). The
  48      entire write buffer is then done from this single dma memory buffer.
  49
  50      The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
  51
  52    GET RO
  53      Gets the status of the write protect pin, if available.
  54 */
  55
  56 #include <linux/module.h>
  57 #include <linux/moduleparam.h>
  58 #include <linux/init.h>
  59 #include <linux/ioport.h>
  60 #include <linux/platform_device.h>
  61 #include <linux/interrupt.h>
  62 #include <linux/blkdev.h>
  63 #include <linux/delay.h>
  64 #include <linux/err.h>
  65 #include <linux/dma-mapping.h>
  66 #include <linux/clk.h>
  67 #include <linux/atmel_pdc.h>
  68
  69 #include <linux/mmc/host.h>
  70
  71 #include <asm/io.h>
  72 #include <asm/irq.h>
  73 #include <asm/gpio.h>
  74
  75 #include <asm/mach/mmc.h>
  76 #include <asm/arch/board.h>
  77 #include <asm/arch/cpu.h>
  78 #include <asm/arch/at91_mci.h>
  79
  80 #define DRIVER_NAME "at91_mci"
  81
  82 #define FL_SENT_COMMAND (1 << 0)
  83 #define FL_SENT_STOP    (1 << 1)
  84
  85 #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE       \
  86                 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE               \
  87                 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
  88
  89 #define at91_mci_read(host, reg)        __raw_readl((host)->baseaddr + (reg))
  90 #define at91_mci_write(host, reg, val)  __raw_writel((val), (host)->baseaddr + (reg))
  91
  92
  93 /*
  94  * Low level type for this driver
  95  */
  96 struct at91mci_host
  97 {
  98         struct mmc_host *mmc;
  99         struct mmc_command *cmd;
 100         struct mmc_request *request;
 101
 102         void __iomem *baseaddr;
 103         int irq;
 104
 105         struct at91_mmc_data *board;
 106         int present;
 107
 108         struct clk *mci_clk;
 109
 110         /*
 111          * Flag indicating when the command has been sent. This is used to
 112          * work out whether or not to send the stop
 113          */
 114         unsigned int flags;
 115         /* flag for current bus settings */
 116         u32 bus_mode;
 117
 118         /* DMA buffer used for transmitting */
 119         unsigned int* buffer;
 120         dma_addr_t physical_address;
 121         unsigned int total_length;
 122
 123         /* Latest in the scatterlist that has been enabled for transfer, but not freed */
 124         int in_use_index;
 125
 126         /* Latest in the scatterlist that has been enabled for transfer */
 127         int transfer_index;
 128 };
 129
 130 /*
 131  * Copy from sg to a dma block - used for transfers
 132  */
 133 static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
 134 {
 135         unsigned int len, i, size;
 136         unsigned *dmabuf = host->buffer;
 137
 138         size = host->total_length;
 139         len = data->sg_len;
 140
 141         /*
 142          * Just loop through all entries. Size might not
 143          * be the entire list though so make sure that
 144          * we do not transfer too much.
 145          */
 146         for (i = 0; i < len; i++) {
 147                 struct scatterlist *sg;
 148                 int amount;
 149                 unsigned int *sgbuffer;
 150
 151                 sg = &data->sg[i];
 152
 153                 sgbuffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 154                 amount = min(size, sg->length);
 155                 size -= amount;
 156
 157                 if (cpu_is_at91rm9200()) {      /* AT91RM9200 errata */
 158                         int index;
 159
 160                         for (index = 0; index < (amount / 4); index++)
 161                                 *dmabuf++ = swab32(sgbuffer[index]);
 162                 }
 163                 else
 164                         memcpy(dmabuf, sgbuffer, amount);
 165
 166                 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
 167
 168                 if (size == 0)
 169                         break;
 170         }
 171
 172         /*
 173          * Check that we didn't get a request to transfer
 174          * more data than can fit into the SG list.
 175          */
 176         BUG_ON(size != 0);
 177 }
 178
 179 /*
 180  * Prepare a dma read
 181  */
 182 static void at91_mci_pre_dma_read(struct at91mci_host *host)
 183 {
 184         int i;
 185         struct scatterlist *sg;
 186         struct mmc_command *cmd;
 187         struct mmc_data *data;
 188
 189         pr_debug("pre dma read\n");
 190
 191         cmd = host->cmd;
 192         if (!cmd) {
 193                 pr_debug("no command\n");
 194                 return;
 195         }
 196
 197         data = cmd->data;
 198         if (!data) {
 199                 pr_debug("no data\n");
 200                 return;
 201         }
 202
 203         for (i = 0; i < 2; i++) {
 204                 /* nothing left to transfer */
 205                 if (host->transfer_index >= data->sg_len) {
 206                         pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
 207                         break;
 208                 }
 209
 210                 /* Check to see if this needs filling */
 211                 if (i == 0) {
 212                         if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
 213                                 pr_debug("Transfer active in current\n");
 214                                 continue;
 215                         }
 216                 }
 217                 else {
 218                         if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
 219                                 pr_debug("Transfer active in next\n");
 220                                 continue;
 221                         }
 222                 }
 223
 224                 /* Setup the next transfer */
 225                 pr_debug("Using transfer index %d\n", host->transfer_index);
 226
 227                 sg = &data->sg[host->transfer_index++];
 228                 pr_debug("sg = %p\n", sg);
 229
 230                 sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
 231
 232                 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
 233
 234                 if (i == 0) {
 235                         at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
 236                         at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4);
 237                 }
 238                 else {
 239                         at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
 240                         at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4);
 241                 }
 242         }
 243
 244         pr_debug("pre dma read done\n");
 245 }
 246
 247 /*
 248  * Handle after a dma read
 249  */
 250 static void at91_mci_post_dma_read(struct at91mci_host *host)
 251 {
 252         struct mmc_command *cmd;
 253         struct mmc_data *data;
 254
 255         pr_debug("post dma read\n");
 256
 257         cmd = host->cmd;
 258         if (!cmd) {
 259                 pr_debug("no command\n");
 260                 return;
 261         }
 262
 263         data = cmd->data;
 264         if (!data) {
 265                 pr_debug("no data\n");
 266                 return;
 267         }
 268
 269         while (host->in_use_index < host->transfer_index) {
 270                 struct scatterlist *sg;
 271
 272                 pr_debug("finishing index %d\n", host->in_use_index);
 273
 274                 sg = &data->sg[host->in_use_index++];
 275
 276                 pr_debug("Unmapping page %08X\n", sg->dma_address);
 277
 278                 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
 279
 280                 data->bytes_xfered += sg->length;
 281
 282                 if (cpu_is_at91rm9200()) {      /* AT91RM9200 errata */
 283                         unsigned int *buffer;
 284                         int index;
 285
 286                         /* Swap the contents of the buffer */
 287                         buffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 288                         pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
 289
 290                         for (index = 0; index < (sg->length / 4); index++)
 291                                 buffer[index] = swab32(buffer[index]);
 292
 293                         kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 294                 }
 295
 296                 flush_dcache_page(sg_page(sg));
 297         }
 298
 299         /* Is there another transfer to trigger? */
 300         if (host->transfer_index < data->sg_len)
 301                 at91_mci_pre_dma_read(host);
 302         else {
 303                 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
 304                 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
 305         }
 306
 307         pr_debug("post dma read done\n");
 308 }
 309
 310 /*
 311  * Handle transmitted data
 312  */
 313 static void at91_mci_handle_transmitted(struct at91mci_host *host)
 314 {
 315         struct mmc_command *cmd;
 316         struct mmc_data *data;
 317
 318         pr_debug("Handling the transmit\n");
 319
 320         /* Disable the transfer */
 321         at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 322
 323         /* Now wait for cmd ready */
 324         at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
 325
 326         cmd = host->cmd;
 327         if (!cmd) return;
 328
 329         data = cmd->data;
 330         if (!data) return;
 331
 332         if (cmd->data->blocks > 1) {
 333                 pr_debug("multiple write : wait for BLKE...\n");
 334                 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
 335         } else
 336                 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
 337
 338         data->bytes_xfered = host->total_length;
 339 }
 340
 341 /*Handle after command sent ready*/
 342 static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
 343 {
 344         if (!host->cmd)
 345                 return 1;
 346         else if (!host->cmd->data) {
 347                 if (host->flags & FL_SENT_STOP) {
 348                         /*After multi block write, we must wait for NOTBUSY*/
 349                         at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
 350                 } else return 1;
 351         } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
 352                 /*After sendding multi-block-write command, start DMA transfer*/
 353                 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
 354                 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
 355                 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
 356         }
 357
 358         /* command not completed, have to wait */
 359         return 0;
 360 }
 361
 362
 363 /*
 364  * Enable the controller
 365  */
 366 static void at91_mci_enable(struct at91mci_host *host)
 367 {
 368         unsigned int mr;
 369
 370         at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
 371         at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
 372         at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
 373         mr = AT91_MCI_PDCMODE | 0x34a;
 374
 375         if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
 376                 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
 377
 378         at91_mci_write(host, AT91_MCI_MR, mr);
 379
 380         /* use Slot A or B (only one at same time) */
 381         at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
 382 }
 383
 384 /*
 385  * Disable the controller
 386  */
 387 static void at91_mci_disable(struct at91mci_host *host)
 388 {
 389         at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
 390 }
 391
 392 /*
 393  * Send a command
 394  */
 395 static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
 396 {
 397         unsigned int cmdr, mr;
 398         unsigned int block_length;
 399         struct mmc_data *data = cmd->data;
 400
 401         unsigned int blocks;
 402         unsigned int ier = 0;
 403
 404         host->cmd = cmd;
 405
 406         /* Needed for leaving busy state before CMD1 */
 407         if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
 408                 pr_debug("Clearing timeout\n");
 409                 at91_mci_write(host, AT91_MCI_ARGR, 0);
 410                 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
 411                 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
 412                         /* spin */
 413                         pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
 414                 }
 415         }
 416
 417         cmdr = cmd->opcode;
 418
 419         if (mmc_resp_type(cmd) == MMC_RSP_NONE)
 420                 cmdr |= AT91_MCI_RSPTYP_NONE;
 421         else {
 422                 /* if a response is expected then allow maximum response latancy */
 423                 cmdr |= AT91_MCI_MAXLAT;
 424                 /* set 136 bit response for R2, 48 bit response otherwise */
 425                 if (mmc_resp_type(cmd) == MMC_RSP_R2)
 426                         cmdr |= AT91_MCI_RSPTYP_136;
 427                 else
 428                         cmdr |= AT91_MCI_RSPTYP_48;
 429         }
 430
 431         if (data) {
 432
 433                 if ( data->blksz & 0x3 ) {
 434                         pr_debug("Unsupported block size\n");
 435                         cmd->error = -EINVAL;
 436                         mmc_request_done(host->mmc, host->request);
 437                         return;
 438                 }
 439
 440                 block_length = data->blksz;
 441                 blocks = data->blocks;
 442
 443                 /* always set data start - also set direction flag for read */
 444                 if (data->flags & MMC_DATA_READ)
 445                         cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
 446                 else if (data->flags & MMC_DATA_WRITE)
 447                         cmdr |= AT91_MCI_TRCMD_START;
 448
 449                 if (data->flags & MMC_DATA_STREAM)
 450                         cmdr |= AT91_MCI_TRTYP_STREAM;
 451                 if (data->blocks > 1)
 452                         cmdr |= AT91_MCI_TRTYP_MULTIPLE;
 453         }
 454         else {
 455                 block_length = 0;
 456                 blocks = 0;
 457         }
 458
 459         if (host->flags & FL_SENT_STOP)
 460                 cmdr |= AT91_MCI_TRCMD_STOP;
 461
 462         if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 463                 cmdr |= AT91_MCI_OPDCMD;
 464
 465         /*
 466          * Set the arguments and send the command
 467          */
 468         pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
 469                 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
 470
 471         if (!data) {
 472                 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
 473                 at91_mci_write(host, ATMEL_PDC_RPR, 0);
 474                 at91_mci_write(host, ATMEL_PDC_RCR, 0);
 475                 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
 476                 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
 477                 at91_mci_write(host, ATMEL_PDC_TPR, 0);
 478                 at91_mci_write(host, ATMEL_PDC_TCR, 0);
 479                 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
 480                 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
 481                 ier = AT91_MCI_CMDRDY;
 482         } else {
 483                 /* zero block length and PDC mode */
 484                 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
 485                 at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
 486
 487                 /*
 488                  * Disable the PDC controller
 489                  */
 490                 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 491
 492                 if (cmdr & AT91_MCI_TRCMD_START) {
 493                         data->bytes_xfered = 0;
 494                         host->transfer_index = 0;
 495                         host->in_use_index = 0;
 496                         if (cmdr & AT91_MCI_TRDIR) {
 497                                 /*
 498                                  * Handle a read
 499                                  */
 500                                 host->buffer = NULL;
 501                                 host->total_length = 0;
 502
 503                                 at91_mci_pre_dma_read(host);
 504                                 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
 505                         }
 506                         else {
 507                                 /*
 508                                  * Handle a write
 509                                  */
 510                                 host->total_length = block_length * blocks;
 511                                 host->buffer = dma_alloc_coherent(NULL,
 512                                                 host->total_length,
 513                                                 &host->physical_address, GFP_KERNEL);
 514
 515                                 at91_mci_sg_to_dma(host, data);
 516
 517                                 pr_debug("Transmitting %d bytes\n", host->total_length);
 518
 519                                 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
 520                                 at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
 521                                 ier = AT91_MCI_CMDRDY;
 522                         }
 523                 }
 524         }
 525
 526         /*
 527          * Send the command and then enable the PDC - not the other way round as
 528          * the data sheet says
 529          */
 530
 531         at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
 532         at91_mci_write(host, AT91_MCI_CMDR, cmdr);
 533
 534         if (cmdr & AT91_MCI_TRCMD_START) {
 535                 if (cmdr & AT91_MCI_TRDIR)
 536                         at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
 537         }
 538
 539         /* Enable selected interrupts */
 540         at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
 541 }
 542
 543 /*
 544  * Process the next step in the request
 545  */
 546 static void at91_mci_process_next(struct at91mci_host *host)
 547 {
 548         if (!(host->flags & FL_SENT_COMMAND)) {
 549                 host->flags |= FL_SENT_COMMAND;
 550                 at91_mci_send_command(host, host->request->cmd);
 551         }
 552         else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
 553                 host->flags |= FL_SENT_STOP;
 554                 at91_mci_send_command(host, host->request->stop);
 555         }
 556         else
 557                 mmc_request_done(host->mmc, host->request);
 558 }
 559
 560 /*
 561  * Handle a command that has been completed
 562  */
 563 static void at91_mci_completed_command(struct at91mci_host *host)
 564 {
 565         struct mmc_command *cmd = host->cmd;
 566         unsigned int status;
 567
 568         at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
 569
 570         cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
 571         cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
 572         cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
 573         cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
 574
 575         if (host->buffer) {
 576                 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
 577                 host->buffer = NULL;
 578         }
 579
 580         status = at91_mci_read(host, AT91_MCI_SR);
 581
 582         pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
 583                  status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
 584
 585         if (status & AT91_MCI_ERRORS) {
 586                 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
 587                         cmd->error = 0;
 588                 }
 589                 else {
 590                         if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
 591                                 cmd->error = -ETIMEDOUT;
 592                         else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
 593                                 cmd->error = -EILSEQ;
 594                         else
 595                                 cmd->error = -EIO;
 596
 597                         pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
 598                                  cmd->error, cmd->opcode, cmd->retries);
 599                 }
 600         }
 601         else
 602                 cmd->error = 0;
 603
 604         at91_mci_process_next(host);
 605 }
 606
 607 /*
 608  * Handle an MMC request
 609  */
 610 static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 611 {
 612         struct at91mci_host *host = mmc_priv(mmc);
 613         host->request = mrq;
 614         host->flags = 0;
 615
 616         at91_mci_process_next(host);
 617 }
 618
 619 /*
 620  * Set the IOS
 621  */
 622 static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 623 {
 624         int clkdiv;
 625         struct at91mci_host *host = mmc_priv(mmc);
 626         unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
 627
 628         host->bus_mode = ios->bus_mode;
 629
 630         if (ios->clock == 0) {
 631                 /* Disable the MCI controller */
 632                 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
 633                 clkdiv = 0;
 634         }
 635         else {
 636                 /* Enable the MCI controller */
 637                 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
 638
 639                 if ((at91_master_clock % (ios->clock * 2)) == 0)
 640                         clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
 641                 else
 642                         clkdiv = (at91_master_clock / ios->clock) / 2;
 643
 644                 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
 645                         at91_master_clock / (2 * (clkdiv + 1)));
 646         }
 647         if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
 648                 pr_debug("MMC: Setting controller bus width to 4\n");
 649                 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
 650         }
 651         else {
 652                 pr_debug("MMC: Setting controller bus width to 1\n");
 653                 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
 654         }
 655
 656         /* Set the clock divider */
 657         at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
 658
 659         /* maybe switch power to the card */
 660         if (host->board->vcc_pin) {
 661                 switch (ios->power_mode) {
 662                         case MMC_POWER_OFF:
 663                                 gpio_set_value(host->board->vcc_pin, 0);
 664                                 break;
 665                         case MMC_POWER_UP:
 666                                 gpio_set_value(host->board->vcc_pin, 1);
 667                                 break;
 668                         case MMC_POWER_ON:
 669                                 break;
 670                         default:
 671                                 WARN_ON(1);
 672                 }
 673         }
 674 }
 675
 676 /*
 677  * Handle an interrupt
 678  */
 679 static irqreturn_t at91_mci_irq(int irq, void *devid)
 680 {
 681         struct at91mci_host *host = devid;
 682         int completed = 0;
 683         unsigned int int_status, int_mask;
 684
 685         int_status = at91_mci_read(host, AT91_MCI_SR);
 686         int_mask = at91_mci_read(host, AT91_MCI_IMR);
 687
 688         pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
 689                 int_status & int_mask);
 690
 691         int_status = int_status & int_mask;
 692
 693         if (int_status & AT91_MCI_ERRORS) {
 694                 completed = 1;
 695
 696                 if (int_status & AT91_MCI_UNRE)
 697                         pr_debug("MMC: Underrun error\n");
 698                 if (int_status & AT91_MCI_OVRE)
 699                         pr_debug("MMC: Overrun error\n");
 700                 if (int_status & AT91_MCI_DTOE)
 701                         pr_debug("MMC: Data timeout\n");
 702                 if (int_status & AT91_MCI_DCRCE)
 703                         pr_debug("MMC: CRC error in data\n");
 704                 if (int_status & AT91_MCI_RTOE)
 705                         pr_debug("MMC: Response timeout\n");
 706                 if (int_status & AT91_MCI_RENDE)
 707                         pr_debug("MMC: Response end bit error\n");
 708                 if (int_status & AT91_MCI_RCRCE)
 709                         pr_debug("MMC: Response CRC error\n");
 710                 if (int_status & AT91_MCI_RDIRE)
 711                         pr_debug("MMC: Response direction error\n");
 712                 if (int_status & AT91_MCI_RINDE)
 713                         pr_debug("MMC: Response index error\n");
 714         } else {
 715                 /* Only continue processing if no errors */
 716
 717                 if (int_status & AT91_MCI_TXBUFE) {
 718                         pr_debug("TX buffer empty\n");
 719                         at91_mci_handle_transmitted(host);
 720                 }
 721
 722                 if (int_status & AT91_MCI_ENDRX) {
 723                         pr_debug("ENDRX\n");
 724                         at91_mci_post_dma_read(host);
 725                 }
 726
 727                 if (int_status & AT91_MCI_RXBUFF) {
 728                         pr_debug("RX buffer full\n");
 729                         at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 730                         at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
 731                         completed = 1;
 732                 }
 733
 734                 if (int_status & AT91_MCI_ENDTX)
 735                         pr_debug("Transmit has ended\n");
 736
 737                 if (int_status & AT91_MCI_NOTBUSY) {
 738                         pr_debug("Card is ready\n");
 739                         completed = 1;
 740                 }
 741
 742                 if (int_status & AT91_MCI_DTIP)
 743                         pr_debug("Data transfer in progress\n");
 744
 745                 if (int_status & AT91_MCI_BLKE) {
 746                         pr_debug("Block transfer has ended\n");
 747                         completed = 1;
 748                 }
 749
 750                 if (int_status & AT91_MCI_TXRDY)
 751                         pr_debug("Ready to transmit\n");
 752
 753                 if (int_status & AT91_MCI_RXRDY)
 754                         pr_debug("Ready to receive\n");
 755
 756                 if (int_status & AT91_MCI_CMDRDY) {
 757                         pr_debug("Command ready\n");
 758                         completed = at91_mci_handle_cmdrdy(host);
 759                 }
 760         }
 761
 762         if (completed) {
 763                 pr_debug("Completed command\n");
 764                 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
 765                 at91_mci_completed_command(host);
 766         } else
 767                 at91_mci_write(host, AT91_MCI_IDR, int_status);
 768
 769         return IRQ_HANDLED;
 770 }
 771
 772 static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
 773 {
 774         struct at91mci_host *host = _host;
 775         int present = !gpio_get_value(irq_to_gpio(irq));
 776
 777         /*
 778          * we expect this irq on both insert and remove,
 779          * and use a short delay to debounce.
 780          */
 781         if (present != host->present) {
 782                 host->present = present;
 783                 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
 784                         present ? "insert" : "remove");
 785                 if (!present) {
 786                         pr_debug("****** Resetting SD-card bus width ******\n");
 787                         at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
 788                 }
 789                 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
 790         }
 791         return IRQ_HANDLED;
 792 }
 793
 794 static int at91_mci_get_ro(struct mmc_host *mmc)
 795 {
 796         int read_only = 0;
 797         struct at91mci_host *host = mmc_priv(mmc);
 798
 799         if (host->board->wp_pin) {
 800                 read_only = gpio_get_value(host->board->wp_pin);
 801                 printk(KERN_WARNING "%s: card is %s\n", mmc_hostname(mmc),
 802                                 (read_only ? "read-only" : "read-write") );
 803         }
 804         else {
 805                 printk(KERN_WARNING "%s: host does not support reading read-only "
 806                                 "switch.  Assuming write-enable.\n", mmc_hostname(mmc));
 807         }
 808         return read_only;
 809 }
 810
 811 static const struct mmc_host_ops at91_mci_ops = {
 812         .request        = at91_mci_request,
 813         .set_ios        = at91_mci_set_ios,
 814         .get_ro         = at91_mci_get_ro,
 815 };
 816
 817 /*
 818  * Probe for the device
 819  */
 820 static int __init at91_mci_probe(struct platform_device *pdev)
 821 {
 822         struct mmc_host *mmc;
 823         struct at91mci_host *host;
 824         struct resource *res;
 825         int ret;
 826
 827         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 828         if (!res)
 829                 return -ENXIO;
 830
 831         if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
 832                 return -EBUSY;
 833
 834         mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
 835         if (!mmc) {
 836                 ret = -ENOMEM;
 837                 dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
 838                 goto fail6;
 839         }
 840
 841         mmc->ops = &at91_mci_ops;
 842         mmc->f_min = 375000;
 843         mmc->f_max = 25000000;
 844         mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
 845
 846         mmc->max_blk_size = 4095;
 847         mmc->max_blk_count = mmc->max_req_size;
 848
 849         host = mmc_priv(mmc);
 850         host->mmc = mmc;
 851         host->buffer = NULL;
 852         host->bus_mode = 0;
 853         host->board = pdev->dev.platform_data;
 854         if (host->board->wire4) {
 855                 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
 856                         mmc->caps |= MMC_CAP_4_BIT_DATA;
 857                 else
 858                         dev_warn(&pdev->dev, "4 wire bus mode not supported"
 859                                 " - using 1 wire\n");
 860         }
 861
 862         /*
 863          * Reserve GPIOs ... board init code makes sure these pins are set
 864          * up as GPIOs with the right direction (input, except for vcc)
 865          */
 866         if (host->board->det_pin) {
 867                 ret = gpio_request(host->board->det_pin, "mmc_detect");
 868                 if (ret < 0) {
 869                         dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
 870                         goto fail5;
 871                 }
 872         }
 873         if (host->board->wp_pin) {
 874                 ret = gpio_request(host->board->wp_pin, "mmc_wp");
 875                 if (ret < 0) {
 876                         dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
 877                         goto fail4;
 878                 }
 879         }
 880         if (host->board->vcc_pin) {
 881                 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
 882                 if (ret < 0) {
 883                         dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
 884                         goto fail3;
 885                 }
 886         }
 887
 888         /*
 889          * Get Clock
 890          */
 891         host->mci_clk = clk_get(&pdev->dev, "mci_clk");
 892         if (IS_ERR(host->mci_clk)) {
 893                 ret = -ENODEV;
 894                 dev_dbg(&pdev->dev, "no mci_clk?\n");
 895                 goto fail2;
 896         }
 897
 898         /*
 899          * Map I/O region
 900          */
 901         host->baseaddr = ioremap(res->start, res->end - res->start + 1);
 902         if (!host->baseaddr) {
 903                 ret = -ENOMEM;
 904                 goto fail1;
 905         }
 906
 907         /*
 908          * Reset hardware
 909          */
 910         clk_enable(host->mci_clk);              /* Enable the peripheral clock */
 911         at91_mci_disable(host);
 912         at91_mci_enable(host);
 913
 914         /*
 915          * Allocate the MCI interrupt
 916          */
 917         host->irq = platform_get_irq(pdev, 0);
 918         ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED,
 919                         mmc_hostname(mmc), host);
 920         if (ret) {
 921                 dev_dbg(&pdev->dev, "request MCI interrupt failed\n");
 922                 goto fail0;
 923         }
 924
 925         platform_set_drvdata(pdev, mmc);
 926
 927         /*
 928          * Add host to MMC layer
 929          */
 930         if (host->board->det_pin) {
 931                 host->present = !gpio_get_value(host->board->det_pin);
 932         }
 933         else
 934                 host->present = -1;
 935
 936         mmc_add_host(mmc);
 937
 938         /*
 939          * monitor card insertion/removal if we can
 940          */
 941         if (host->board->det_pin) {
 942                 ret = request_irq(gpio_to_irq(host->board->det_pin),
 943                                 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
 944                 if (ret)
 945                         dev_warn(&pdev->dev, "request MMC detect irq failed\n");
 946                 else
 947                         device_init_wakeup(&pdev->dev, 1);
 948         }
 949
 950         pr_debug("Added MCI driver\n");
 951
 952         return 0;
 953
 954 fail0:
 955         clk_disable(host->mci_clk);
 956         iounmap(host->baseaddr);
 957 fail1:
 958         clk_put(host->mci_clk);
 959 fail2:
 960         if (host->board->vcc_pin)
 961                 gpio_free(host->board->vcc_pin);
 962 fail3:
 963         if (host->board->wp_pin)
 964                 gpio_free(host->board->wp_pin);
 965 fail4:
 966         if (host->board->det_pin)
 967                 gpio_free(host->board->det_pin);
 968 fail5:
 969         mmc_free_host(mmc);
 970 fail6:
 971         release_mem_region(res->start, res->end - res->start + 1);
 972         dev_err(&pdev->dev, "probe failed, err %d\n", ret);
 973         return ret;
 974 }
 975
 976 /*
 977  * Remove a device
 978  */
 979 static int __exit at91_mci_remove(struct platform_device *pdev)
 980 {
 981         struct mmc_host *mmc = platform_get_drvdata(pdev);
 982         struct at91mci_host *host;
 983         struct resource *res;
 984
 985         if (!mmc)
 986                 return -1;
 987
 988         host = mmc_priv(mmc);
 989
 990         if (host->board->det_pin) {
 991                 if (device_can_wakeup(&pdev->dev))
 992                         free_irq(gpio_to_irq(host->board->det_pin), host);
 993                 device_init_wakeup(&pdev->dev, 0);
 994                 gpio_free(host->board->det_pin);
 995         }
 996
 997         at91_mci_disable(host);
 998         mmc_remove_host(mmc);
 999         free_irq(host->irq, host);
1000
1001         clk_disable(host->mci_clk);                     /* Disable the peripheral clock */
1002         clk_put(host->mci_clk);
1003
1004         if (host->board->vcc_pin)
1005                 gpio_free(host->board->vcc_pin);
1006         if (host->board->wp_pin)
1007                 gpio_free(host->board->wp_pin);
1008
1009         iounmap(host->baseaddr);
1010         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1011         release_mem_region(res->start, res->end - res->start + 1);
1012
1013         mmc_free_host(mmc);
1014         platform_set_drvdata(pdev, NULL);
1015         pr_debug("MCI Removed\n");
1016
1017         return 0;
1018 }
1019
1020 #ifdef CONFIG_PM
1021 static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1022 {
1023         struct mmc_host *mmc = platform_get_drvdata(pdev);
1024         struct at91mci_host *host = mmc_priv(mmc);
1025         int ret = 0;
1026
1027         if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1028                 enable_irq_wake(host->board->det_pin);
1029
1030         if (mmc)
1031                 ret = mmc_suspend_host(mmc, state);
1032
1033         return ret;
1034 }
1035
1036 static int at91_mci_resume(struct platform_device *pdev)
1037 {
1038         struct mmc_host *mmc = platform_get_drvdata(pdev);
1039         struct at91mci_host *host = mmc_priv(mmc);
1040         int ret = 0;
1041
1042         if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1043                 disable_irq_wake(host->board->det_pin);
1044
1045         if (mmc)
1046                 ret = mmc_resume_host(mmc);
1047
1048         return ret;
1049 }
1050 #else
1051 #define at91_mci_suspend        NULL
1052 #define at91_mci_resume         NULL
1053 #endif
1054
1055 static struct platform_driver at91_mci_driver = {
1056         .remove         = __exit_p(at91_mci_remove),
1057         .suspend        = at91_mci_suspend,
1058         .resume         = at91_mci_resume,
1059         .driver         = {
1060                 .name   = DRIVER_NAME,
1061                 .owner  = THIS_MODULE,
1062         },
1063 };
1064
1065 static int __init at91_mci_init(void)
1066 {
1067         return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1068 }
1069
1070 static void __exit at91_mci_exit(void)
1071 {
1072         platform_driver_unregister(&at91_mci_driver);
1073 }
1074
1075 module_init(at91_mci_init);
1076 module_exit(at91_mci_exit);
1077
1078 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1079 MODULE_AUTHOR("Nick Randell");
1080 MODULE_LICENSE("GPL");
1081 MODULE_ALIAS("platform:at91_mci");