PRCM: 34XX: Fix wrong shift value used in dpll4_m4x2_ck enable bit
[linux-ginger.git] / drivers / usb / host / ehci-omap.h
blobf75eda702a4db915f97351312d4a9cbee4071f2d
1 /*
2 * ehci-omap.h - register definitions for USBHOST in OMAP 34xx
4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
5 * Author: Vikram Pandita <vikram.pandita@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifndef __EHCI_OMAP_H
24 #define __EHCI_OMAP_H
26 #include <asm/hardware.h>
27 #include "../../../arch/arm/mach-omap2/cm.h"
28 #include "../../../arch/arm/mach-omap2/cm-regbits-34xx.h"
31 * OMAP USBHOST Register addresses: PHYSICAL ADDRESSES
32 * Use omap_readl()/omap_writel() functions
35 /* USBHOST: TLL, UUH, OHCI, EHCI */
36 #define OMAP_USBHOST_BASE (L4_34XX_BASE + 0x60000)
38 /* TLL Register Set */
39 #define OMAP_USBHOST_TLL_BASE (OMAP_USBHOST_BASE + 0x2000)
40 #define OMAP_USBTLL_REVISION (OMAP_USBHOST_TLL_BASE + 0x00)
41 #define OMAP_USBTLL_SYSCONFIG (OMAP_USBHOST_TLL_BASE + 0x10)
42 #define OMAP_USBTLL_SYSCONFIG_CACTIVITY_SHIFT 8
43 #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE_SHIFT 3
44 #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP_SHIFT 2
45 #define OMAP_USBTLL_SYSCONFIG_SOFTRESET_SHIFT 1
46 #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE_SHIFT 0
47 #define OMAP_USBTLL_SYSSTATUS (OMAP_USBHOST_TLL_BASE + 0x14)
48 #define OMAP_USBTLL_SYSSTATUS_RESETDONE_SHIFT 0
49 #define OMAP_USBTLL_IRQSTATUS (OMAP_USBHOST_TLL_BASE + 0x18)
50 #define OMAP_USBTLL_IRQENABLE (OMAP_USBHOST_TLL_BASE + 0x1C)
52 #define OMAP_TLL_SHARED_CONF (OMAP_USBHOST_TLL_BASE + 0x30)
53 #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN_SHFT 6
54 #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN_SHIFT 5
55 #define OMAP_TLL_SHARED_CONF_USB_DIVRATION_SHIFT 2
56 #define OMAP_TLL_SHARED_CONF_FCLK_REQ_SHIFT 1
57 #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON_SHIFT 0
59 #define OMAP_TLL_CHANNEL_CONF(num)\
60 (OMAP_USBHOST_TLL_BASE + (0x040 + 0x004 * num))
61 #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF_SHIFT 11
62 #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE_SHIFT 10
63 #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE_SHIFT 9
64 #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE_SHIFT 8
65 #define OMAP_TLL_CHANNEL_CONF_CHANEN_SHIFT 0
67 #define OMAP_TLL_ULPI_FUNCTION_CTRL(num)\
68 (OMAP_USBHOST_TLL_BASE + (0x804 + 0x100 * num))
69 #define OMAP_TLL_ULPI_INTERFACE_CTRL(num)\
70 (OMAP_USBHOST_TLL_BASE + (0x807 + 0x100 * num))
71 #define OMAP_TLL_ULPI_OTG_CTRL(num)\
72 (OMAP_USBHOST_TLL_BASE + (0x80A + 0x100 * num))
73 #define OMAP_TLL_ULPI_INT_EN_RISE(num)\
74 (OMAP_USBHOST_TLL_BASE + (0x80D + 0x100 * num))
75 #define OMAP_TLL_ULPI_INT_EN_FALL(num)\
76 (OMAP_USBHOST_TLL_BASE + (0x810 + 0x100 * num))
77 #define OMAP_TLL_ULPI_INT_STATUS(num)\
78 (OMAP_USBHOST_TLL_BASE + (0x813 + 0x100 * num))
79 #define OMAP_TLL_ULPI_INT_LATCH(num)\
80 (OMAP_USBHOST_TLL_BASE + (0x814 + 0x100 * num))
81 #define OMAP_TLL_ULPI_DEBUG(num)\
82 (OMAP_USBHOST_TLL_BASE + (0x815 + 0x100 * num))
83 #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num)\
84 (OMAP_USBHOST_TLL_BASE + (0x816 + 0x100 * num))
86 #define OMAP_TLL_CHANNEL_COUNT 3
87 #define OMAP_TLL_CHANNEL_1_EN_MASK 1
88 #define OMAP_TLL_CHANNEL_2_EN_MASK 2
89 #define OMAP_TLL_CHANNEL_3_EN_MASK 4
91 /* UHH Register Set */
92 #define OMAP_USBHOST_UHH_BASE (OMAP_USBHOST_BASE + 0x4000)
93 #define OMAP_UHH_REVISION (OMAP_USBHOST_UHH_BASE + 0x00)
94 #define OMAP_UHH_SYSCONFIG (OMAP_USBHOST_UHH_BASE + 0x10)
95 #define OMAP_UHH_SYSCONFIG_MIDLEMODE_SHIFT 12
96 #define OMAP_UHH_SYSCONFIG_CACTIVITY_SHIFT 8
97 #define OMAP_UHH_SYSCONFIG_SIDLEMODE_SHIFT 3
98 #define OMAP_UHH_SYSCONFIG_ENAWAKEUP_SHIFT 2
99 #define OMAP_UHH_SYSCONFIG_SOFTRESET_SHIFT 1
100 #define OMAP_UHH_SYSCONFIG_AUTOIDLE_SHIFT 0
102 #define OMAP_UHH_SYSSTATUS (OMAP_USBHOST_UHH_BASE + 0x14)
103 #define OMAP_UHH_HOSTCONFIG (OMAP_USBHOST_UHH_BASE + 0x40)
104 #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS_SHIFT 0
105 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN_SHIFT 2
106 #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN_SHIFT 3
107 #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN_SHIFT 4
108 #define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN_SHIFT 5
110 #define OMAP_UHH_DEBUG_CSR (OMAP_USBHOST_UHH_BASE + 0x44)
112 /* EHCI Register Set */
113 #define OMAP_USBHOST_EHCI_BASE (OMAP_USBHOST_BASE + 0x4800)
114 #define EHCI_INSNREG05_ULPI (OMAP_USBHOST_EHCI_BASE + 0xA4)
115 #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT 31
116 #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT 24
117 #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT 22
118 #define EHCI_INSNREG05_ULPI_REGADD_SHIFT 16
119 #define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT 8
120 #define EHCI_INSNREG05_ULPI_WRDATA_SHIFT 0
122 /* OHCI Register Set */
123 #define OMAP_USBHOST_OHCI_BASE (OMAP_USBHOST_BASE + 0x4400)
125 #endif/* __EHCI_OMAP_H*/