arch/xtensa/include/asm/processor.h

   1 /*
   2  * include/asm-xtensa/processor.h
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2005 Tensilica Inc.
   9  */
  10
  11 #ifndef _XTENSA_PROCESSOR_H
  12 #define _XTENSA_PROCESSOR_H
  13
  14 #include <variant/core.h>
  15 #include <asm/coprocessor.h>
  16 #include <platform/hardware.h>
  17
  18 #include <linux/compiler.h>
  19 #include <asm/ptrace.h>
  20 #include <asm/types.h>
  21 #include <asm/regs.h>
  22
  23 /* Assertions. */
  24
  25 #if (XCHAL_HAVE_WINDOWED != 1)
  26 # error Linux requires the Xtensa Windowed Registers Option.
  27 #endif
  28
  29 #define ARCH_SLAB_MINALIGN      XCHAL_DATA_WIDTH
  30
  31 /*
  32  * User space process size: 1 GB.
  33  * Windowed call ABI requires caller and callee to be located within the same
  34  * 1 GB region. The C compiler places trampoline code on the stack for sources
  35  * that take the address of a nested C function (a feature used by glibc), so
  36  * the 1 GB requirement applies to the stack as well.
  37  */
  38
  39 #ifdef CONFIG_MMU
  40 #define TASK_SIZE       __XTENSA_UL_CONST(0x40000000)
  41 #else
  42 #define TASK_SIZE       (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
  43 #endif
  44
  45 #define STACK_TOP       TASK_SIZE
  46 #define STACK_TOP_MAX   STACK_TOP
  47
  48 /*
  49  * General exception cause assigned to debug exceptions. Debug exceptions go
  50  * to their own vector, rather than the general exception vectors (user,
  51  * kernel, double); and their specific causes are reported via DEBUGCAUSE
  52  * rather than EXCCAUSE.  However it is sometimes convenient to redirect debug
  53  * exceptions to the general exception mechanism.  To do this, an otherwise
  54  * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
  55  */
  56
  57 #define EXCCAUSE_MAPPED_DEBUG   63
  58
  59 /*
  60  * We use DEPC also as a flag to distinguish between double and regular
  61  * exceptions. For performance reasons, DEPC might contain the value of
  62  * EXCCAUSE for regular exceptions, so we use this definition to mark a
  63  * valid double exception address.
  64  * (Note: We use it in bgeui, so it should be 64, 128, or 256)
  65  */
  66
  67 #define VALID_DOUBLE_EXCEPTION_ADDRESS  64
  68
  69 /* LOCKLEVEL defines the interrupt level that masks all
  70  * general-purpose interrupts.
  71  */
  72 #define LOCKLEVEL 1
  73
  74 /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
  75  * registers
  76  */
  77 #define WSBITS  (XCHAL_NUM_AREGS / 4)      /* width of WINDOWSTART in bits */
  78 #define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
  79
  80 #ifndef __ASSEMBLY__
  81
  82 /* Build a valid return address for the specified call winsize.
  83  * winsize must be 1 (call4), 2 (call8), or 3 (call12)
  84  */
  85 #define MAKE_RA_FOR_CALL(ra,ws)   (((ra) & 0x3fffffff) | (ws) << 30)
  86
  87 /* Convert return address to a valid pc
  88  * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
  89  */
  90 #define MAKE_PC_FROM_RA(ra,sp)    (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
  91
  92 typedef struct {
  93     unsigned long seg;
  94 } mm_segment_t;
  95
  96 struct thread_struct {
  97
  98         /* kernel's return address and stack pointer for context switching */
  99         unsigned long ra; /* kernel's a0: return address and window call size */
 100         unsigned long sp; /* kernel's a1: stack pointer */
 101
 102         mm_segment_t current_ds;    /* see uaccess.h for example uses */
 103
 104         /* struct xtensa_cpuinfo info; */
 105
 106         unsigned long bad_vaddr; /* last user fault */
 107         unsigned long bad_uaddr; /* last kernel fault accessing user space */
 108         unsigned long error_code;
 109
 110         unsigned long ibreak[XCHAL_NUM_IBREAK];
 111         unsigned long dbreaka[XCHAL_NUM_DBREAK];
 112         unsigned long dbreakc[XCHAL_NUM_DBREAK];
 113
 114         /* Make structure 16 bytes aligned. */
 115         int align[0] __attribute__ ((aligned(16)));
 116 };
 117
 118
 119 /*
 120  * Default implementation of macro that returns current
 121  * instruction pointer ("program counter").
 122  */
 123 #define current_text_addr()  ({ __label__ _l; _l: &&_l;})
 124
 125
 126 /* This decides where the kernel will search for a free chunk of vm
 127  * space during mmap's.
 128  */
 129 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 2)
 130
 131 #define INIT_THREAD  \
 132 {                                                                       \
 133         ra:             0,                                              \
 134         sp:             sizeof(init_stack) + (long) &init_stack,        \
 135         current_ds:     {0},                                            \
 136         /*info:         {0}, */                                         \
 137         bad_vaddr:      0,                                              \
 138         bad_uaddr:      0,                                              \
 139         error_code:     0,                                              \
 140 }
 141
 142
 143 /*
 144  * Do necessary setup to start up a newly executed thread.
 145  * Note: We set-up ps as if we did a call4 to the new pc.
 146  *       set_thread_state in signal.c depends on it.
 147  */
 148 #define USER_PS_VALUE ((1 << PS_WOE_BIT) |                              \
 149                        (1 << PS_CALLINC_SHIFT) |                        \
 150                        (USER_RING << PS_RING_SHIFT) |                   \
 151                        (1 << PS_UM_BIT) |                               \
 152                        (1 << PS_EXCM_BIT))
 153
 154 /* Clearing a0 terminates the backtrace. */
 155 #define start_thread(regs, new_pc, new_sp) \
 156         regs->pc = new_pc; \
 157         regs->ps = USER_PS_VALUE; \
 158         regs->areg[1] = new_sp; \
 159         regs->areg[0] = 0; \
 160         regs->wmask = 1; \
 161         regs->depc = 0; \
 162         regs->windowbase = 0; \
 163         regs->windowstart = 1;
 164
 165 /* Forward declaration */
 166 struct task_struct;
 167 struct mm_struct;
 168
 169 /* Free all resources held by a thread. */
 170 #define release_thread(thread) do { } while(0)
 171
 172 /* Prepare to copy thread state - unlazy all lazy status */
 173 extern void prepare_to_copy(struct task_struct*);
 174
 175 /* Create a kernel thread without removing it from tasklists */
 176 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 177
 178 /* Copy and release all segment info associated with a VM */
 179 #define copy_segments(p, mm)    do { } while(0)
 180 #define release_segments(mm)    do { } while(0)
 181 #define forget_segments()       do { } while (0)
 182
 183 #define thread_saved_pc(tsk)    (task_pt_regs(tsk)->pc)
 184
 185 extern unsigned long get_wchan(struct task_struct *p);
 186
 187 #define KSTK_EIP(tsk)           (task_pt_regs(tsk)->pc)
 188 #define KSTK_ESP(tsk)           (task_pt_regs(tsk)->areg[1])
 189
 190 #define cpu_relax()  barrier()
 191
 192 /* Special register access. */
 193
 194 #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
 195 #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
 196
 197 #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
 198 #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
 199
 200 #endif  /* __ASSEMBLY__ */
 201 #endif  /* _XTENSA_PROCESSOR_H */