arch/mips/au1000/pb1500/board_setup.c

   1 /*
   2  * Copyright 2000 MontaVista Software Inc.
   3  * Author: MontaVista Software, Inc.
   4  *              ppopov@mvista.com or source@mvista.com
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  12  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  14  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  17  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  19  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the  GNU General Public License along
  23  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/delay.h>
  29
  30 #include <asm/mach-au1x00/au1000.h>
  31 #include <asm/mach-pb1x00/pb1500.h>
  32
  33 void board_reset(void)
  34 {
  35     /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
  36     au_writel(0x00000000, 0xAE00001C);
  37 }
  38
  39 void __init board_setup(void)
  40 {
  41         u32 pin_func;
  42         u32 sys_freqctrl, sys_clksrc;
  43
  44         sys_clksrc = sys_freqctrl = pin_func = 0;
  45         // set AUX clock to 12MHz * 8 = 96 MHz
  46         au_writel(8, SYS_AUXPLL);
  47         au_writel(0, SYS_PINSTATERD);
  48         udelay(100);
  49
  50 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  51
  52         /* GPIO201 is input for PCMCIA card detect */
  53         /* GPIO203 is input for PCMCIA interrupt request */
  54         au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
  55
  56         /* zero and disable FREQ2 */
  57         sys_freqctrl = au_readl(SYS_FREQCTRL0);
  58         sys_freqctrl &= ~0xFFF00000;
  59         au_writel(sys_freqctrl, SYS_FREQCTRL0);
  60
  61         /* zero and disable USBH/USBD clocks */
  62         sys_clksrc = au_readl(SYS_CLKSRC);
  63         sys_clksrc &= ~0x00007FE0;
  64         au_writel(sys_clksrc, SYS_CLKSRC);
  65
  66         sys_freqctrl = au_readl(SYS_FREQCTRL0);
  67         sys_freqctrl &= ~0xFFF00000;
  68
  69         sys_clksrc = au_readl(SYS_CLKSRC);
  70         sys_clksrc &= ~0x00007FE0;
  71
  72         // FREQ2 = aux/2 = 48 MHz
  73         sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
  74         au_writel(sys_freqctrl, SYS_FREQCTRL0);
  75
  76         /*
  77          * Route 48MHz FREQ2 into USB Host and/or Device
  78          */
  79 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  80         sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
  81 #endif
  82         au_writel(sys_clksrc, SYS_CLKSRC);
  83
  84
  85         pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
  86         // 2nd USB port is USB host
  87         pin_func |= 0x8000;
  88         au_writel(pin_func, SYS_PINFUNC);
  89 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
  90
  91
  92
  93 #ifdef CONFIG_PCI
  94         // Setup PCI bus controller
  95         au_writel(0, Au1500_PCI_CMEM);
  96         au_writel(0x00003fff, Au1500_CFG_BASE);
  97 #if defined(__MIPSEB__)
  98         au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
  99 #else
 100         au_writel(0xf, Au1500_PCI_CFG);
 101 #endif
 102         au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
 103         au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
 104         au_writel(0x02a00356, Au1500_PCI_STATCMD);
 105         au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
 106         au_writel(0x00000008, Au1500_PCI_MBAR);
 107         au_sync();
 108 #endif
 109
 110         /* Enable sys bus clock divider when IDLE state or no bus activity. */
 111         au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
 112
 113         /* Enable the RTC if not already enabled */
 114         if (!(au_readl(0xac000028) & 0x20)) {
 115                 printk("enabling clock ...\n");
 116                 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
 117         }
 118         /* Put the clock in BCD mode */
 119         if (au_readl(0xac00002C) & 0x4) { /* reg B */
 120                 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
 121                 au_sync();
 122         }
 123 }