OMAP: DISPC: Fix to disable also interface clocks. 2nd.
[linux-ginger.git] / arch / sparc / kernel / cpu.c
blobe7a0edfc1a32532823d315a78deb6f1585a35502
1 /* cpu.c: Dinky routines to look for the kind of Sparc cpu
2 * we are on.
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 */
7 #include <linux/kernel.h>
8 #include <linux/init.h>
9 #include <linux/smp.h>
10 #include <linux/threads.h>
11 #include <asm/oplib.h>
12 #include <asm/page.h>
13 #include <asm/head.h>
14 #include <asm/psr.h>
15 #include <asm/mbus.h>
16 #include <asm/cpudata.h>
18 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
20 struct cpu_iu_info {
21 int psr_impl;
22 int psr_vers;
23 char* cpu_name; /* should be enough I hope... */
26 struct cpu_fp_info {
27 int psr_impl;
28 int fp_vers;
29 char* fp_name;
32 /* In order to get the fpu type correct, you need to take the IDPROM's
33 * machine type value into consideration too. I will fix this.
35 static struct cpu_fp_info linux_sparc_fpu[] = {
36 { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
37 { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
38 { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
39 /* SparcStation SLC, SparcStation1 */
40 { 0, 3, "Weitek WTL3170/2"},
41 /* SPARCstation-5 */
42 { 0, 4, "Lsi Logic/Meiko L64804 or compatible"},
43 { 0, 5, "reserved"},
44 { 0, 6, "reserved"},
45 { 0, 7, "No FPU"},
46 { 1, 0, "ROSS HyperSparc combined IU/FPU"},
47 { 1, 1, "Lsi Logic L64814"},
48 { 1, 2, "Texas Instruments TMS390-C602A"},
49 { 1, 3, "Cypress CY7C602 FPU"},
50 { 1, 4, "reserved"},
51 { 1, 5, "reserved"},
52 { 1, 6, "reserved"},
53 { 1, 7, "No FPU"},
54 { 2, 0, "BIT B5010 or B5110/20 or B5210"},
55 { 2, 1, "reserved"},
56 { 2, 2, "reserved"},
57 { 2, 3, "reserved"},
58 { 2, 4, "reserved"},
59 { 2, 5, "reserved"},
60 { 2, 6, "reserved"},
61 { 2, 7, "No FPU"},
62 /* SuperSparc 50 module */
63 { 4, 0, "SuperSparc on-chip FPU"},
64 /* SparcClassic */
65 { 4, 4, "TI MicroSparc on chip FPU"},
66 { 5, 0, "Matsushita MN10501"},
67 { 5, 1, "reserved"},
68 { 5, 2, "reserved"},
69 { 5, 3, "reserved"},
70 { 5, 4, "reserved"},
71 { 5, 5, "reserved"},
72 { 5, 6, "reserved"},
73 { 5, 7, "No FPU"},
74 { 9, 3, "Fujitsu or Weitek on-chip FPU"},
77 #define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
79 static struct cpu_iu_info linux_sparc_chips[] = {
80 /* Sun4/100, 4/200, SLC */
81 { 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"},
82 /* borned STP1012PGA */
83 { 0, 4, "Fujitsu MB86904"},
84 { 0, 5, "Fujitsu TurboSparc MB86907"},
85 /* SparcStation2, SparcServer 490 & 690 */
86 { 1, 0, "LSI Logic Corporation - L64811"},
87 /* SparcStation2 */
88 { 1, 1, "Cypress/ROSS CY7C601"},
89 /* Embedded controller */
90 { 1, 3, "Cypress/ROSS CY7C611"},
91 /* Ross Technologies HyperSparc */
92 { 1, 0xf, "ROSS HyperSparc RT620"},
93 { 1, 0xe, "ROSS HyperSparc RT625 or RT626"},
94 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
95 /* Someone please write the code to support this beast! ;) */
96 { 2, 0, "Bipolar Integrated Technology - B5010"},
97 { 3, 0, "LSI Logic Corporation - unknown-type"},
98 { 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"},
99 /* SparcClassic -- borned STP1010TAB-50*/
100 { 4, 1, "Texas Instruments, Inc. - MicroSparc"},
101 { 4, 2, "Texas Instruments, Inc. - MicroSparc II"},
102 { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"},
103 { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"},
104 { 4, 5, "Texas Instruments, Inc. - unknown"},
105 { 5, 0, "Matsushita - MN10501"},
106 { 6, 0, "Philips Corporation - unknown"},
107 { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"},
108 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
109 { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"},
110 { 9, 0, "Fujitsu or Weitek Power-UP"},
111 { 9, 1, "Fujitsu or Weitek Power-UP"},
112 { 9, 2, "Fujitsu or Weitek Power-UP"},
113 { 9, 3, "Fujitsu or Weitek Power-UP"},
114 { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"},
115 { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"},
116 { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"},
117 { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"},
118 { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"},
119 { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
122 #define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
124 char *sparc_cpu_type;
125 char *sparc_fpu_type;
127 unsigned int fsr_storage;
129 void __init cpu_probe(void)
131 int psr_impl, psr_vers, fpu_vers;
132 int i, psr;
134 psr_impl = ((get_psr()>>28)&0xf);
135 psr_vers = ((get_psr()>>24)&0xf);
137 psr = get_psr();
138 put_psr(psr | PSR_EF);
139 fpu_vers = ((get_fsr()>>17)&0x7);
140 put_psr(psr);
142 for(i = 0; i<NSPARCCHIPS; i++) {
143 if(linux_sparc_chips[i].psr_impl == psr_impl)
144 if(linux_sparc_chips[i].psr_vers == psr_vers) {
145 sparc_cpu_type = linux_sparc_chips[i].cpu_name;
146 break;
150 if(i==NSPARCCHIPS)
151 printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl,
152 psr_vers);
154 for(i = 0; i<NSPARCFPU; i++) {
155 if(linux_sparc_fpu[i].psr_impl == psr_impl)
156 if(linux_sparc_fpu[i].fp_vers == fpu_vers) {
157 sparc_fpu_type = linux_sparc_fpu[i].fp_name;
158 break;
162 if(i == NSPARCFPU) {
163 printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl,
164 fpu_vers);
165 sparc_fpu_type = linux_sparc_fpu[31].fp_name;