2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
24 # define save_i387_ia32 save_i387
25 # define restore_i387_ia32 restore_i387
26 # define _fpstate_ia32 _fpstate
27 # define user_i387_ia32_struct user_i387_struct
28 # define user32_fxsr_struct user_fxsr_struct
31 #ifdef CONFIG_MATH_EMULATION
32 # define HAVE_HWFP (boot_cpu_data.hard_math)
37 static unsigned int mxcsr_feature_mask __read_mostly
= 0xffffffffu
;
38 unsigned int xstate_size
;
39 static struct i387_fxsave_struct fx_scratch __cpuinitdata
;
41 void __cpuinit
mxcsr_feature_mask_init(void)
43 unsigned long mask
= 0;
47 memset(&fx_scratch
, 0, sizeof(struct i387_fxsave_struct
));
48 asm volatile("fxsave %0" : : "m" (fx_scratch
));
49 mask
= fx_scratch
.mxcsr_mask
;
53 mxcsr_feature_mask
&= mask
;
57 void __init
init_thread_xstate(void)
60 xstate_size
= sizeof(struct i387_soft_struct
);
65 xstate_size
= sizeof(struct i387_fxsave_struct
);
68 xstate_size
= sizeof(struct i387_fsave_struct
);
74 * Called at bootup to set up the initial FPU state that is later cloned
77 void __cpuinit
fpu_init(void)
79 unsigned long oldcr0
= read_cr0();
81 set_in_cr4(X86_CR4_OSFXSR
);
82 set_in_cr4(X86_CR4_OSXMMEXCPT
);
84 write_cr0(oldcr0
& ~(X86_CR0_TS
|X86_CR0_EM
)); /* clear TS and EM */
86 mxcsr_feature_mask_init();
87 /* clean state in init */
88 current_thread_info()->status
= 0;
91 #endif /* CONFIG_X86_64 */
94 * The _current_ task is using the FPU for the first time
95 * so initialize it and set the mxcsr to its default
96 * value at reset if we support XMM instructions and then
97 * remeber the current task has used the FPU.
99 int init_fpu(struct task_struct
*tsk
)
101 if (tsk_used_math(tsk
)) {
102 if (HAVE_HWFP
&& tsk
== current
)
108 * Memory allocation at the first usage of the FPU and other state.
110 if (!tsk
->thread
.xstate
) {
111 tsk
->thread
.xstate
= kmem_cache_alloc(task_xstate_cachep
,
113 if (!tsk
->thread
.xstate
)
119 memset(tsk
->thread
.xstate
, 0, xstate_size
);
121 set_stopped_child_used_math(tsk
);
127 struct i387_fxsave_struct
*fx
= &tsk
->thread
.xstate
->fxsave
;
129 memset(fx
, 0, xstate_size
);
132 fx
->mxcsr
= MXCSR_DEFAULT
;
134 struct i387_fsave_struct
*fp
= &tsk
->thread
.xstate
->fsave
;
135 memset(fp
, 0, xstate_size
);
136 fp
->cwd
= 0xffff037fu
;
137 fp
->swd
= 0xffff0000u
;
138 fp
->twd
= 0xffffffffu
;
139 fp
->fos
= 0xffff0000u
;
142 * Only the device not available exception or ptrace can call init_fpu.
144 set_stopped_child_used_math(tsk
);
148 int fpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
150 return tsk_used_math(target
) ? regset
->n
: 0;
153 int xfpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
155 return (cpu_has_fxsr
&& tsk_used_math(target
)) ? regset
->n
: 0;
158 int xfpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
159 unsigned int pos
, unsigned int count
,
160 void *kbuf
, void __user
*ubuf
)
167 ret
= init_fpu(target
);
171 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
172 &target
->thread
.xstate
->fxsave
, 0, -1);
175 int xfpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
176 unsigned int pos
, unsigned int count
,
177 const void *kbuf
, const void __user
*ubuf
)
184 ret
= init_fpu(target
);
188 set_stopped_child_used_math(target
);
190 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
191 &target
->thread
.xstate
->fxsave
, 0, -1);
194 * mxcsr reserved bits must be masked to zero for security reasons.
196 target
->thread
.xstate
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
201 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
204 * FPU tag word conversions.
207 static inline unsigned short twd_i387_to_fxsr(unsigned short twd
)
209 unsigned int tmp
; /* to avoid 16 bit prefixes in the code */
211 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
213 tmp
= (tmp
| (tmp
>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
214 /* and move the valid bits to the lower byte. */
215 tmp
= (tmp
| (tmp
>> 1)) & 0x3333; /* 00VV00VV00VV00VV */
216 tmp
= (tmp
| (tmp
>> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
217 tmp
= (tmp
| (tmp
>> 4)) & 0x00ff; /* 00000000VVVVVVVV */
222 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
223 #define FP_EXP_TAG_VALID 0
224 #define FP_EXP_TAG_ZERO 1
225 #define FP_EXP_TAG_SPECIAL 2
226 #define FP_EXP_TAG_EMPTY 3
228 static inline u32
twd_fxsr_to_i387(struct i387_fxsave_struct
*fxsave
)
231 u32 tos
= (fxsave
->swd
>> 11) & 7;
232 u32 twd
= (unsigned long) fxsave
->twd
;
234 u32 ret
= 0xffff0000u
;
237 for (i
= 0; i
< 8; i
++, twd
>>= 1) {
239 st
= FPREG_ADDR(fxsave
, (i
- tos
) & 7);
241 switch (st
->exponent
& 0x7fff) {
243 tag
= FP_EXP_TAG_SPECIAL
;
246 if (!st
->significand
[0] &&
247 !st
->significand
[1] &&
248 !st
->significand
[2] &&
250 tag
= FP_EXP_TAG_ZERO
;
252 tag
= FP_EXP_TAG_SPECIAL
;
255 if (st
->significand
[3] & 0x8000)
256 tag
= FP_EXP_TAG_VALID
;
258 tag
= FP_EXP_TAG_SPECIAL
;
262 tag
= FP_EXP_TAG_EMPTY
;
264 ret
|= tag
<< (2 * i
);
270 * FXSR floating point environment conversions.
274 convert_from_fxsr(struct user_i387_ia32_struct
*env
, struct task_struct
*tsk
)
276 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.xstate
->fxsave
;
277 struct _fpreg
*to
= (struct _fpreg
*) &env
->st_space
[0];
278 struct _fpxreg
*from
= (struct _fpxreg
*) &fxsave
->st_space
[0];
281 env
->cwd
= fxsave
->cwd
| 0xffff0000u
;
282 env
->swd
= fxsave
->swd
| 0xffff0000u
;
283 env
->twd
= twd_fxsr_to_i387(fxsave
);
286 env
->fip
= fxsave
->rip
;
287 env
->foo
= fxsave
->rdp
;
288 if (tsk
== current
) {
290 * should be actually ds/cs at fpu exception time, but
291 * that information is not available in 64bit mode.
293 asm("mov %%ds, %[fos]" : [fos
] "=r" (env
->fos
));
294 asm("mov %%cs, %[fcs]" : [fcs
] "=r" (env
->fcs
));
296 struct pt_regs
*regs
= task_pt_regs(tsk
);
298 env
->fos
= 0xffff0000 | tsk
->thread
.ds
;
302 env
->fip
= fxsave
->fip
;
303 env
->fcs
= (u16
) fxsave
->fcs
| ((u32
) fxsave
->fop
<< 16);
304 env
->foo
= fxsave
->foo
;
305 env
->fos
= fxsave
->fos
;
308 for (i
= 0; i
< 8; ++i
)
309 memcpy(&to
[i
], &from
[i
], sizeof(to
[0]));
312 static void convert_to_fxsr(struct task_struct
*tsk
,
313 const struct user_i387_ia32_struct
*env
)
316 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.xstate
->fxsave
;
317 struct _fpreg
*from
= (struct _fpreg
*) &env
->st_space
[0];
318 struct _fpxreg
*to
= (struct _fpxreg
*) &fxsave
->st_space
[0];
321 fxsave
->cwd
= env
->cwd
;
322 fxsave
->swd
= env
->swd
;
323 fxsave
->twd
= twd_i387_to_fxsr(env
->twd
);
324 fxsave
->fop
= (u16
) ((u32
) env
->fcs
>> 16);
326 fxsave
->rip
= env
->fip
;
327 fxsave
->rdp
= env
->foo
;
328 /* cs and ds ignored */
330 fxsave
->fip
= env
->fip
;
331 fxsave
->fcs
= (env
->fcs
& 0xffff);
332 fxsave
->foo
= env
->foo
;
333 fxsave
->fos
= env
->fos
;
336 for (i
= 0; i
< 8; ++i
)
337 memcpy(&to
[i
], &from
[i
], sizeof(from
[0]));
340 int fpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
341 unsigned int pos
, unsigned int count
,
342 void *kbuf
, void __user
*ubuf
)
344 struct user_i387_ia32_struct env
;
347 ret
= init_fpu(target
);
352 return fpregs_soft_get(target
, regset
, pos
, count
, kbuf
, ubuf
);
355 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
356 &target
->thread
.xstate
->fsave
, 0,
360 if (kbuf
&& pos
== 0 && count
== sizeof(env
)) {
361 convert_from_fxsr(kbuf
, target
);
365 convert_from_fxsr(&env
, target
);
367 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
370 int fpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
371 unsigned int pos
, unsigned int count
,
372 const void *kbuf
, const void __user
*ubuf
)
374 struct user_i387_ia32_struct env
;
377 ret
= init_fpu(target
);
381 set_stopped_child_used_math(target
);
384 return fpregs_soft_set(target
, regset
, pos
, count
, kbuf
, ubuf
);
387 return user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
388 &target
->thread
.xstate
->fsave
, 0, -1);
391 if (pos
> 0 || count
< sizeof(env
))
392 convert_from_fxsr(&env
, target
);
394 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
396 convert_to_fxsr(target
, &env
);
402 * Signal frame handlers.
405 static inline int save_i387_fsave(struct _fpstate_ia32 __user
*buf
)
407 struct task_struct
*tsk
= current
;
408 struct i387_fsave_struct
*fp
= &tsk
->thread
.xstate
->fsave
;
411 fp
->status
= fp
->swd
;
412 if (__copy_to_user(buf
, fp
, sizeof(struct i387_fsave_struct
)))
417 static int save_i387_fxsave(struct _fpstate_ia32 __user
*buf
)
419 struct task_struct
*tsk
= current
;
420 struct i387_fxsave_struct
*fx
= &tsk
->thread
.xstate
->fxsave
;
421 struct user_i387_ia32_struct env
;
426 convert_from_fxsr(&env
, tsk
);
427 if (__copy_to_user(buf
, &env
, sizeof(env
)))
430 err
|= __put_user(fx
->swd
, &buf
->status
);
431 err
|= __put_user(X86_FXSR_MAGIC
, &buf
->magic
);
435 if (__copy_to_user(&buf
->_fxsr_env
[0], fx
,
436 sizeof(struct i387_fxsave_struct
)))
441 int save_i387_ia32(struct _fpstate_ia32 __user
*buf
)
446 * This will cause a "finit" to be triggered by the next
447 * attempted FPU operation by the 'current' process.
452 return fpregs_soft_get(current
, NULL
,
453 0, sizeof(struct user_i387_ia32_struct
),
458 return save_i387_fxsave(buf
);
460 return save_i387_fsave(buf
);
463 static inline int restore_i387_fsave(struct _fpstate_ia32 __user
*buf
)
465 struct task_struct
*tsk
= current
;
467 return __copy_from_user(&tsk
->thread
.xstate
->fsave
, buf
,
468 sizeof(struct i387_fsave_struct
));
471 static int restore_i387_fxsave(struct _fpstate_ia32 __user
*buf
)
473 struct task_struct
*tsk
= current
;
474 struct user_i387_ia32_struct env
;
477 err
= __copy_from_user(&tsk
->thread
.xstate
->fxsave
, &buf
->_fxsr_env
[0],
478 sizeof(struct i387_fxsave_struct
));
479 /* mxcsr reserved bits must be masked to zero for security reasons */
480 tsk
->thread
.xstate
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
481 if (err
|| __copy_from_user(&env
, buf
, sizeof(env
)))
483 convert_to_fxsr(tsk
, &env
);
488 int restore_i387_ia32(struct _fpstate_ia32 __user
*buf
)
491 struct task_struct
*tsk
= current
;
504 err
= restore_i387_fxsave(buf
);
506 err
= restore_i387_fsave(buf
);
508 err
= fpregs_soft_set(current
, NULL
,
509 0, sizeof(struct user_i387_ia32_struct
),
518 * FPU state for core dumps.
519 * This is only used for a.out dumps now.
520 * It is declared generically using elf_fpregset_t (which is
521 * struct user_i387_struct) but is in fact only used for 32-bit
522 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
524 int dump_fpu(struct pt_regs
*regs
, struct user_i387_struct
*fpu
)
526 struct task_struct
*tsk
= current
;
529 fpvalid
= !!used_math();
531 fpvalid
= !fpregs_get(tsk
, NULL
,
532 0, sizeof(struct user_i387_ia32_struct
),
537 EXPORT_SYMBOL(dump_fpu
);
539 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */