arch/arm/mach-omap2/pm.h

   1 /*
   2  * OMAP2/3 Power Management Routines
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Jouni Hogander
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  12 #define __ARCH_ARM_MACH_OMAP2_PM_H
  13
  14 #include <plat/powerdomain.h>
  15
  16 extern u32 enable_off_mode;
  17 extern u32 sleep_while_idle;
  18 extern u32 voltage_off_while_idle;
  19
  20 extern void *omap3_secure_ram_storage;
  21 extern void omap3_pm_off_mode_enable(int);
  22 extern void omap_sram_idle(void);
  23 extern int omap3_can_sleep(void);
  24 extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
  25 extern int omap3_idle_init(void);
  26
  27 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
  28 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
  29
  30 extern u32 wakeup_timer_seconds;
  31 extern struct omap_dm_timer *gptimer_wakeup;
  32
  33 /* VDD1 OPPS */
  34 #define VDD1_OPP1       0x1
  35 #define VDD1_OPP2       0x2
  36 #define VDD1_OPP3       0x3
  37 #define VDD1_OPP4       0x4
  38 #define VDD1_OPP5       0x5
  39
  40 /* VDD2 OPPS */
  41 #define VDD2_OPP1       0x1
  42 #define VDD2_OPP2       0x2
  43 #define VDD2_OPP3       0x3
  44
  45 #define MIN_VDD1_OPP    VDD1_OPP1
  46 #define MAX_VDD1_OPP    VDD1_OPP5
  47 #define MIN_VDD2_OPP    VDD2_OPP1
  48 #define MAX_VDD2_OPP    VDD2_OPP3
  49
  50 #ifdef CONFIG_PM_DEBUG
  51 extern void omap2_pm_dump(int mode, int resume, unsigned int us);
  52 extern int omap2_pm_debug;
  53 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
  54 extern int pm_dbg_regset_save(int reg_set);
  55 extern int pm_dbg_regset_init(int reg_set);
  56 #else
  57 #define omap2_pm_dump(mode, resume, us)         do {} while (0);
  58 #define omap2_pm_debug                          0
  59 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
  60 #define pm_dbg_regset_save(reg_set) do {} while (0);
  61 #define pm_dbg_regset_init(reg_set) do {} while (0);
  62 #endif /* CONFIG_PM_DEBUG */
  63
  64 extern void omap24xx_idle_loop_suspend(void);
  65
  66 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
  67                                         void __iomem *sdrc_power);
  68 extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
  69 extern void save_secure_ram_context(u32 *addr);
  70 extern void omap3_save_scratchpad_contents(void);
  71
  72 extern unsigned int omap24xx_idle_loop_suspend_sz;
  73 extern unsigned int omap34xx_suspend_sz;
  74 extern unsigned int save_secure_ram_context_sz;
  75 extern unsigned int omap24xx_cpu_suspend_sz;
  76 extern unsigned int omap34xx_cpu_suspend_sz;
  77
  78 #endif