sound/pci/azt3328.h

   1 #ifndef __SOUND_AZF3328_H
   2 #define __SOUND_AZF3328_H
   3
   4 /* type argument to use for the I/O functions */
   5 #define WORD_VALUE      0x1000
   6 #define DWORD_VALUE     0x2000
   7 #define BYTE_VALUE      0x4000
   8
   9 /*** main I/O area port indices ***/
  10 /* (only 0x70 of 0x80 bytes saved/restored by Windows driver) */
  11 /* the driver initialisation suggests a layout of 3 main areas:
  12  * from 0x00 (playback), from 0x20 (recording) and from 0x40 (maybe DirectX
  13  * timer ???). and probably another area from 0x60 to 0x6f
  14  * (IRQ management, power management etc. ???). */
  15 /* playback area */
  16 #define IDX_IO_PLAY_FLAGS       0x00
  17      /* able to reactivate output after output muting due to 8/16bit
  18       * output change, just like 0x0002.
  19       * 0x0001 is the only bit that's able to start the DMA counter */
  20   #define DMA_RESUME                    0x0001 /* paused if cleared ? */
  21      /* 0x0002 *temporarily* set during DMA stopping. hmm
  22       * both 0x0002 and 0x0004 set in playback setup. */
  23      /* able to reactivate output after output muting due to 8/16bit
  24       * output change, just like 0x0001. */
  25   #define DMA_PLAY_SOMETHING1           0x0002 /* \ alternated (toggled) */
  26      /* 0x0004: NOT able to reactivate output */
  27   #define DMA_PLAY_SOMETHING2           0x0004 /* / bits */
  28   #define SOMETHING_ALMOST_ALWAYS_SET   0x0008 /* ???; can be modified */
  29   #define DMA_EPILOGUE_SOMETHING        0x0010
  30   #define DMA_SOMETHING_ELSE            0x0020 /* ??? */
  31   #define SOMETHING_UNMODIFIABLE        0xffc0 /* unused ? not modifiable */
  32 #define IDX_IO_PLAY_IRQMASK     0x02
  33   /* write back to flags in case flags are set, in order to ACK IRQ in handler
  34    * (bit 1 of port 0x64 indicates interrupt for one of these three types)
  35    * sometimes in this case it just writes 0xffff to globally ACK all IRQs
  36    * settings written are not reflected when reading back, though.
  37    * seems to be IRQ, too (frequently used: port |= 0x07 !), but who knows ? */
  38   #define IRQ_PLAY_SOMETHING            0x0001 /* something & ACK */
  39   #define IRQ_FINISHED_PLAYBUF_1        0x0002 /* 1st dmabuf finished & ACK */
  40   #define IRQ_FINISHED_PLAYBUF_2        0x0004 /* 2nd dmabuf finished & ACK */
  41   #define IRQMASK_SOME_STATUS_1         0x0008 /* \ related bits */
  42   #define IRQMASK_SOME_STATUS_2         0x0010 /* / (checked together in loop) */
  43   #define IRQMASK_UNMODIFIABLE          0xffe0 /* unused ? not modifiable */
  44 #define IDX_IO_PLAY_DMA_START_1 0x04 /* start address of 1st DMA play area */
  45 #define IDX_IO_PLAY_DMA_START_2 0x08 /* start address of 2nd DMA play area */
  46 #define IDX_IO_PLAY_DMA_LEN_1   0x0c /* length of 1st DMA play area */
  47 #define IDX_IO_PLAY_DMA_LEN_2   0x0e /* length of 2nd DMA play area */
  48 #define IDX_IO_PLAY_DMA_CURRPOS 0x10 /* current DMA position  */
  49 #define IDX_IO_PLAY_DMA_CURROFS 0x14 /* offset within current DMA play area */
  50 #define IDX_IO_PLAY_SOUNDFORMAT 0x16
  51   /* all unspecified bits can't be modified */
  52   #define SOUNDFORMAT_FREQUENCY_MASK    0x000f
  53     /* all _SUSPECTED_ values are not used by Windows drivers, so we don't
  54      * have any hard facts, only rough measurements */
  55     #define SOUNDFORMAT_FREQ_SUSPECTED_4000     0x0c
  56     #define SOUNDFORMAT_FREQ_SUSPECTED_4800     0x0a
  57     #define SOUNDFORMAT_FREQ_5510               0x0d
  58     #define SOUNDFORMAT_FREQ_6620               0x0b
  59     #define SOUNDFORMAT_FREQ_8000               0x00 /* also 0x0e ? */
  60     #define SOUNDFORMAT_FREQ_9600               0x08
  61     #define SOUNDFORMAT_FREQ_SUSPECTED_12000    0x09
  62     #define SOUNDFORMAT_FREQ_11025              0x01 /* also 0x0f ? */
  63     #define SOUNDFORMAT_FREQ_16000              0x02
  64     #define SOUNDFORMAT_FREQ_22050              0x03
  65     #define SOUNDFORMAT_FREQ_32000              0x04
  66     #define SOUNDFORMAT_FREQ_44100              0x05
  67     #define SOUNDFORMAT_FREQ_48000              0x06
  68     #define SOUNDFORMAT_FREQ_SUSPECTED_64000    0x07
  69   #define SOUNDFORMAT_FLAG_16BIT        0x0010
  70   #define SOUNDFORMAT_FLAG_2CHANNELS    0x0020
  71 /* recording area (see also: playback bit flag definitions) */
  72 #define IDX_IO_REC_FLAGS        0x20 /* ?? */
  73 #define IDX_IO_REC_IRQMASK      0x22 /* ?? */
  74   #define IRQ_REC_SOMETHING             0x0001 /* something & ACK */
  75   #define IRQ_FINISHED_RECBUF_1         0x0002 /* 1st dmabuf finished & ACK */
  76   #define IRQ_FINISHED_RECBUF_2         0x0004 /* 2nd dmabuf finished & ACK */
  77   /* hmm, maybe these are just the corresponding *recording* flags ?
  78    * but OTOH they are most likely at port 0x22 instead */
  79   #define IRQMASK_SOME_STATUS_1         0x0008 /* \ related bits */
  80   #define IRQMASK_SOME_STATUS_2         0x0010 /* / (checked together in loop) */
  81 #define IDX_IO_REC_DMA_START_1  0x24
  82 #define IDX_IO_REC_DMA_START_2  0x28
  83 #define IDX_IO_REC_DMA_LEN_1    0x2c
  84 #define IDX_IO_REC_DMA_LEN_2    0x2e
  85 #define IDX_IO_REC_DMA_CURRPOS  0x30
  86 #define IDX_IO_REC_DMA_CURROFS  0x34
  87 #define IDX_IO_REC_SOUNDFORMAT  0x36
  88 /* some third area ? (after playback and recording) */
  89 #define IDX_IO_SOMETHING_FLAGS  0x40 /* gets set to 0x34 just like port 0x0 and 0x20 on card init */
  90 /* general */
  91 #define IDX_IO_60H              0x60 /* writing 0xffff returns 0xffff */
  92 #define IDX_IO_62H              0x62 /* writing to WORD 0x0062 can hang the box ! --> responsible for IRQ management as a whole ?? */
  93 #define IDX_IO_IRQ63H           0x63 /* FIXME !! */
  94   #define IO_IRQ63H_SOMETHING           0x04 /* being set in IRQ handler in case port 0x00 had 0x0020 set upon IRQ handler */
  95 #define IDX_IO_IRQSTATUS        0x64
  96   #define IRQ_PLAYBACK                  0x0001
  97   #define IRQ_RECORDING                 0x0002
  98   #define IRQ_MPU401                    0x0010
  99   #define IRQ_SOMEIRQ                   0x0020 /* ???? */
 100   #define IRQ_WHO_KNOWS_UNUSED          0x00e0 /* probably unused */
 101 #define IDX_IO_66H              0x66    /* writing 0xffff returns 0x0000 */
 102 #define IDX_IO_SOME_VALUE       0x68    /* this is always set to 0x3ff, and writable; maybe some buffer limit, but I couldn't find out more */
 103 #define IDX_IO_6AH              0x6A    /* this WORD can be set to have bits 0x0028 activated; actually inhibits PCM playback !!! maybe power management ?? */
 104 #define IDX_IO_6CH              0x6C    /* this WORD can have all its bits activated ? */
 105 #define IDX_IO_6EH              0x6E    /* writing 0xffff returns 0x83fe */
 106 /* further I/O indices not saved/restored, so probably not used */
 107
 108 /*** I/O 2 area port indices ***/
 109 /* (only 0x06 of 0x08 bytes saved/restored by Windows driver) */
 110 #define IDX_IO2_LEGACY_ADDR     0x04
 111   #define LEGACY_SOMETHING              0x01 /* OPL3 ?? */
 112   #define LEGACY_JOY                    0x08
 113
 114 /*** mixer I/O area port indices ***/
 115 /* (only 0x22 of 0x40 bytes saved/restored by Windows driver)
 116  * generally spoken: AC97 register index = AZF3328 mixer reg index + 2
 117  * (in other words: AZF3328 NOT fully AC97 compliant) */
 118   #define MIXER_VOLUME_RIGHT_MASK       0x001f
 119   #define MIXER_VOLUME_LEFT_MASK        0x1f00
 120   #define MIXER_MUTE_MASK               0x8000
 121 #define IDX_MIXER_RESET         0x00 /* does NOT seem to have AC97 ID bits */
 122 #define IDX_MIXER_PLAY_MASTER   0x02
 123 #define IDX_MIXER_MODEMOUT      0x04
 124 #define IDX_MIXER_BASSTREBLE    0x06
 125   #define MIXER_BASSTREBLE_TREBLE_VOLUME_MASK   0x000e
 126   #define MIXER_BASSTREBLE_BASS_VOLUME_MASK     0x0e00
 127 #define IDX_MIXER_PCBEEP        0x08
 128 #define IDX_MIXER_MODEMIN       0x0a
 129 #define IDX_MIXER_MIC           0x0c
 130   #define MIXER_MIC_MICGAIN_20DB_ENHANCEMENT_MASK       0x0040
 131 #define IDX_MIXER_LINEIN        0x0e
 132 #define IDX_MIXER_CDAUDIO       0x10
 133 #define IDX_MIXER_VIDEO         0x12
 134 #define IDX_MIXER_AUX           0x14
 135 #define IDX_MIXER_WAVEOUT       0x16
 136 #define IDX_MIXER_FMSYNTH       0x18
 137 #define IDX_MIXER_REC_SELECT    0x1a
 138   #define MIXER_REC_SELECT_MIC          0x00
 139   #define MIXER_REC_SELECT_CD           0x01
 140   #define MIXER_REC_SELECT_VIDEO        0x02
 141   #define MIXER_REC_SELECT_AUX          0x03
 142   #define MIXER_REC_SELECT_LINEIN       0x04
 143   #define MIXER_REC_SELECT_MIXSTEREO    0x05
 144   #define MIXER_REC_SELECT_MIXMONO      0x06
 145   #define MIXER_REC_SELECT_MONOIN       0x07
 146 #define IDX_MIXER_REC_VOLUME    0x1c
 147 #define IDX_MIXER_ADVCTL1       0x1e
 148   /* unlisted bits are unmodifiable */
 149   #define MIXER_ADVCTL1_3DWIDTH_MASK    0x000e
 150   #define MIXER_ADVCTL1_HIFI3D_MASK     0x0300
 151 #define IDX_MIXER_ADVCTL2       0x20 /* resembles AC97_GENERAL_PURPOSE reg ! */
 152   /* unlisted bits are unmodifiable */
 153   #define MIXER_ADVCTL2_BIT7            0x0080 /* WaveOut 3D Bypass ? mutes WaveOut at LineOut */
 154   #define MIXER_ADVCTL2_BIT8            0x0100 /* is this Modem Out Select ? */
 155   #define MIXER_ADVCTL2_BIT9            0x0200 /* Mono Select Source ? */
 156   #define MIXER_ADVCTL2_BIT13           0x2000 /* 3D enable ? */
 157   #define MIXER_ADVCTL2_BIT15           0x8000 /* unknown */
 158
 159 #define IDX_MIXER_SOMETHING30H  0x30 /* used, but unknown ??? */
 160
 161 /* driver internal flags */
 162 #define SET_CHAN_LEFT   1
 163 #define SET_CHAN_RIGHT  2
 164
 165 #endif /* __SOUND_AZF3328_H  */