arch/blackfin/lib/umodsi3.S

   1 /*
   2  * libgcc1 routines for Blackfin 5xx
   3  *
   4  * Copyright 2004-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the ADI BSD license or the GPL-2 (or later)
   7  */
   8
   9 #ifdef CONFIG_ARITHMETIC_OPS_L1
  10 .section .l1.text
  11 #else
  12 .text
  13 #endif
  14
  15 .extern ___udivsi3;
  16 .type ___udivsi3, STT_FUNC;
  17 .globl  ___umodsi3
  18 .type ___umodsi3, STT_FUNC;
  19 ___umodsi3:
  20
  21         CC=R0==0;
  22         IF CC JUMP .LRETURN_R0;         /* Return 0, if NR == 0 */
  23         CC= R1==0;
  24         IF CC JUMP .LRETURN_ZERO_VAL;   /* Return 0, if DR == 0 */
  25         CC=R0==R1;
  26         IF CC JUMP .LRETURN_ZERO_VAL;   /* Return 0, if NR == DR */
  27         CC = R1 == 1;
  28         IF CC JUMP .LRETURN_ZERO_VAL;   /* Return 0, if  DR == 1 */
  29         CC = R0<R1 (IU);
  30         IF CC JUMP .LRETURN_R0;         /* Return dividend (R0),IF NR<DR */
  31
  32         [--SP] = (R7:6);                /* Push registers and */
  33         [--SP] = RETS;                  /* Return address */
  34         R7 = R0;                        /* Copy of R0 */
  35         R6 = R1;
  36         SP += -12;                      /* Should always provide this space */
  37         CALL ___udivsi3;                /* Compute unsigned quotient using ___udiv32()*/
  38         SP += 12;
  39         R0 *= R6;                       /* Quotient * divisor */
  40         R0 = R7 - R0;                   /* Dividend - (quotient * divisor) */
  41         RETS = [SP++];                  /* Pop return address */
  42         ( R7:6) = [SP++];               /* And registers */
  43         RTS;                            /* Return remainder */
  44 .LRETURN_ZERO_VAL:
  45         R0 = 0;
  46 .LRETURN_R0:
  47         RTS;
  48
  49 .size ___umodsi3, .-___umodsi3