arch/powerpc/mm/fsl_booke_mmu.c

   1 /*
   2  * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
   3  * E500 Book E processors.
   4  *
   5  * Copyright 2004,2010 Freescale Semiconductor, Inc.
   6  *
   7  * This file contains the routines for initializing the MMU
   8  * on the 4xx series of chips.
   9  *  -- paulus
  10  *
  11  *  Derived from arch/ppc/mm/init.c:
  12  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  13  *
  14  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  15  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  16  *    Copyright (C) 1996 Paul Mackerras
  17  *
  18  *  Derived from "arch/i386/mm/init.c"
  19  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  20  *
  21  *  This program is free software; you can redistribute it and/or
  22  *  modify it under the terms of the GNU General Public License
  23  *  as published by the Free Software Foundation; either version
  24  *  2 of the License, or (at your option) any later version.
  25  *
  26  */
  27
  28 #include <linux/signal.h>
  29 #include <linux/sched.h>
  30 #include <linux/kernel.h>
  31 #include <linux/errno.h>
  32 #include <linux/string.h>
  33 #include <linux/types.h>
  34 #include <linux/ptrace.h>
  35 #include <linux/mman.h>
  36 #include <linux/mm.h>
  37 #include <linux/swap.h>
  38 #include <linux/stddef.h>
  39 #include <linux/vmalloc.h>
  40 #include <linux/init.h>
  41 #include <linux/delay.h>
  42 #include <linux/highmem.h>
  43
  44 #include <asm/pgalloc.h>
  45 #include <asm/prom.h>
  46 #include <asm/io.h>
  47 #include <asm/mmu_context.h>
  48 #include <asm/pgtable.h>
  49 #include <asm/mmu.h>
  50 #include <asm/uaccess.h>
  51 #include <asm/smp.h>
  52 #include <asm/machdep.h>
  53 #include <asm/setup.h>
  54
  55 #include "mmu_decl.h"
  56
  57 unsigned int tlbcam_index;
  58
  59
  60 #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
  61 #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
  62 #endif
  63
  64 #define NUM_TLBCAMS     (64)
  65 struct tlbcam TLBCAM[NUM_TLBCAMS];
  66
  67 struct tlbcamrange {
  68         unsigned long start;
  69         unsigned long limit;
  70         phys_addr_t phys;
  71 } tlbcam_addrs[NUM_TLBCAMS];
  72
  73 extern unsigned int tlbcam_index;
  74
  75 unsigned long tlbcam_sz(int idx)
  76 {
  77         return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
  78 }
  79
  80 /*
  81  * Return PA for this VA if it is mapped by a CAM, or 0
  82  */
  83 phys_addr_t v_mapped_by_tlbcam(unsigned long va)
  84 {
  85         int b;
  86         for (b = 0; b < tlbcam_index; ++b)
  87                 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
  88                         return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
  89         return 0;
  90 }
  91
  92 /*
  93  * Return VA for a given PA or 0 if not mapped
  94  */
  95 unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
  96 {
  97         int b;
  98         for (b = 0; b < tlbcam_index; ++b)
  99                 if (pa >= tlbcam_addrs[b].phys
 100                         && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
 101                               +tlbcam_addrs[b].phys)
 102                         return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
 103         return 0;
 104 }
 105
 106 /*
 107  * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
 108  * in particular size must be a power of 4 between 4k and 256M (or 1G, for cpus
 109  * that support extended page sizes).  Note that while some cpus support a
 110  * page size of 4G, we don't allow its use here.
 111  */
 112 static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
 113                 unsigned long size, unsigned long flags, unsigned int pid)
 114 {
 115         unsigned int tsize, lz;
 116
 117         asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
 118         tsize = 21 - lz;
 119
 120 #ifdef CONFIG_SMP
 121         if ((flags & _PAGE_NO_CACHE) == 0)
 122                 flags |= _PAGE_COHERENT;
 123 #endif
 124
 125         TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
 126         TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
 127         TLBCAM[index].MAS2 = virt & PAGE_MASK;
 128
 129         TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
 130         TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
 131         TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
 132         TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
 133         TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
 134
 135         TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
 136         TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
 137         if (mmu_has_feature(MMU_FTR_BIG_PHYS))
 138                 TLBCAM[index].MAS7 = (u64)phys >> 32;
 139
 140         if (flags & _PAGE_USER) {
 141            TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
 142            TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
 143         }
 144
 145         tlbcam_addrs[index].start = virt;
 146         tlbcam_addrs[index].limit = virt + size - 1;
 147         tlbcam_addrs[index].phys = phys;
 148
 149         loadcam_entry(index);
 150 }
 151
 152 unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
 153 {
 154         int i;
 155         unsigned long virt = PAGE_OFFSET;
 156         phys_addr_t phys = memstart_addr;
 157         unsigned long amount_mapped = 0;
 158         unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
 159
 160         /* Convert (4^max) kB to (2^max) bytes */
 161         max_cam = max_cam * 2 + 10;
 162
 163         /* Calculate CAM values */
 164         for (i = 0; ram && i < max_cam_idx; i++) {
 165                 unsigned int camsize = __ilog2(ram) & ~1U;
 166                 unsigned int align = __ffs(virt | phys) & ~1U;
 167                 unsigned long cam_sz;
 168
 169                 if (camsize > align)
 170                         camsize = align;
 171                 if (camsize > max_cam)
 172                         camsize = max_cam;
 173
 174                 cam_sz = 1UL << camsize;
 175                 settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
 176
 177                 ram -= cam_sz;
 178                 amount_mapped += cam_sz;
 179                 virt += cam_sz;
 180                 phys += cam_sz;
 181         }
 182         tlbcam_index = i;
 183
 184         return amount_mapped;
 185 }
 186
 187 unsigned long __init mmu_mapin_ram(unsigned long top)
 188 {
 189         return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
 190 }
 191
 192 /*
 193  * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 194  */
 195 void __init MMU_init_hw(void)
 196 {
 197         flush_instruction_cache();
 198 }
 199
 200 void __init adjust_total_lowmem(void)
 201 {
 202         unsigned long ram;
 203         int i;
 204
 205         /* adjust lowmem size to __max_low_memory */
 206         ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
 207
 208         __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
 209
 210         pr_info("Memory CAM mapping: ");
 211         for (i = 0; i < tlbcam_index - 1; i++)
 212                 pr_cont("%lu/", tlbcam_sz(i) >> 20);
 213         pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
 214                 (unsigned int)((total_lowmem - __max_low_memory) >> 20));
 215
 216         __initial_memory_limit_addr = memstart_addr + __max_low_memory;
 217 }