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Merge branch 'kvm-updates/2.6.36' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[linux-rapidio-2.6.git] / drivers / block / cciss.c
blob5e4fadcdece979b76571462210f60195a6531f27
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/smp_lock.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <asm/uaccess.h>
45 #include <asm/io.h>
46
47 #include <linux/dma-mapping.h>
48 #include <linux/blkdev.h>
49 #include <linux/genhd.h>
50 #include <linux/completion.h>
51 #include <scsi/scsi.h>
52 #include <scsi/sg.h>
53 #include <scsi/scsi_ioctl.h>
54 #include <linux/cdrom.h>
55 #include <linux/scatterlist.h>
56 #include <linux/kthread.h>
57
58 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
59 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
61
62 /* Embedded module documentation macros - see modules.h */
63 MODULE_AUTHOR("Hewlett-Packard Company");
64 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
65 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66 MODULE_VERSION("3.6.26");
67 MODULE_LICENSE("GPL");
68
69 static int cciss_allow_hpsa;
70 module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71 MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
75 #include "cciss_cmd.h"
76 #include "cciss.h"
77 #include <linux/cciss_ioctl.h>
78
79 /* define the PCI info for the cards we can control */
80 static const struct pci_device_id cciss_pci_device_id[] = {
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
113 {0,}
114 };
115
116 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
118 /* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122 static struct board_type products[] = {
123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
140 /* controllers below this line are also supported by the hpsa driver. */
141 #define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
157 };
158
159 /* How long to wait (in milliseconds) for board to go into simple mode */
160 #define MAX_CONFIG_WAIT 30000
161 #define MAX_IOCTL_CONFIG_WAIT 1000
162
163 /*define how many times we will try a command because of bus resets */
164 #define MAX_CMD_RETRIES 3
165
166 #define MAX_CTLR 32
167
168 /* Originally cciss driver only supports 8 major numbers */
169 #define MAX_CTLR_ORIG 8
170
171 static ctlr_info_t *hba[MAX_CTLR];
172
173 static struct task_struct *cciss_scan_thread;
174 static DEFINE_MUTEX(scan_mutex);
175 static LIST_HEAD(scan_q);
176
177 static void do_cciss_request(struct request_queue *q);
178 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
180 static int cciss_open(struct block_device *bdev, fmode_t mode);
181 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
182 static int cciss_release(struct gendisk *disk, fmode_t mode);
183 static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
185 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
186 unsigned int cmd, unsigned long arg);
187 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
188
189 static int cciss_revalidate(struct gendisk *disk);
190 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
191 static int deregister_disk(ctlr_info_t *h, int drv_index,
192 int clear_all, int via_ioctl);
193
194 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
195 sector_t *total_size, unsigned int *block_size);
196 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
197 sector_t *total_size, unsigned int *block_size);
198 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
199 sector_t total_size,
200 unsigned int block_size, InquiryData_struct *inq_buff,
201 drive_info_struct *drv);
202 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
203 static void start_io(ctlr_info_t *h);
204 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
207 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
210
211 static int add_to_scan_list(struct ctlr_info *h);
212 static int scan_thread(void *data);
213 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
214 static void cciss_hba_release(struct device *dev);
215 static void cciss_device_release(struct device *dev);
216 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
217 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
218 static inline u32 next_command(ctlr_info_t *h);
219 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
225
226 /* performant mode helper functions */
227 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
230
231 #ifdef CONFIG_PROC_FS
232 static void cciss_procinit(ctlr_info_t *h);
233 #else
234 static void cciss_procinit(ctlr_info_t *h)
235 {
236 }
237 #endif /* CONFIG_PROC_FS */
238
239 #ifdef CONFIG_COMPAT
240 static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
242 #endif
243
244 static const struct block_device_operations cciss_fops = {
245 .owner = THIS_MODULE,
246 .open = cciss_unlocked_open,
247 .release = cciss_release,
248 .ioctl = do_ioctl,
249 .getgeo = cciss_getgeo,
250 #ifdef CONFIG_COMPAT
251 .compat_ioctl = cciss_compat_ioctl,
252 #endif
253 .revalidate_disk = cciss_revalidate,
254 };
255
256 /* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261 {
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264 }
265
266 /*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
269 static inline void addQ(struct hlist_head *list, CommandList_struct *c)
270 {
271 hlist_add_head(&c->list, list);
272 }
273
274 static inline void removeQ(CommandList_struct *c)
275 {
276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
286 return;
287 }
288
289 hlist_del_init(&c->list);
290 }
291
292 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294 {
295 unsigned long flags;
296 set_performant_mode(h, c);
297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 if (h->Qdepth > h->maxQsinceinit)
301 h->maxQsinceinit = h->Qdepth;
302 start_io(h);
303 spin_unlock_irqrestore(&h->lock, flags);
304 }
305
306 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
307 int nr_cmds)
308 {
309 int i;
310
311 if (!cmd_sg_list)
312 return;
313 for (i = 0; i < nr_cmds; i++) {
314 kfree(cmd_sg_list[i]);
315 cmd_sg_list[i] = NULL;
316 }
317 kfree(cmd_sg_list);
318 }
319
320 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
321 ctlr_info_t *h, int chainsize, int nr_cmds)
322 {
323 int j;
324 SGDescriptor_struct **cmd_sg_list;
325
326 if (chainsize <= 0)
327 return NULL;
328
329 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
330 if (!cmd_sg_list)
331 return NULL;
332
333 /* Build up chain blocks for each command */
334 for (j = 0; j < nr_cmds; j++) {
335 /* Need a block of chainsized s/g elements. */
336 cmd_sg_list[j] = kmalloc((chainsize *
337 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
338 if (!cmd_sg_list[j]) {
339 dev_err(&h->pdev->dev, "Cannot get memory "
340 "for s/g chains.\n");
341 goto clean;
342 }
343 }
344 return cmd_sg_list;
345 clean:
346 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
347 return NULL;
348 }
349
350 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
351 {
352 SGDescriptor_struct *chain_sg;
353 u64bit temp64;
354
355 if (c->Header.SGTotal <= h->max_cmd_sgentries)
356 return;
357
358 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
359 temp64.val32.lower = chain_sg->Addr.lower;
360 temp64.val32.upper = chain_sg->Addr.upper;
361 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
362 }
363
364 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
365 SGDescriptor_struct *chain_block, int len)
366 {
367 SGDescriptor_struct *chain_sg;
368 u64bit temp64;
369
370 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
371 chain_sg->Ext = CCISS_SG_CHAIN;
372 chain_sg->Len = len;
373 temp64.val = pci_map_single(h->pdev, chain_block, len,
374 PCI_DMA_TODEVICE);
375 chain_sg->Addr.lower = temp64.val32.lower;
376 chain_sg->Addr.upper = temp64.val32.upper;
377 }
378
379 #include "cciss_scsi.c" /* For SCSI tape support */
380
381 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
382 "UNKNOWN"
383 };
384 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
385
386 #ifdef CONFIG_PROC_FS
387
388 /*
389 * Report information about this controller.
390 */
391 #define ENG_GIG 1000000000
392 #define ENG_GIG_FACTOR (ENG_GIG/512)
393 #define ENGAGE_SCSI "engage scsi"
394
395 static struct proc_dir_entry *proc_cciss;
396
397 static void cciss_seq_show_header(struct seq_file *seq)
398 {
399 ctlr_info_t *h = seq->private;
400
401 seq_printf(seq, "%s: HP %s Controller\n"
402 "Board ID: 0x%08lx\n"
403 "Firmware Version: %c%c%c%c\n"
404 "IRQ: %d\n"
405 "Logical drives: %d\n"
406 "Current Q depth: %d\n"
407 "Current # commands on controller: %d\n"
408 "Max Q depth since init: %d\n"
409 "Max # commands on controller since init: %d\n"
410 "Max SG entries since init: %d\n",
411 h->devname,
412 h->product_name,
413 (unsigned long)h->board_id,
414 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
415 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
416 h->num_luns,
417 h->Qdepth, h->commands_outstanding,
418 h->maxQsinceinit, h->max_outstanding, h->maxSG);
419
420 #ifdef CONFIG_CISS_SCSI_TAPE
421 cciss_seq_tape_report(seq, h);
422 #endif /* CONFIG_CISS_SCSI_TAPE */
423 }
424
425 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
426 {
427 ctlr_info_t *h = seq->private;
428 unsigned long flags;
429
430 /* prevent displaying bogus info during configuration
431 * or deconfiguration of a logical volume
432 */
433 spin_lock_irqsave(&h->lock, flags);
434 if (h->busy_configuring) {
435 spin_unlock_irqrestore(&h->lock, flags);
436 return ERR_PTR(-EBUSY);
437 }
438 h->busy_configuring = 1;
439 spin_unlock_irqrestore(&h->lock, flags);
440
441 if (*pos == 0)
442 cciss_seq_show_header(seq);
443
444 return pos;
445 }
446
447 static int cciss_seq_show(struct seq_file *seq, void *v)
448 {
449 sector_t vol_sz, vol_sz_frac;
450 ctlr_info_t *h = seq->private;
451 unsigned ctlr = h->ctlr;
452 loff_t *pos = v;
453 drive_info_struct *drv = h->drv[*pos];
454
455 if (*pos > h->highest_lun)
456 return 0;
457
458 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
459 return 0;
460
461 if (drv->heads == 0)
462 return 0;
463
464 vol_sz = drv->nr_blocks;
465 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
466 vol_sz_frac *= 100;
467 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
468
469 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
470 drv->raid_level = RAID_UNKNOWN;
471 seq_printf(seq, "cciss/c%dd%d:"
472 "\t%4u.%02uGB\tRAID %s\n",
473 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
474 raid_label[drv->raid_level]);
475 return 0;
476 }
477
478 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
479 {
480 ctlr_info_t *h = seq->private;
481
482 if (*pos > h->highest_lun)
483 return NULL;
484 *pos += 1;
485
486 return pos;
487 }
488
489 static void cciss_seq_stop(struct seq_file *seq, void *v)
490 {
491 ctlr_info_t *h = seq->private;
492
493 /* Only reset h->busy_configuring if we succeeded in setting
494 * it during cciss_seq_start. */
495 if (v == ERR_PTR(-EBUSY))
496 return;
497
498 h->busy_configuring = 0;
499 }
500
501 static const struct seq_operations cciss_seq_ops = {
502 .start = cciss_seq_start,
503 .show = cciss_seq_show,
504 .next = cciss_seq_next,
505 .stop = cciss_seq_stop,
506 };
507
508 static int cciss_seq_open(struct inode *inode, struct file *file)
509 {
510 int ret = seq_open(file, &cciss_seq_ops);
511 struct seq_file *seq = file->private_data;
512
513 if (!ret)
514 seq->private = PDE(inode)->data;
515
516 return ret;
517 }
518
519 static ssize_t
520 cciss_proc_write(struct file *file, const char __user *buf,
521 size_t length, loff_t *ppos)
522 {
523 int err;
524 char *buffer;
525
526 #ifndef CONFIG_CISS_SCSI_TAPE
527 return -EINVAL;
528 #endif
529
530 if (!buf || length > PAGE_SIZE - 1)
531 return -EINVAL;
532
533 buffer = (char *)__get_free_page(GFP_KERNEL);
534 if (!buffer)
535 return -ENOMEM;
536
537 err = -EFAULT;
538 if (copy_from_user(buffer, buf, length))
539 goto out;
540 buffer[length] = '\0';
541
542 #ifdef CONFIG_CISS_SCSI_TAPE
543 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
544 struct seq_file *seq = file->private_data;
545 ctlr_info_t *h = seq->private;
546
547 err = cciss_engage_scsi(h);
548 if (err == 0)
549 err = length;
550 } else
551 #endif /* CONFIG_CISS_SCSI_TAPE */
552 err = -EINVAL;
553 /* might be nice to have "disengage" too, but it's not
554 safely possible. (only 1 module use count, lock issues.) */
555
556 out:
557 free_page((unsigned long)buffer);
558 return err;
559 }
560
561 static const struct file_operations cciss_proc_fops = {
562 .owner = THIS_MODULE,
563 .open = cciss_seq_open,
564 .read = seq_read,
565 .llseek = seq_lseek,
566 .release = seq_release,
567 .write = cciss_proc_write,
568 };
569
570 static void __devinit cciss_procinit(ctlr_info_t *h)
571 {
572 struct proc_dir_entry *pde;
573
574 if (proc_cciss == NULL)
575 proc_cciss = proc_mkdir("driver/cciss", NULL);
576 if (!proc_cciss)
577 return;
578 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
579 S_IROTH, proc_cciss,
580 &cciss_proc_fops, h);
581 }
582 #endif /* CONFIG_PROC_FS */
583
584 #define MAX_PRODUCT_NAME_LEN 19
585
586 #define to_hba(n) container_of(n, struct ctlr_info, dev)
587 #define to_drv(n) container_of(n, drive_info_struct, dev)
588
589 static ssize_t host_store_rescan(struct device *dev,
590 struct device_attribute *attr,
591 const char *buf, size_t count)
592 {
593 struct ctlr_info *h = to_hba(dev);
594
595 add_to_scan_list(h);
596 wake_up_process(cciss_scan_thread);
597 wait_for_completion_interruptible(&h->scan_wait);
598
599 return count;
600 }
601 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
602
603 static ssize_t dev_show_unique_id(struct device *dev,
604 struct device_attribute *attr,
605 char *buf)
606 {
607 drive_info_struct *drv = to_drv(dev);
608 struct ctlr_info *h = to_hba(drv->dev.parent);
609 __u8 sn[16];
610 unsigned long flags;
611 int ret = 0;
612
613 spin_lock_irqsave(&h->lock, flags);
614 if (h->busy_configuring)
615 ret = -EBUSY;
616 else
617 memcpy(sn, drv->serial_no, sizeof(sn));
618 spin_unlock_irqrestore(&h->lock, flags);
619
620 if (ret)
621 return ret;
622 else
623 return snprintf(buf, 16 * 2 + 2,
624 "%02X%02X%02X%02X%02X%02X%02X%02X"
625 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
626 sn[0], sn[1], sn[2], sn[3],
627 sn[4], sn[5], sn[6], sn[7],
628 sn[8], sn[9], sn[10], sn[11],
629 sn[12], sn[13], sn[14], sn[15]);
630 }
631 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
632
633 static ssize_t dev_show_vendor(struct device *dev,
634 struct device_attribute *attr,
635 char *buf)
636 {
637 drive_info_struct *drv = to_drv(dev);
638 struct ctlr_info *h = to_hba(drv->dev.parent);
639 char vendor[VENDOR_LEN + 1];
640 unsigned long flags;
641 int ret = 0;
642
643 spin_lock_irqsave(&h->lock, flags);
644 if (h->busy_configuring)
645 ret = -EBUSY;
646 else
647 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
648 spin_unlock_irqrestore(&h->lock, flags);
649
650 if (ret)
651 return ret;
652 else
653 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
654 }
655 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
656
657 static ssize_t dev_show_model(struct device *dev,
658 struct device_attribute *attr,
659 char *buf)
660 {
661 drive_info_struct *drv = to_drv(dev);
662 struct ctlr_info *h = to_hba(drv->dev.parent);
663 char model[MODEL_LEN + 1];
664 unsigned long flags;
665 int ret = 0;
666
667 spin_lock_irqsave(&h->lock, flags);
668 if (h->busy_configuring)
669 ret = -EBUSY;
670 else
671 memcpy(model, drv->model, MODEL_LEN + 1);
672 spin_unlock_irqrestore(&h->lock, flags);
673
674 if (ret)
675 return ret;
676 else
677 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
678 }
679 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
680
681 static ssize_t dev_show_rev(struct device *dev,
682 struct device_attribute *attr,
683 char *buf)
684 {
685 drive_info_struct *drv = to_drv(dev);
686 struct ctlr_info *h = to_hba(drv->dev.parent);
687 char rev[REV_LEN + 1];
688 unsigned long flags;
689 int ret = 0;
690
691 spin_lock_irqsave(&h->lock, flags);
692 if (h->busy_configuring)
693 ret = -EBUSY;
694 else
695 memcpy(rev, drv->rev, REV_LEN + 1);
696 spin_unlock_irqrestore(&h->lock, flags);
697
698 if (ret)
699 return ret;
700 else
701 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
702 }
703 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
704
705 static ssize_t cciss_show_lunid(struct device *dev,
706 struct device_attribute *attr, char *buf)
707 {
708 drive_info_struct *drv = to_drv(dev);
709 struct ctlr_info *h = to_hba(drv->dev.parent);
710 unsigned long flags;
711 unsigned char lunid[8];
712
713 spin_lock_irqsave(&h->lock, flags);
714 if (h->busy_configuring) {
715 spin_unlock_irqrestore(&h->lock, flags);
716 return -EBUSY;
717 }
718 if (!drv->heads) {
719 spin_unlock_irqrestore(&h->lock, flags);
720 return -ENOTTY;
721 }
722 memcpy(lunid, drv->LunID, sizeof(lunid));
723 spin_unlock_irqrestore(&h->lock, flags);
724 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
725 lunid[0], lunid[1], lunid[2], lunid[3],
726 lunid[4], lunid[5], lunid[6], lunid[7]);
727 }
728 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
729
730 static ssize_t cciss_show_raid_level(struct device *dev,
731 struct device_attribute *attr, char *buf)
732 {
733 drive_info_struct *drv = to_drv(dev);
734 struct ctlr_info *h = to_hba(drv->dev.parent);
735 int raid;
736 unsigned long flags;
737
738 spin_lock_irqsave(&h->lock, flags);
739 if (h->busy_configuring) {
740 spin_unlock_irqrestore(&h->lock, flags);
741 return -EBUSY;
742 }
743 raid = drv->raid_level;
744 spin_unlock_irqrestore(&h->lock, flags);
745 if (raid < 0 || raid > RAID_UNKNOWN)
746 raid = RAID_UNKNOWN;
747
748 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
749 raid_label[raid]);
750 }
751 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
752
753 static ssize_t cciss_show_usage_count(struct device *dev,
754 struct device_attribute *attr, char *buf)
755 {
756 drive_info_struct *drv = to_drv(dev);
757 struct ctlr_info *h = to_hba(drv->dev.parent);
758 unsigned long flags;
759 int count;
760
761 spin_lock_irqsave(&h->lock, flags);
762 if (h->busy_configuring) {
763 spin_unlock_irqrestore(&h->lock, flags);
764 return -EBUSY;
765 }
766 count = drv->usage_count;
767 spin_unlock_irqrestore(&h->lock, flags);
768 return snprintf(buf, 20, "%d\n", count);
769 }
770 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
771
772 static struct attribute *cciss_host_attrs[] = {
773 &dev_attr_rescan.attr,
774 NULL
775 };
776
777 static struct attribute_group cciss_host_attr_group = {
778 .attrs = cciss_host_attrs,
779 };
780
781 static const struct attribute_group *cciss_host_attr_groups[] = {
782 &cciss_host_attr_group,
783 NULL
784 };
785
786 static struct device_type cciss_host_type = {
787 .name = "cciss_host",
788 .groups = cciss_host_attr_groups,
789 .release = cciss_hba_release,
790 };
791
792 static struct attribute *cciss_dev_attrs[] = {
793 &dev_attr_unique_id.attr,
794 &dev_attr_model.attr,
795 &dev_attr_vendor.attr,
796 &dev_attr_rev.attr,
797 &dev_attr_lunid.attr,
798 &dev_attr_raid_level.attr,
799 &dev_attr_usage_count.attr,
800 NULL
801 };
802
803 static struct attribute_group cciss_dev_attr_group = {
804 .attrs = cciss_dev_attrs,
805 };
806
807 static const struct attribute_group *cciss_dev_attr_groups[] = {
808 &cciss_dev_attr_group,
809 NULL
810 };
811
812 static struct device_type cciss_dev_type = {
813 .name = "cciss_device",
814 .groups = cciss_dev_attr_groups,
815 .release = cciss_device_release,
816 };
817
818 static struct bus_type cciss_bus_type = {
819 .name = "cciss",
820 };
821
822 /*
823 * cciss_hba_release is called when the reference count
824 * of h->dev goes to zero.
825 */
826 static void cciss_hba_release(struct device *dev)
827 {
828 /*
829 * nothing to do, but need this to avoid a warning
830 * about not having a release handler from lib/kref.c.
831 */
832 }
833
834 /*
835 * Initialize sysfs entry for each controller. This sets up and registers
836 * the 'cciss#' directory for each individual controller under
837 * /sys/bus/pci/devices/<dev>/.
838 */
839 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
840 {
841 device_initialize(&h->dev);
842 h->dev.type = &cciss_host_type;
843 h->dev.bus = &cciss_bus_type;
844 dev_set_name(&h->dev, "%s", h->devname);
845 h->dev.parent = &h->pdev->dev;
846
847 return device_add(&h->dev);
848 }
849
850 /*
851 * Remove sysfs entries for an hba.
852 */
853 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
854 {
855 device_del(&h->dev);
856 put_device(&h->dev); /* final put. */
857 }
858
859 /* cciss_device_release is called when the reference count
860 * of h->drv[x]dev goes to zero.
861 */
862 static void cciss_device_release(struct device *dev)
863 {
864 drive_info_struct *drv = to_drv(dev);
865 kfree(drv);
866 }
867
868 /*
869 * Initialize sysfs for each logical drive. This sets up and registers
870 * the 'c#d#' directory for each individual logical drive under
871 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
872 * /sys/block/cciss!c#d# to this entry.
873 */
874 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
875 int drv_index)
876 {
877 struct device *dev;
878
879 if (h->drv[drv_index]->device_initialized)
880 return 0;
881
882 dev = &h->drv[drv_index]->dev;
883 device_initialize(dev);
884 dev->type = &cciss_dev_type;
885 dev->bus = &cciss_bus_type;
886 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
887 dev->parent = &h->dev;
888 h->drv[drv_index]->device_initialized = 1;
889 return device_add(dev);
890 }
891
892 /*
893 * Remove sysfs entries for a logical drive.
894 */
895 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
896 int ctlr_exiting)
897 {
898 struct device *dev = &h->drv[drv_index]->dev;
899
900 /* special case for c*d0, we only destroy it on controller exit */
901 if (drv_index == 0 && !ctlr_exiting)
902 return;
903
904 device_del(dev);
905 put_device(dev); /* the "final" put. */
906 h->drv[drv_index] = NULL;
907 }
908
909 /*
910 * For operations that cannot sleep, a command block is allocated at init,
911 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
912 * which ones are free or in use.
913 */
914 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
915 {
916 CommandList_struct *c;
917 int i;
918 u64bit temp64;
919 dma_addr_t cmd_dma_handle, err_dma_handle;
920
921 do {
922 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
923 if (i == h->nr_cmds)
924 return NULL;
925 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
926 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
927 c = h->cmd_pool + i;
928 memset(c, 0, sizeof(CommandList_struct));
929 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
930 c->err_info = h->errinfo_pool + i;
931 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
932 err_dma_handle = h->errinfo_pool_dhandle
933 + i * sizeof(ErrorInfo_struct);
934 h->nr_allocs++;
935
936 c->cmdindex = i;
937
938 INIT_HLIST_NODE(&c->list);
939 c->busaddr = (__u32) cmd_dma_handle;
940 temp64.val = (__u64) err_dma_handle;
941 c->ErrDesc.Addr.lower = temp64.val32.lower;
942 c->ErrDesc.Addr.upper = temp64.val32.upper;
943 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
944
945 c->ctlr = h->ctlr;
946 return c;
947 }
948
949 /* allocate a command using pci_alloc_consistent, used for ioctls,
950 * etc., not for the main i/o path.
951 */
952 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
953 {
954 CommandList_struct *c;
955 u64bit temp64;
956 dma_addr_t cmd_dma_handle, err_dma_handle;
957
958 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
959 sizeof(CommandList_struct), &cmd_dma_handle);
960 if (c == NULL)
961 return NULL;
962 memset(c, 0, sizeof(CommandList_struct));
963
964 c->cmdindex = -1;
965
966 c->err_info = (ErrorInfo_struct *)
967 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
968 &err_dma_handle);
969
970 if (c->err_info == NULL) {
971 pci_free_consistent(h->pdev,
972 sizeof(CommandList_struct), c, cmd_dma_handle);
973 return NULL;
974 }
975 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
976
977 INIT_HLIST_NODE(&c->list);
978 c->busaddr = (__u32) cmd_dma_handle;
979 temp64.val = (__u64) err_dma_handle;
980 c->ErrDesc.Addr.lower = temp64.val32.lower;
981 c->ErrDesc.Addr.upper = temp64.val32.upper;
982 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
983
984 c->ctlr = h->ctlr;
985 return c;
986 }
987
988 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
989 {
990 int i;
991
992 i = c - h->cmd_pool;
993 clear_bit(i & (BITS_PER_LONG - 1),
994 h->cmd_pool_bits + (i / BITS_PER_LONG));
995 h->nr_frees++;
996 }
997
998 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
999 {
1000 u64bit temp64;
1001
1002 temp64.val32.lower = c->ErrDesc.Addr.lower;
1003 temp64.val32.upper = c->ErrDesc.Addr.upper;
1004 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1005 c->err_info, (dma_addr_t) temp64.val);
1006 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1007 c, (dma_addr_t) c->busaddr);
1008 }
1009
1010 static inline ctlr_info_t *get_host(struct gendisk *disk)
1011 {
1012 return disk->queue->queuedata;
1013 }
1014
1015 static inline drive_info_struct *get_drv(struct gendisk *disk)
1016 {
1017 return disk->private_data;
1018 }
1019
1020 /*
1021 * Open. Make sure the device is really there.
1022 */
1023 static int cciss_open(struct block_device *bdev, fmode_t mode)
1024 {
1025 ctlr_info_t *h = get_host(bdev->bd_disk);
1026 drive_info_struct *drv = get_drv(bdev->bd_disk);
1027
1028 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1029 if (drv->busy_configuring)
1030 return -EBUSY;
1031 /*
1032 * Root is allowed to open raw volume zero even if it's not configured
1033 * so array config can still work. Root is also allowed to open any
1034 * volume that has a LUN ID, so it can issue IOCTL to reread the
1035 * disk information. I don't think I really like this
1036 * but I'm already using way to many device nodes to claim another one
1037 * for "raw controller".
1038 */
1039 if (drv->heads == 0) {
1040 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1041 /* if not node 0 make sure it is a partition = 0 */
1042 if (MINOR(bdev->bd_dev) & 0x0f) {
1043 return -ENXIO;
1044 /* if it is, make sure we have a LUN ID */
1045 } else if (memcmp(drv->LunID, CTLR_LUNID,
1046 sizeof(drv->LunID))) {
1047 return -ENXIO;
1048 }
1049 }
1050 if (!capable(CAP_SYS_ADMIN))
1051 return -EPERM;
1052 }
1053 drv->usage_count++;
1054 h->usage_count++;
1055 return 0;
1056 }
1057
1058 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1059 {
1060 int ret;
1061
1062 lock_kernel();
1063 ret = cciss_open(bdev, mode);
1064 unlock_kernel();
1065
1066 return ret;
1067 }
1068
1069 /*
1070 * Close. Sync first.
1071 */
1072 static int cciss_release(struct gendisk *disk, fmode_t mode)
1073 {
1074 ctlr_info_t *h;
1075 drive_info_struct *drv;
1076
1077 lock_kernel();
1078 h = get_host(disk);
1079 drv = get_drv(disk);
1080 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1081 drv->usage_count--;
1082 h->usage_count--;
1083 unlock_kernel();
1084 return 0;
1085 }
1086
1087 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1088 unsigned cmd, unsigned long arg)
1089 {
1090 int ret;
1091 lock_kernel();
1092 ret = cciss_ioctl(bdev, mode, cmd, arg);
1093 unlock_kernel();
1094 return ret;
1095 }
1096
1097 #ifdef CONFIG_COMPAT
1098
1099 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1101 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1102 unsigned cmd, unsigned long arg);
1103
1104 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1105 unsigned cmd, unsigned long arg)
1106 {
1107 switch (cmd) {
1108 case CCISS_GETPCIINFO:
1109 case CCISS_GETINTINFO:
1110 case CCISS_SETINTINFO:
1111 case CCISS_GETNODENAME:
1112 case CCISS_SETNODENAME:
1113 case CCISS_GETHEARTBEAT:
1114 case CCISS_GETBUSTYPES:
1115 case CCISS_GETFIRMVER:
1116 case CCISS_GETDRIVVER:
1117 case CCISS_REVALIDVOLS:
1118 case CCISS_DEREGDISK:
1119 case CCISS_REGNEWDISK:
1120 case CCISS_REGNEWD:
1121 case CCISS_RESCANDISK:
1122 case CCISS_GETLUNINFO:
1123 return do_ioctl(bdev, mode, cmd, arg);
1124
1125 case CCISS_PASSTHRU32:
1126 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1127 case CCISS_BIG_PASSTHRU32:
1128 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1129
1130 default:
1131 return -ENOIOCTLCMD;
1132 }
1133 }
1134
1135 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1136 unsigned cmd, unsigned long arg)
1137 {
1138 IOCTL32_Command_struct __user *arg32 =
1139 (IOCTL32_Command_struct __user *) arg;
1140 IOCTL_Command_struct arg64;
1141 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1142 int err;
1143 u32 cp;
1144
1145 err = 0;
1146 err |=
1147 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1148 sizeof(arg64.LUN_info));
1149 err |=
1150 copy_from_user(&arg64.Request, &arg32->Request,
1151 sizeof(arg64.Request));
1152 err |=
1153 copy_from_user(&arg64.error_info, &arg32->error_info,
1154 sizeof(arg64.error_info));
1155 err |= get_user(arg64.buf_size, &arg32->buf_size);
1156 err |= get_user(cp, &arg32->buf);
1157 arg64.buf = compat_ptr(cp);
1158 err |= copy_to_user(p, &arg64, sizeof(arg64));
1159
1160 if (err)
1161 return -EFAULT;
1162
1163 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1164 if (err)
1165 return err;
1166 err |=
1167 copy_in_user(&arg32->error_info, &p->error_info,
1168 sizeof(arg32->error_info));
1169 if (err)
1170 return -EFAULT;
1171 return err;
1172 }
1173
1174 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1175 unsigned cmd, unsigned long arg)
1176 {
1177 BIG_IOCTL32_Command_struct __user *arg32 =
1178 (BIG_IOCTL32_Command_struct __user *) arg;
1179 BIG_IOCTL_Command_struct arg64;
1180 BIG_IOCTL_Command_struct __user *p =
1181 compat_alloc_user_space(sizeof(arg64));
1182 int err;
1183 u32 cp;
1184
1185 err = 0;
1186 err |=
1187 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1188 sizeof(arg64.LUN_info));
1189 err |=
1190 copy_from_user(&arg64.Request, &arg32->Request,
1191 sizeof(arg64.Request));
1192 err |=
1193 copy_from_user(&arg64.error_info, &arg32->error_info,
1194 sizeof(arg64.error_info));
1195 err |= get_user(arg64.buf_size, &arg32->buf_size);
1196 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1197 err |= get_user(cp, &arg32->buf);
1198 arg64.buf = compat_ptr(cp);
1199 err |= copy_to_user(p, &arg64, sizeof(arg64));
1200
1201 if (err)
1202 return -EFAULT;
1203
1204 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1205 if (err)
1206 return err;
1207 err |=
1208 copy_in_user(&arg32->error_info, &p->error_info,
1209 sizeof(arg32->error_info));
1210 if (err)
1211 return -EFAULT;
1212 return err;
1213 }
1214 #endif
1215
1216 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1217 {
1218 drive_info_struct *drv = get_drv(bdev->bd_disk);
1219
1220 if (!drv->cylinders)
1221 return -ENXIO;
1222
1223 geo->heads = drv->heads;
1224 geo->sectors = drv->sectors;
1225 geo->cylinders = drv->cylinders;
1226 return 0;
1227 }
1228
1229 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1230 {
1231 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1232 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1233 (void)check_for_unit_attention(h, c);
1234 }
1235 /*
1236 * ioctl
1237 */
1238 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1239 unsigned int cmd, unsigned long arg)
1240 {
1241 struct gendisk *disk = bdev->bd_disk;
1242 ctlr_info_t *h = get_host(disk);
1243 drive_info_struct *drv = get_drv(disk);
1244 void __user *argp = (void __user *)arg;
1245
1246 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1247 cmd, arg);
1248 switch (cmd) {
1249 case CCISS_GETPCIINFO:
1250 {
1251 cciss_pci_info_struct pciinfo;
1252
1253 if (!arg)
1254 return -EINVAL;
1255 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1256 pciinfo.bus = h->pdev->bus->number;
1257 pciinfo.dev_fn = h->pdev->devfn;
1258 pciinfo.board_id = h->board_id;
1259 if (copy_to_user
1260 (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1261 return -EFAULT;
1262 return 0;
1263 }
1264 case CCISS_GETINTINFO:
1265 {
1266 cciss_coalint_struct intinfo;
1267 if (!arg)
1268 return -EINVAL;
1269 intinfo.delay =
1270 readl(&h->cfgtable->HostWrite.CoalIntDelay);
1271 intinfo.count =
1272 readl(&h->cfgtable->HostWrite.CoalIntCount);
1273 if (copy_to_user
1274 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1275 return -EFAULT;
1276 return 0;
1277 }
1278 case CCISS_SETINTINFO:
1279 {
1280 cciss_coalint_struct intinfo;
1281 unsigned long flags;
1282 int i;
1283
1284 if (!arg)
1285 return -EINVAL;
1286 if (!capable(CAP_SYS_ADMIN))
1287 return -EPERM;
1288 if (copy_from_user
1289 (&intinfo, argp, sizeof(cciss_coalint_struct)))
1290 return -EFAULT;
1291 if ((intinfo.delay == 0) && (intinfo.count == 0))
1292 return -EINVAL;
1293 spin_lock_irqsave(&h->lock, flags);
1294 /* Update the field, and then ring the doorbell */
1295 writel(intinfo.delay,
1296 &(h->cfgtable->HostWrite.CoalIntDelay));
1297 writel(intinfo.count,
1298 &(h->cfgtable->HostWrite.CoalIntCount));
1299 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1300
1301 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1302 if (!(readl(h->vaddr + SA5_DOORBELL)
1303 & CFGTBL_ChangeReq))
1304 break;
1305 /* delay and try again */
1306 udelay(1000);
1307 }
1308 spin_unlock_irqrestore(&h->lock, flags);
1309 if (i >= MAX_IOCTL_CONFIG_WAIT)
1310 return -EAGAIN;
1311 return 0;
1312 }
1313 case CCISS_GETNODENAME:
1314 {
1315 NodeName_type NodeName;
1316 int i;
1317
1318 if (!arg)
1319 return -EINVAL;
1320 for (i = 0; i < 16; i++)
1321 NodeName[i] =
1322 readb(&h->cfgtable->ServerName[i]);
1323 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1324 return -EFAULT;
1325 return 0;
1326 }
1327 case CCISS_SETNODENAME:
1328 {
1329 NodeName_type NodeName;
1330 unsigned long flags;
1331 int i;
1332
1333 if (!arg)
1334 return -EINVAL;
1335 if (!capable(CAP_SYS_ADMIN))
1336 return -EPERM;
1337
1338 if (copy_from_user
1339 (NodeName, argp, sizeof(NodeName_type)))
1340 return -EFAULT;
1341
1342 spin_lock_irqsave(&h->lock, flags);
1343
1344 /* Update the field, and then ring the doorbell */
1345 for (i = 0; i < 16; i++)
1346 writeb(NodeName[i],
1347 &h->cfgtable->ServerName[i]);
1348
1349 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1350
1351 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1352 if (!(readl(h->vaddr + SA5_DOORBELL)
1353 & CFGTBL_ChangeReq))
1354 break;
1355 /* delay and try again */
1356 udelay(1000);
1357 }
1358 spin_unlock_irqrestore(&h->lock, flags);
1359 if (i >= MAX_IOCTL_CONFIG_WAIT)
1360 return -EAGAIN;
1361 return 0;
1362 }
1363
1364 case CCISS_GETHEARTBEAT:
1365 {
1366 Heartbeat_type heartbeat;
1367
1368 if (!arg)
1369 return -EINVAL;
1370 heartbeat = readl(&h->cfgtable->HeartBeat);
1371 if (copy_to_user
1372 (argp, &heartbeat, sizeof(Heartbeat_type)))
1373 return -EFAULT;
1374 return 0;
1375 }
1376 case CCISS_GETBUSTYPES:
1377 {
1378 BusTypes_type BusTypes;
1379
1380 if (!arg)
1381 return -EINVAL;
1382 BusTypes = readl(&h->cfgtable->BusTypes);
1383 if (copy_to_user
1384 (argp, &BusTypes, sizeof(BusTypes_type)))
1385 return -EFAULT;
1386 return 0;
1387 }
1388 case CCISS_GETFIRMVER:
1389 {
1390 FirmwareVer_type firmware;
1391
1392 if (!arg)
1393 return -EINVAL;
1394 memcpy(firmware, h->firm_ver, 4);
1395
1396 if (copy_to_user
1397 (argp, firmware, sizeof(FirmwareVer_type)))
1398 return -EFAULT;
1399 return 0;
1400 }
1401 case CCISS_GETDRIVVER:
1402 {
1403 DriverVer_type DriverVer = DRIVER_VERSION;
1404
1405 if (!arg)
1406 return -EINVAL;
1407
1408 if (copy_to_user
1409 (argp, &DriverVer, sizeof(DriverVer_type)))
1410 return -EFAULT;
1411 return 0;
1412 }
1413
1414 case CCISS_DEREGDISK:
1415 case CCISS_REGNEWD:
1416 case CCISS_REVALIDVOLS:
1417 return rebuild_lun_table(h, 0, 1);
1418
1419 case CCISS_GETLUNINFO:{
1420 LogvolInfo_struct luninfo;
1421
1422 memcpy(&luninfo.LunID, drv->LunID,
1423 sizeof(luninfo.LunID));
1424 luninfo.num_opens = drv->usage_count;
1425 luninfo.num_parts = 0;
1426 if (copy_to_user(argp, &luninfo,
1427 sizeof(LogvolInfo_struct)))
1428 return -EFAULT;
1429 return 0;
1430 }
1431 case CCISS_PASSTHRU:
1432 {
1433 IOCTL_Command_struct iocommand;
1434 CommandList_struct *c;
1435 char *buff = NULL;
1436 u64bit temp64;
1437 DECLARE_COMPLETION_ONSTACK(wait);
1438
1439 if (!arg)
1440 return -EINVAL;
1441
1442 if (!capable(CAP_SYS_RAWIO))
1443 return -EPERM;
1444
1445 if (copy_from_user
1446 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1447 return -EFAULT;
1448 if ((iocommand.buf_size < 1) &&
1449 (iocommand.Request.Type.Direction != XFER_NONE)) {
1450 return -EINVAL;
1451 }
1452 #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
1453 /* Check kmalloc limits */
1454 if (iocommand.buf_size > 128000)
1455 return -EINVAL;
1456 #endif
1457 if (iocommand.buf_size > 0) {
1458 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1459 if (buff == NULL)
1460 return -EFAULT;
1461 }
1462 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1463 /* Copy the data into the buffer we created */
1464 if (copy_from_user
1465 (buff, iocommand.buf, iocommand.buf_size)) {
1466 kfree(buff);
1467 return -EFAULT;
1468 }
1469 } else {
1470 memset(buff, 0, iocommand.buf_size);
1471 }
1472 c = cmd_special_alloc(h);
1473 if (!c) {
1474 kfree(buff);
1475 return -ENOMEM;
1476 }
1477 /* Fill in the command type */
1478 c->cmd_type = CMD_IOCTL_PEND;
1479 /* Fill in Command Header */
1480 c->Header.ReplyQueue = 0; /* unused in simple mode */
1481 if (iocommand.buf_size > 0) /* buffer to fill */
1482 {
1483 c->Header.SGList = 1;
1484 c->Header.SGTotal = 1;
1485 } else /* no buffers to fill */
1486 {
1487 c->Header.SGList = 0;
1488 c->Header.SGTotal = 0;
1489 }
1490 c->Header.LUN = iocommand.LUN_info;
1491 /* use the kernel address the cmd block for tag */
1492 c->Header.Tag.lower = c->busaddr;
1493
1494 /* Fill in Request block */
1495 c->Request = iocommand.Request;
1496
1497 /* Fill in the scatter gather information */
1498 if (iocommand.buf_size > 0) {
1499 temp64.val = pci_map_single(h->pdev, buff,
1500 iocommand.buf_size,
1501 PCI_DMA_BIDIRECTIONAL);
1502 c->SG[0].Addr.lower = temp64.val32.lower;
1503 c->SG[0].Addr.upper = temp64.val32.upper;
1504 c->SG[0].Len = iocommand.buf_size;
1505 c->SG[0].Ext = 0; /* we are not chaining */
1506 }
1507 c->waiting = &wait;
1508
1509 enqueue_cmd_and_start_io(h, c);
1510 wait_for_completion(&wait);
1511
1512 /* unlock the buffers from DMA */
1513 temp64.val32.lower = c->SG[0].Addr.lower;
1514 temp64.val32.upper = c->SG[0].Addr.upper;
1515 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
1516 iocommand.buf_size,
1517 PCI_DMA_BIDIRECTIONAL);
1518
1519 check_ioctl_unit_attention(h, c);
1520
1521 /* Copy the error information out */
1522 iocommand.error_info = *(c->err_info);
1523 if (copy_to_user
1524 (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1525 kfree(buff);
1526 cmd_special_free(h, c);
1527 return -EFAULT;
1528 }
1529
1530 if (iocommand.Request.Type.Direction == XFER_READ) {
1531 /* Copy the data out of the buffer we created */
1532 if (copy_to_user
1533 (iocommand.buf, buff, iocommand.buf_size)) {
1534 kfree(buff);
1535 cmd_special_free(h, c);
1536 return -EFAULT;
1537 }
1538 }
1539 kfree(buff);
1540 cmd_special_free(h, c);
1541 return 0;
1542 }
1543 case CCISS_BIG_PASSTHRU:{
1544 BIG_IOCTL_Command_struct *ioc;
1545 CommandList_struct *c;
1546 unsigned char **buff = NULL;
1547 int *buff_size = NULL;
1548 u64bit temp64;
1549 BYTE sg_used = 0;
1550 int status = 0;
1551 int i;
1552 DECLARE_COMPLETION_ONSTACK(wait);
1553 __u32 left;
1554 __u32 sz;
1555 BYTE __user *data_ptr;
1556
1557 if (!arg)
1558 return -EINVAL;
1559 if (!capable(CAP_SYS_RAWIO))
1560 return -EPERM;
1561 ioc = (BIG_IOCTL_Command_struct *)
1562 kmalloc(sizeof(*ioc), GFP_KERNEL);
1563 if (!ioc) {
1564 status = -ENOMEM;
1565 goto cleanup1;
1566 }
1567 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1568 status = -EFAULT;
1569 goto cleanup1;
1570 }
1571 if ((ioc->buf_size < 1) &&
1572 (ioc->Request.Type.Direction != XFER_NONE)) {
1573 status = -EINVAL;
1574 goto cleanup1;
1575 }
1576 /* Check kmalloc limits using all SGs */
1577 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1578 status = -EINVAL;
1579 goto cleanup1;
1580 }
1581 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1582 status = -EINVAL;
1583 goto cleanup1;
1584 }
1585 buff =
1586 kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1587 if (!buff) {
1588 status = -ENOMEM;
1589 goto cleanup1;
1590 }
1591 buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
1592 GFP_KERNEL);
1593 if (!buff_size) {
1594 status = -ENOMEM;
1595 goto cleanup1;
1596 }
1597 left = ioc->buf_size;
1598 data_ptr = ioc->buf;
1599 while (left) {
1600 sz = (left >
1601 ioc->malloc_size) ? ioc->
1602 malloc_size : left;
1603 buff_size[sg_used] = sz;
1604 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1605 if (buff[sg_used] == NULL) {
1606 status = -ENOMEM;
1607 goto cleanup1;
1608 }
1609 if (ioc->Request.Type.Direction == XFER_WRITE) {
1610 if (copy_from_user
1611 (buff[sg_used], data_ptr, sz)) {
1612 status = -EFAULT;
1613 goto cleanup1;
1614 }
1615 } else {
1616 memset(buff[sg_used], 0, sz);
1617 }
1618 left -= sz;
1619 data_ptr += sz;
1620 sg_used++;
1621 }
1622 c = cmd_special_alloc(h);
1623 if (!c) {
1624 status = -ENOMEM;
1625 goto cleanup1;
1626 }
1627 c->cmd_type = CMD_IOCTL_PEND;
1628 c->Header.ReplyQueue = 0;
1629
1630 if (ioc->buf_size > 0) {
1631 c->Header.SGList = sg_used;
1632 c->Header.SGTotal = sg_used;
1633 } else {
1634 c->Header.SGList = 0;
1635 c->Header.SGTotal = 0;
1636 }
1637 c->Header.LUN = ioc->LUN_info;
1638 c->Header.Tag.lower = c->busaddr;
1639
1640 c->Request = ioc->Request;
1641 if (ioc->buf_size > 0) {
1642 for (i = 0; i < sg_used; i++) {
1643 temp64.val =
1644 pci_map_single(h->pdev, buff[i],
1645 buff_size[i],
1646 PCI_DMA_BIDIRECTIONAL);
1647 c->SG[i].Addr.lower =
1648 temp64.val32.lower;
1649 c->SG[i].Addr.upper =
1650 temp64.val32.upper;
1651 c->SG[i].Len = buff_size[i];
1652 c->SG[i].Ext = 0; /* we are not chaining */
1653 }
1654 }
1655 c->waiting = &wait;
1656 enqueue_cmd_and_start_io(h, c);
1657 wait_for_completion(&wait);
1658 /* unlock the buffers from DMA */
1659 for (i = 0; i < sg_used; i++) {
1660 temp64.val32.lower = c->SG[i].Addr.lower;
1661 temp64.val32.upper = c->SG[i].Addr.upper;
1662 pci_unmap_single(h->pdev,
1663 (dma_addr_t) temp64.val, buff_size[i],
1664 PCI_DMA_BIDIRECTIONAL);
1665 }
1666 check_ioctl_unit_attention(h, c);
1667 /* Copy the error information out */
1668 ioc->error_info = *(c->err_info);
1669 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1670 cmd_special_free(h, c);
1671 status = -EFAULT;
1672 goto cleanup1;
1673 }
1674 if (ioc->Request.Type.Direction == XFER_READ) {
1675 /* Copy the data out of the buffer we created */
1676 BYTE __user *ptr = ioc->buf;
1677 for (i = 0; i < sg_used; i++) {
1678 if (copy_to_user
1679 (ptr, buff[i], buff_size[i])) {
1680 cmd_special_free(h, c);
1681 status = -EFAULT;
1682 goto cleanup1;
1683 }
1684 ptr += buff_size[i];
1685 }
1686 }
1687 cmd_special_free(h, c);
1688 status = 0;
1689 cleanup1:
1690 if (buff) {
1691 for (i = 0; i < sg_used; i++)
1692 kfree(buff[i]);
1693 kfree(buff);
1694 }
1695 kfree(buff_size);
1696 kfree(ioc);
1697 return status;
1698 }
1699
1700 /* scsi_cmd_ioctl handles these, below, though some are not */
1701 /* very meaningful for cciss. SG_IO is the main one people want. */
1702
1703 case SG_GET_VERSION_NUM:
1704 case SG_SET_TIMEOUT:
1705 case SG_GET_TIMEOUT:
1706 case SG_GET_RESERVED_SIZE:
1707 case SG_SET_RESERVED_SIZE:
1708 case SG_EMULATED_HOST:
1709 case SG_IO:
1710 case SCSI_IOCTL_SEND_COMMAND:
1711 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
1712
1713 /* scsi_cmd_ioctl would normally handle these, below, but */
1714 /* they aren't a good fit for cciss, as CD-ROMs are */
1715 /* not supported, and we don't have any bus/target/lun */
1716 /* which we present to the kernel. */
1717
1718 case CDROM_SEND_PACKET:
1719 case CDROMCLOSETRAY:
1720 case CDROMEJECT:
1721 case SCSI_IOCTL_GET_IDLUN:
1722 case SCSI_IOCTL_GET_BUS_NUMBER:
1723 default:
1724 return -ENOTTY;
1725 }
1726 }
1727
1728 static void cciss_check_queues(ctlr_info_t *h)
1729 {
1730 int start_queue = h->next_to_run;
1731 int i;
1732
1733 /* check to see if we have maxed out the number of commands that can
1734 * be placed on the queue. If so then exit. We do this check here
1735 * in case the interrupt we serviced was from an ioctl and did not
1736 * free any new commands.
1737 */
1738 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1739 return;
1740
1741 /* We have room on the queue for more commands. Now we need to queue
1742 * them up. We will also keep track of the next queue to run so
1743 * that every queue gets a chance to be started first.
1744 */
1745 for (i = 0; i < h->highest_lun + 1; i++) {
1746 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1747 /* make sure the disk has been added and the drive is real
1748 * because this can be called from the middle of init_one.
1749 */
1750 if (!h->drv[curr_queue])
1751 continue;
1752 if (!(h->drv[curr_queue]->queue) ||
1753 !(h->drv[curr_queue]->heads))
1754 continue;
1755 blk_start_queue(h->gendisk[curr_queue]->queue);
1756
1757 /* check to see if we have maxed out the number of commands
1758 * that can be placed on the queue.
1759 */
1760 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1761 if (curr_queue == start_queue) {
1762 h->next_to_run =
1763 (start_queue + 1) % (h->highest_lun + 1);
1764 break;
1765 } else {
1766 h->next_to_run = curr_queue;
1767 break;
1768 }
1769 }
1770 }
1771 }
1772
1773 static void cciss_softirq_done(struct request *rq)
1774 {
1775 CommandList_struct *c = rq->completion_data;
1776 ctlr_info_t *h = hba[c->ctlr];
1777 SGDescriptor_struct *curr_sg = c->SG;
1778 u64bit temp64;
1779 unsigned long flags;
1780 int i, ddir;
1781 int sg_index = 0;
1782
1783 if (c->Request.Type.Direction == XFER_READ)
1784 ddir = PCI_DMA_FROMDEVICE;
1785 else
1786 ddir = PCI_DMA_TODEVICE;
1787
1788 /* command did not need to be retried */
1789 /* unmap the DMA mapping for all the scatter gather elements */
1790 for (i = 0; i < c->Header.SGList; i++) {
1791 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1792 cciss_unmap_sg_chain_block(h, c);
1793 /* Point to the next block */
1794 curr_sg = h->cmd_sg_list[c->cmdindex];
1795 sg_index = 0;
1796 }
1797 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1798 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1799 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1800 ddir);
1801 ++sg_index;
1802 }
1803
1804 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1805
1806 /* set the residual count for pc requests */
1807 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1808 rq->resid_len = c->err_info->ResidualCnt;
1809
1810 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1811
1812 spin_lock_irqsave(&h->lock, flags);
1813 cmd_free(h, c);
1814 cciss_check_queues(h);
1815 spin_unlock_irqrestore(&h->lock, flags);
1816 }
1817
1818 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1819 unsigned char scsi3addr[], uint32_t log_unit)
1820 {
1821 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1822 sizeof(h->drv[log_unit]->LunID));
1823 }
1824
1825 /* This function gets the SCSI vendor, model, and revision of a logical drive
1826 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1827 * they cannot be read.
1828 */
1829 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1830 char *vendor, char *model, char *rev)
1831 {
1832 int rc;
1833 InquiryData_struct *inq_buf;
1834 unsigned char scsi3addr[8];
1835
1836 *vendor = '\0';
1837 *model = '\0';
1838 *rev = '\0';
1839
1840 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1841 if (!inq_buf)
1842 return;
1843
1844 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1845 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1846 scsi3addr, TYPE_CMD);
1847 if (rc == IO_OK) {
1848 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1849 vendor[VENDOR_LEN] = '\0';
1850 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1851 model[MODEL_LEN] = '\0';
1852 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1853 rev[REV_LEN] = '\0';
1854 }
1855
1856 kfree(inq_buf);
1857 return;
1858 }
1859
1860 /* This function gets the serial number of a logical drive via
1861 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1862 * number cannot be had, for whatever reason, 16 bytes of 0xff
1863 * are returned instead.
1864 */
1865 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1866 unsigned char *serial_no, int buflen)
1867 {
1868 #define PAGE_83_INQ_BYTES 64
1869 int rc;
1870 unsigned char *buf;
1871 unsigned char scsi3addr[8];
1872
1873 if (buflen > 16)
1874 buflen = 16;
1875 memset(serial_no, 0xff, buflen);
1876 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1877 if (!buf)
1878 return;
1879 memset(serial_no, 0, buflen);
1880 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1881 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1882 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1883 if (rc == IO_OK)
1884 memcpy(serial_no, &buf[8], buflen);
1885 kfree(buf);
1886 return;
1887 }
1888
1889 /*
1890 * cciss_add_disk sets up the block device queue for a logical drive
1891 */
1892 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1893 int drv_index)
1894 {
1895 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1896 if (!disk->queue)
1897 goto init_queue_failure;
1898 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1899 disk->major = h->major;
1900 disk->first_minor = drv_index << NWD_SHIFT;
1901 disk->fops = &cciss_fops;
1902 if (cciss_create_ld_sysfs_entry(h, drv_index))
1903 goto cleanup_queue;
1904 disk->private_data = h->drv[drv_index];
1905 disk->driverfs_dev = &h->drv[drv_index]->dev;
1906
1907 /* Set up queue information */
1908 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1909
1910 /* This is a hardware imposed limit. */
1911 blk_queue_max_segments(disk->queue, h->maxsgentries);
1912
1913 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1914
1915 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1916
1917 disk->queue->queuedata = h;
1918
1919 blk_queue_logical_block_size(disk->queue,
1920 h->drv[drv_index]->block_size);
1921
1922 /* Make sure all queue data is written out before */
1923 /* setting h->drv[drv_index]->queue, as setting this */
1924 /* allows the interrupt handler to start the queue */
1925 wmb();
1926 h->drv[drv_index]->queue = disk->queue;
1927 add_disk(disk);
1928 return 0;
1929
1930 cleanup_queue:
1931 blk_cleanup_queue(disk->queue);
1932 disk->queue = NULL;
1933 init_queue_failure:
1934 return -1;
1935 }
1936
1937 /* This function will check the usage_count of the drive to be updated/added.
1938 * If the usage_count is zero and it is a heretofore unknown drive, or,
1939 * the drive's capacity, geometry, or serial number has changed,
1940 * then the drive information will be updated and the disk will be
1941 * re-registered with the kernel. If these conditions don't hold,
1942 * then it will be left alone for the next reboot. The exception to this
1943 * is disk 0 which will always be left registered with the kernel since it
1944 * is also the controller node. Any changes to disk 0 will show up on
1945 * the next reboot.
1946 */
1947 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1948 int first_time, int via_ioctl)
1949 {
1950 struct gendisk *disk;
1951 InquiryData_struct *inq_buff = NULL;
1952 unsigned int block_size;
1953 sector_t total_size;
1954 unsigned long flags = 0;
1955 int ret = 0;
1956 drive_info_struct *drvinfo;
1957
1958 /* Get information about the disk and modify the driver structure */
1959 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1960 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1961 if (inq_buff == NULL || drvinfo == NULL)
1962 goto mem_msg;
1963
1964 /* testing to see if 16-byte CDBs are already being used */
1965 if (h->cciss_read == CCISS_READ_16) {
1966 cciss_read_capacity_16(h, drv_index,
1967 &total_size, &block_size);
1968
1969 } else {
1970 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1971 /* if read_capacity returns all F's this volume is >2TB */
1972 /* in size so we switch to 16-byte CDB's for all */
1973 /* read/write ops */
1974 if (total_size == 0xFFFFFFFFULL) {
1975 cciss_read_capacity_16(h, drv_index,
1976 &total_size, &block_size);
1977 h->cciss_read = CCISS_READ_16;
1978 h->cciss_write = CCISS_WRITE_16;
1979 } else {
1980 h->cciss_read = CCISS_READ_10;
1981 h->cciss_write = CCISS_WRITE_10;
1982 }
1983 }
1984
1985 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
1986 inq_buff, drvinfo);
1987 drvinfo->block_size = block_size;
1988 drvinfo->nr_blocks = total_size + 1;
1989
1990 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
1991 drvinfo->model, drvinfo->rev);
1992 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
1993 sizeof(drvinfo->serial_no));
1994 /* Save the lunid in case we deregister the disk, below. */
1995 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1996 sizeof(drvinfo->LunID));
1997
1998 /* Is it the same disk we already know, and nothing's changed? */
1999 if (h->drv[drv_index]->raid_level != -1 &&
2000 ((memcmp(drvinfo->serial_no,
2001 h->drv[drv_index]->serial_no, 16) == 0) &&
2002 drvinfo->block_size == h->drv[drv_index]->block_size &&
2003 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2004 drvinfo->heads == h->drv[drv_index]->heads &&
2005 drvinfo->sectors == h->drv[drv_index]->sectors &&
2006 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2007 /* The disk is unchanged, nothing to update */
2008 goto freeret;
2009
2010 /* If we get here it's not the same disk, or something's changed,
2011 * so we need to * deregister it, and re-register it, if it's not
2012 * in use.
2013 * If the disk already exists then deregister it before proceeding
2014 * (unless it's the first disk (for the controller node).
2015 */
2016 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2017 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2018 spin_lock_irqsave(&h->lock, flags);
2019 h->drv[drv_index]->busy_configuring = 1;
2020 spin_unlock_irqrestore(&h->lock, flags);
2021
2022 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2023 * which keeps the interrupt handler from starting
2024 * the queue.
2025 */
2026 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2027 }
2028
2029 /* If the disk is in use return */
2030 if (ret)
2031 goto freeret;
2032
2033 /* Save the new information from cciss_geometry_inquiry
2034 * and serial number inquiry. If the disk was deregistered
2035 * above, then h->drv[drv_index] will be NULL.
2036 */
2037 if (h->drv[drv_index] == NULL) {
2038 drvinfo->device_initialized = 0;
2039 h->drv[drv_index] = drvinfo;
2040 drvinfo = NULL; /* so it won't be freed below. */
2041 } else {
2042 /* special case for cxd0 */
2043 h->drv[drv_index]->block_size = drvinfo->block_size;
2044 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2045 h->drv[drv_index]->heads = drvinfo->heads;
2046 h->drv[drv_index]->sectors = drvinfo->sectors;
2047 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2048 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2049 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2050 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2051 VENDOR_LEN + 1);
2052 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2053 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2054 }
2055
2056 ++h->num_luns;
2057 disk = h->gendisk[drv_index];
2058 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2059
2060 /* If it's not disk 0 (drv_index != 0)
2061 * or if it was disk 0, but there was previously
2062 * no actual corresponding configured logical drive
2063 * (raid_leve == -1) then we want to update the
2064 * logical drive's information.
2065 */
2066 if (drv_index || first_time) {
2067 if (cciss_add_disk(h, disk, drv_index) != 0) {
2068 cciss_free_gendisk(h, drv_index);
2069 cciss_free_drive_info(h, drv_index);
2070 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2071 drv_index);
2072 --h->num_luns;
2073 }
2074 }
2075
2076 freeret:
2077 kfree(inq_buff);
2078 kfree(drvinfo);
2079 return;
2080 mem_msg:
2081 dev_err(&h->pdev->dev, "out of memory\n");
2082 goto freeret;
2083 }
2084
2085 /* This function will find the first index of the controllers drive array
2086 * that has a null drv pointer and allocate the drive info struct and
2087 * will return that index This is where new drives will be added.
2088 * If the index to be returned is greater than the highest_lun index for
2089 * the controller then highest_lun is set * to this new index.
2090 * If there are no available indexes or if tha allocation fails, then -1
2091 * is returned. * "controller_node" is used to know if this is a real
2092 * logical drive, or just the controller node, which determines if this
2093 * counts towards highest_lun.
2094 */
2095 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2096 {
2097 int i;
2098 drive_info_struct *drv;
2099
2100 /* Search for an empty slot for our drive info */
2101 for (i = 0; i < CISS_MAX_LUN; i++) {
2102
2103 /* if not cxd0 case, and it's occupied, skip it. */
2104 if (h->drv[i] && i != 0)
2105 continue;
2106 /*
2107 * If it's cxd0 case, and drv is alloc'ed already, and a
2108 * disk is configured there, skip it.
2109 */
2110 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2111 continue;
2112
2113 /*
2114 * We've found an empty slot. Update highest_lun
2115 * provided this isn't just the fake cxd0 controller node.
2116 */
2117 if (i > h->highest_lun && !controller_node)
2118 h->highest_lun = i;
2119
2120 /* If adding a real disk at cxd0, and it's already alloc'ed */
2121 if (i == 0 && h->drv[i] != NULL)
2122 return i;
2123
2124 /*
2125 * Found an empty slot, not already alloc'ed. Allocate it.
2126 * Mark it with raid_level == -1, so we know it's new later on.
2127 */
2128 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2129 if (!drv)
2130 return -1;
2131 drv->raid_level = -1; /* so we know it's new */
2132 h->drv[i] = drv;
2133 return i;
2134 }
2135 return -1;
2136 }
2137
2138 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2139 {
2140 kfree(h->drv[drv_index]);
2141 h->drv[drv_index] = NULL;
2142 }
2143
2144 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2145 {
2146 put_disk(h->gendisk[drv_index]);
2147 h->gendisk[drv_index] = NULL;
2148 }
2149
2150 /* cciss_add_gendisk finds a free hba[]->drv structure
2151 * and allocates a gendisk if needed, and sets the lunid
2152 * in the drvinfo structure. It returns the index into
2153 * the ->drv[] array, or -1 if none are free.
2154 * is_controller_node indicates whether highest_lun should
2155 * count this disk, or if it's only being added to provide
2156 * a means to talk to the controller in case no logical
2157 * drives have yet been configured.
2158 */
2159 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2160 int controller_node)
2161 {
2162 int drv_index;
2163
2164 drv_index = cciss_alloc_drive_info(h, controller_node);
2165 if (drv_index == -1)
2166 return -1;
2167
2168 /*Check if the gendisk needs to be allocated */
2169 if (!h->gendisk[drv_index]) {
2170 h->gendisk[drv_index] =
2171 alloc_disk(1 << NWD_SHIFT);
2172 if (!h->gendisk[drv_index]) {
2173 dev_err(&h->pdev->dev,
2174 "could not allocate a new disk %d\n",
2175 drv_index);
2176 goto err_free_drive_info;
2177 }
2178 }
2179 memcpy(h->drv[drv_index]->LunID, lunid,
2180 sizeof(h->drv[drv_index]->LunID));
2181 if (cciss_create_ld_sysfs_entry(h, drv_index))
2182 goto err_free_disk;
2183 /* Don't need to mark this busy because nobody */
2184 /* else knows about this disk yet to contend */
2185 /* for access to it. */
2186 h->drv[drv_index]->busy_configuring = 0;
2187 wmb();
2188 return drv_index;
2189
2190 err_free_disk:
2191 cciss_free_gendisk(h, drv_index);
2192 err_free_drive_info:
2193 cciss_free_drive_info(h, drv_index);
2194 return -1;
2195 }
2196
2197 /* This is for the special case of a controller which
2198 * has no logical drives. In this case, we still need
2199 * to register a disk so the controller can be accessed
2200 * by the Array Config Utility.
2201 */
2202 static void cciss_add_controller_node(ctlr_info_t *h)
2203 {
2204 struct gendisk *disk;
2205 int drv_index;
2206
2207 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2208 return;
2209
2210 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2211 if (drv_index == -1)
2212 goto error;
2213 h->drv[drv_index]->block_size = 512;
2214 h->drv[drv_index]->nr_blocks = 0;
2215 h->drv[drv_index]->heads = 0;
2216 h->drv[drv_index]->sectors = 0;
2217 h->drv[drv_index]->cylinders = 0;
2218 h->drv[drv_index]->raid_level = -1;
2219 memset(h->drv[drv_index]->serial_no, 0, 16);
2220 disk = h->gendisk[drv_index];
2221 if (cciss_add_disk(h, disk, drv_index) == 0)
2222 return;
2223 cciss_free_gendisk(h, drv_index);
2224 cciss_free_drive_info(h, drv_index);
2225 error:
2226 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2227 return;
2228 }
2229
2230 /* This function will add and remove logical drives from the Logical
2231 * drive array of the controller and maintain persistency of ordering
2232 * so that mount points are preserved until the next reboot. This allows
2233 * for the removal of logical drives in the middle of the drive array
2234 * without a re-ordering of those drives.
2235 * INPUT
2236 * h = The controller to perform the operations on
2237 */
2238 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2239 int via_ioctl)
2240 {
2241 int num_luns;
2242 ReportLunData_struct *ld_buff = NULL;
2243 int return_code;
2244 int listlength = 0;
2245 int i;
2246 int drv_found;
2247 int drv_index = 0;
2248 unsigned char lunid[8] = CTLR_LUNID;
2249 unsigned long flags;
2250
2251 if (!capable(CAP_SYS_RAWIO))
2252 return -EPERM;
2253
2254 /* Set busy_configuring flag for this operation */
2255 spin_lock_irqsave(&h->lock, flags);
2256 if (h->busy_configuring) {
2257 spin_unlock_irqrestore(&h->lock, flags);
2258 return -EBUSY;
2259 }
2260 h->busy_configuring = 1;
2261 spin_unlock_irqrestore(&h->lock, flags);
2262
2263 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2264 if (ld_buff == NULL)
2265 goto mem_msg;
2266
2267 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2268 sizeof(ReportLunData_struct),
2269 0, CTLR_LUNID, TYPE_CMD);
2270
2271 if (return_code == IO_OK)
2272 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2273 else { /* reading number of logical volumes failed */
2274 dev_warn(&h->pdev->dev,
2275 "report logical volume command failed\n");
2276 listlength = 0;
2277 goto freeret;
2278 }
2279
2280 num_luns = listlength / 8; /* 8 bytes per entry */
2281 if (num_luns > CISS_MAX_LUN) {
2282 num_luns = CISS_MAX_LUN;
2283 dev_warn(&h->pdev->dev, "more luns configured"
2284 " on controller than can be handled by"
2285 " this driver.\n");
2286 }
2287
2288 if (num_luns == 0)
2289 cciss_add_controller_node(h);
2290
2291 /* Compare controller drive array to driver's drive array
2292 * to see if any drives are missing on the controller due
2293 * to action of Array Config Utility (user deletes drive)
2294 * and deregister logical drives which have disappeared.
2295 */
2296 for (i = 0; i <= h->highest_lun; i++) {
2297 int j;
2298 drv_found = 0;
2299
2300 /* skip holes in the array from already deleted drives */
2301 if (h->drv[i] == NULL)
2302 continue;
2303
2304 for (j = 0; j < num_luns; j++) {
2305 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2306 if (memcmp(h->drv[i]->LunID, lunid,
2307 sizeof(lunid)) == 0) {
2308 drv_found = 1;
2309 break;
2310 }
2311 }
2312 if (!drv_found) {
2313 /* Deregister it from the OS, it's gone. */
2314 spin_lock_irqsave(&h->lock, flags);
2315 h->drv[i]->busy_configuring = 1;
2316 spin_unlock_irqrestore(&h->lock, flags);
2317 return_code = deregister_disk(h, i, 1, via_ioctl);
2318 if (h->drv[i] != NULL)
2319 h->drv[i]->busy_configuring = 0;
2320 }
2321 }
2322
2323 /* Compare controller drive array to driver's drive array.
2324 * Check for updates in the drive information and any new drives
2325 * on the controller due to ACU adding logical drives, or changing
2326 * a logical drive's size, etc. Reregister any new/changed drives
2327 */
2328 for (i = 0; i < num_luns; i++) {
2329 int j;
2330
2331 drv_found = 0;
2332
2333 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2334 /* Find if the LUN is already in the drive array
2335 * of the driver. If so then update its info
2336 * if not in use. If it does not exist then find
2337 * the first free index and add it.
2338 */
2339 for (j = 0; j <= h->highest_lun; j++) {
2340 if (h->drv[j] != NULL &&
2341 memcmp(h->drv[j]->LunID, lunid,
2342 sizeof(h->drv[j]->LunID)) == 0) {
2343 drv_index = j;
2344 drv_found = 1;
2345 break;
2346 }
2347 }
2348
2349 /* check if the drive was found already in the array */
2350 if (!drv_found) {
2351 drv_index = cciss_add_gendisk(h, lunid, 0);
2352 if (drv_index == -1)
2353 goto freeret;
2354 }
2355 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2356 } /* end for */
2357
2358 freeret:
2359 kfree(ld_buff);
2360 h->busy_configuring = 0;
2361 /* We return -1 here to tell the ACU that we have registered/updated
2362 * all of the drives that we can and to keep it from calling us
2363 * additional times.
2364 */
2365 return -1;
2366 mem_msg:
2367 dev_err(&h->pdev->dev, "out of memory\n");
2368 h->busy_configuring = 0;
2369 goto freeret;
2370 }
2371
2372 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2373 {
2374 /* zero out the disk size info */
2375 drive_info->nr_blocks = 0;
2376 drive_info->block_size = 0;
2377 drive_info->heads = 0;
2378 drive_info->sectors = 0;
2379 drive_info->cylinders = 0;
2380 drive_info->raid_level = -1;
2381 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2382 memset(drive_info->model, 0, sizeof(drive_info->model));
2383 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2384 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2385 /*
2386 * don't clear the LUNID though, we need to remember which
2387 * one this one is.
2388 */
2389 }
2390
2391 /* This function will deregister the disk and it's queue from the
2392 * kernel. It must be called with the controller lock held and the
2393 * drv structures busy_configuring flag set. It's parameters are:
2394 *
2395 * disk = This is the disk to be deregistered
2396 * drv = This is the drive_info_struct associated with the disk to be
2397 * deregistered. It contains information about the disk used
2398 * by the driver.
2399 * clear_all = This flag determines whether or not the disk information
2400 * is going to be completely cleared out and the highest_lun
2401 * reset. Sometimes we want to clear out information about
2402 * the disk in preparation for re-adding it. In this case
2403 * the highest_lun should be left unchanged and the LunID
2404 * should not be cleared.
2405 * via_ioctl
2406 * This indicates whether we've reached this path via ioctl.
2407 * This affects the maximum usage count allowed for c0d0 to be messed with.
2408 * If this path is reached via ioctl(), then the max_usage_count will
2409 * be 1, as the process calling ioctl() has got to have the device open.
2410 * If we get here via sysfs, then the max usage count will be zero.
2411 */
2412 static int deregister_disk(ctlr_info_t *h, int drv_index,
2413 int clear_all, int via_ioctl)
2414 {
2415 int i;
2416 struct gendisk *disk;
2417 drive_info_struct *drv;
2418 int recalculate_highest_lun;
2419
2420 if (!capable(CAP_SYS_RAWIO))
2421 return -EPERM;
2422
2423 drv = h->drv[drv_index];
2424 disk = h->gendisk[drv_index];
2425
2426 /* make sure logical volume is NOT is use */
2427 if (clear_all || (h->gendisk[0] == disk)) {
2428 if (drv->usage_count > via_ioctl)
2429 return -EBUSY;
2430 } else if (drv->usage_count > 0)
2431 return -EBUSY;
2432
2433 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2434
2435 /* invalidate the devices and deregister the disk. If it is disk
2436 * zero do not deregister it but just zero out it's values. This
2437 * allows us to delete disk zero but keep the controller registered.
2438 */
2439 if (h->gendisk[0] != disk) {
2440 struct request_queue *q = disk->queue;
2441 if (disk->flags & GENHD_FL_UP) {
2442 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2443 del_gendisk(disk);
2444 }
2445 if (q)
2446 blk_cleanup_queue(q);
2447 /* If clear_all is set then we are deleting the logical
2448 * drive, not just refreshing its info. For drives
2449 * other than disk 0 we will call put_disk. We do not
2450 * do this for disk 0 as we need it to be able to
2451 * configure the controller.
2452 */
2453 if (clear_all){
2454 /* This isn't pretty, but we need to find the
2455 * disk in our array and NULL our the pointer.
2456 * This is so that we will call alloc_disk if
2457 * this index is used again later.
2458 */
2459 for (i=0; i < CISS_MAX_LUN; i++){
2460 if (h->gendisk[i] == disk) {
2461 h->gendisk[i] = NULL;
2462 break;
2463 }
2464 }
2465 put_disk(disk);
2466 }
2467 } else {
2468 set_capacity(disk, 0);
2469 cciss_clear_drive_info(drv);
2470 }
2471
2472 --h->num_luns;
2473
2474 /* if it was the last disk, find the new hightest lun */
2475 if (clear_all && recalculate_highest_lun) {
2476 int newhighest = -1;
2477 for (i = 0; i <= h->highest_lun; i++) {
2478 /* if the disk has size > 0, it is available */
2479 if (h->drv[i] && h->drv[i]->heads)
2480 newhighest = i;
2481 }
2482 h->highest_lun = newhighest;
2483 }
2484 return 0;
2485 }
2486
2487 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2488 size_t size, __u8 page_code, unsigned char *scsi3addr,
2489 int cmd_type)
2490 {
2491 u64bit buff_dma_handle;
2492 int status = IO_OK;
2493
2494 c->cmd_type = CMD_IOCTL_PEND;
2495 c->Header.ReplyQueue = 0;
2496 if (buff != NULL) {
2497 c->Header.SGList = 1;
2498 c->Header.SGTotal = 1;
2499 } else {
2500 c->Header.SGList = 0;
2501 c->Header.SGTotal = 0;
2502 }
2503 c->Header.Tag.lower = c->busaddr;
2504 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2505
2506 c->Request.Type.Type = cmd_type;
2507 if (cmd_type == TYPE_CMD) {
2508 switch (cmd) {
2509 case CISS_INQUIRY:
2510 /* are we trying to read a vital product page */
2511 if (page_code != 0) {
2512 c->Request.CDB[1] = 0x01;
2513 c->Request.CDB[2] = page_code;
2514 }
2515 c->Request.CDBLen = 6;
2516 c->Request.Type.Attribute = ATTR_SIMPLE;
2517 c->Request.Type.Direction = XFER_READ;
2518 c->Request.Timeout = 0;
2519 c->Request.CDB[0] = CISS_INQUIRY;
2520 c->Request.CDB[4] = size & 0xFF;
2521 break;
2522 case CISS_REPORT_LOG:
2523 case CISS_REPORT_PHYS:
2524 /* Talking to controller so It's a physical command
2525 mode = 00 target = 0. Nothing to write.
2526 */
2527 c->Request.CDBLen = 12;
2528 c->Request.Type.Attribute = ATTR_SIMPLE;
2529 c->Request.Type.Direction = XFER_READ;
2530 c->Request.Timeout = 0;
2531 c->Request.CDB[0] = cmd;
2532 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2533 c->Request.CDB[7] = (size >> 16) & 0xFF;
2534 c->Request.CDB[8] = (size >> 8) & 0xFF;
2535 c->Request.CDB[9] = size & 0xFF;
2536 break;
2537
2538 case CCISS_READ_CAPACITY:
2539 c->Request.CDBLen = 10;
2540 c->Request.Type.Attribute = ATTR_SIMPLE;
2541 c->Request.Type.Direction = XFER_READ;
2542 c->Request.Timeout = 0;
2543 c->Request.CDB[0] = cmd;
2544 break;
2545 case CCISS_READ_CAPACITY_16:
2546 c->Request.CDBLen = 16;
2547 c->Request.Type.Attribute = ATTR_SIMPLE;
2548 c->Request.Type.Direction = XFER_READ;
2549 c->Request.Timeout = 0;
2550 c->Request.CDB[0] = cmd;
2551 c->Request.CDB[1] = 0x10;
2552 c->Request.CDB[10] = (size >> 24) & 0xFF;
2553 c->Request.CDB[11] = (size >> 16) & 0xFF;
2554 c->Request.CDB[12] = (size >> 8) & 0xFF;
2555 c->Request.CDB[13] = size & 0xFF;
2556 c->Request.Timeout = 0;
2557 c->Request.CDB[0] = cmd;
2558 break;
2559 case CCISS_CACHE_FLUSH:
2560 c->Request.CDBLen = 12;
2561 c->Request.Type.Attribute = ATTR_SIMPLE;
2562 c->Request.Type.Direction = XFER_WRITE;
2563 c->Request.Timeout = 0;
2564 c->Request.CDB[0] = BMIC_WRITE;
2565 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2566 break;
2567 case TEST_UNIT_READY:
2568 c->Request.CDBLen = 6;
2569 c->Request.Type.Attribute = ATTR_SIMPLE;
2570 c->Request.Type.Direction = XFER_NONE;
2571 c->Request.Timeout = 0;
2572 break;
2573 default:
2574 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2575 return IO_ERROR;
2576 }
2577 } else if (cmd_type == TYPE_MSG) {
2578 switch (cmd) {
2579 case 0: /* ABORT message */
2580 c->Request.CDBLen = 12;
2581 c->Request.Type.Attribute = ATTR_SIMPLE;
2582 c->Request.Type.Direction = XFER_WRITE;
2583 c->Request.Timeout = 0;
2584 c->Request.CDB[0] = cmd; /* abort */
2585 c->Request.CDB[1] = 0; /* abort a command */
2586 /* buff contains the tag of the command to abort */
2587 memcpy(&c->Request.CDB[4], buff, 8);
2588 break;
2589 case 1: /* RESET message */
2590 c->Request.CDBLen = 16;
2591 c->Request.Type.Attribute = ATTR_SIMPLE;
2592 c->Request.Type.Direction = XFER_NONE;
2593 c->Request.Timeout = 0;
2594 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2595 c->Request.CDB[0] = cmd; /* reset */
2596 c->Request.CDB[1] = 0x03; /* reset a target */
2597 break;
2598 case 3: /* No-Op message */
2599 c->Request.CDBLen = 1;
2600 c->Request.Type.Attribute = ATTR_SIMPLE;
2601 c->Request.Type.Direction = XFER_WRITE;
2602 c->Request.Timeout = 0;
2603 c->Request.CDB[0] = cmd;
2604 break;
2605 default:
2606 dev_warn(&h->pdev->dev,
2607 "unknown message type %d\n", cmd);
2608 return IO_ERROR;
2609 }
2610 } else {
2611 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2612 return IO_ERROR;
2613 }
2614 /* Fill in the scatter gather information */
2615 if (size > 0) {
2616 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2617 buff, size,
2618 PCI_DMA_BIDIRECTIONAL);
2619 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2620 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2621 c->SG[0].Len = size;
2622 c->SG[0].Ext = 0; /* we are not chaining */
2623 }
2624 return status;
2625 }
2626
2627 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2628 {
2629 switch (c->err_info->ScsiStatus) {
2630 case SAM_STAT_GOOD:
2631 return IO_OK;
2632 case SAM_STAT_CHECK_CONDITION:
2633 switch (0xf & c->err_info->SenseInfo[2]) {
2634 case 0: return IO_OK; /* no sense */
2635 case 1: return IO_OK; /* recovered error */
2636 default:
2637 if (check_for_unit_attention(h, c))
2638 return IO_NEEDS_RETRY;
2639 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2640 "check condition, sense key = 0x%02x\n",
2641 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2642 }
2643 break;
2644 default:
2645 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2646 "scsi status = 0x%02x\n",
2647 c->Request.CDB[0], c->err_info->ScsiStatus);
2648 break;
2649 }
2650 return IO_ERROR;
2651 }
2652
2653 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2654 {
2655 int return_status = IO_OK;
2656
2657 if (c->err_info->CommandStatus == CMD_SUCCESS)
2658 return IO_OK;
2659
2660 switch (c->err_info->CommandStatus) {
2661 case CMD_TARGET_STATUS:
2662 return_status = check_target_status(h, c);
2663 break;
2664 case CMD_DATA_UNDERRUN:
2665 case CMD_DATA_OVERRUN:
2666 /* expected for inquiry and report lun commands */
2667 break;
2668 case CMD_INVALID:
2669 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2670 "reported invalid\n", c->Request.CDB[0]);
2671 return_status = IO_ERROR;
2672 break;
2673 case CMD_PROTOCOL_ERR:
2674 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2675 "protocol error\n", c->Request.CDB[0]);
2676 return_status = IO_ERROR;
2677 break;
2678 case CMD_HARDWARE_ERR:
2679 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2680 " hardware error\n", c->Request.CDB[0]);
2681 return_status = IO_ERROR;
2682 break;
2683 case CMD_CONNECTION_LOST:
2684 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2685 "connection lost\n", c->Request.CDB[0]);
2686 return_status = IO_ERROR;
2687 break;
2688 case CMD_ABORTED:
2689 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2690 "aborted\n", c->Request.CDB[0]);
2691 return_status = IO_ERROR;
2692 break;
2693 case CMD_ABORT_FAILED:
2694 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2695 "abort failed\n", c->Request.CDB[0]);
2696 return_status = IO_ERROR;
2697 break;
2698 case CMD_UNSOLICITED_ABORT:
2699 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2700 c->Request.CDB[0]);
2701 return_status = IO_NEEDS_RETRY;
2702 break;
2703 default:
2704 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2705 "unknown status %x\n", c->Request.CDB[0],
2706 c->err_info->CommandStatus);
2707 return_status = IO_ERROR;
2708 }
2709 return return_status;
2710 }
2711
2712 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2713 int attempt_retry)
2714 {
2715 DECLARE_COMPLETION_ONSTACK(wait);
2716 u64bit buff_dma_handle;
2717 int return_status = IO_OK;
2718
2719 resend_cmd2:
2720 c->waiting = &wait;
2721 enqueue_cmd_and_start_io(h, c);
2722
2723 wait_for_completion(&wait);
2724
2725 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2726 goto command_done;
2727
2728 return_status = process_sendcmd_error(h, c);
2729
2730 if (return_status == IO_NEEDS_RETRY &&
2731 c->retry_count < MAX_CMD_RETRIES) {
2732 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2733 c->Request.CDB[0]);
2734 c->retry_count++;
2735 /* erase the old error information */
2736 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2737 return_status = IO_OK;
2738 INIT_COMPLETION(wait);
2739 goto resend_cmd2;
2740 }
2741
2742 command_done:
2743 /* unlock the buffers from DMA */
2744 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2745 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2746 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2747 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2748 return return_status;
2749 }
2750
2751 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2752 __u8 page_code, unsigned char scsi3addr[],
2753 int cmd_type)
2754 {
2755 CommandList_struct *c;
2756 int return_status;
2757
2758 c = cmd_special_alloc(h);
2759 if (!c)
2760 return -ENOMEM;
2761 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2762 scsi3addr, cmd_type);
2763 if (return_status == IO_OK)
2764 return_status = sendcmd_withirq_core(h, c, 1);
2765
2766 cmd_special_free(h, c);
2767 return return_status;
2768 }
2769
2770 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2771 sector_t total_size,
2772 unsigned int block_size,
2773 InquiryData_struct *inq_buff,
2774 drive_info_struct *drv)
2775 {
2776 int return_code;
2777 unsigned long t;
2778 unsigned char scsi3addr[8];
2779
2780 memset(inq_buff, 0, sizeof(InquiryData_struct));
2781 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2782 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2783 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2784 if (return_code == IO_OK) {
2785 if (inq_buff->data_byte[8] == 0xFF) {
2786 dev_warn(&h->pdev->dev,
2787 "reading geometry failed, volume "
2788 "does not support reading geometry\n");
2789 drv->heads = 255;
2790 drv->sectors = 32; /* Sectors per track */
2791 drv->cylinders = total_size + 1;
2792 drv->raid_level = RAID_UNKNOWN;
2793 } else {
2794 drv->heads = inq_buff->data_byte[6];
2795 drv->sectors = inq_buff->data_byte[7];
2796 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2797 drv->cylinders += inq_buff->data_byte[5];
2798 drv->raid_level = inq_buff->data_byte[8];
2799 }
2800 drv->block_size = block_size;
2801 drv->nr_blocks = total_size + 1;
2802 t = drv->heads * drv->sectors;
2803 if (t > 1) {
2804 sector_t real_size = total_size + 1;
2805 unsigned long rem = sector_div(real_size, t);
2806 if (rem)
2807 real_size++;
2808 drv->cylinders = real_size;
2809 }
2810 } else { /* Get geometry failed */
2811 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2812 }
2813 }
2814
2815 static void
2816 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2817 unsigned int *block_size)
2818 {
2819 ReadCapdata_struct *buf;
2820 int return_code;
2821 unsigned char scsi3addr[8];
2822
2823 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2824 if (!buf) {
2825 dev_warn(&h->pdev->dev, "out of memory\n");
2826 return;
2827 }
2828
2829 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2830 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2831 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2832 if (return_code == IO_OK) {
2833 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2834 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2835 } else { /* read capacity command failed */
2836 dev_warn(&h->pdev->dev, "read capacity failed\n");
2837 *total_size = 0;
2838 *block_size = BLOCK_SIZE;
2839 }
2840 kfree(buf);
2841 }
2842
2843 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2844 sector_t *total_size, unsigned int *block_size)
2845 {
2846 ReadCapdata_struct_16 *buf;
2847 int return_code;
2848 unsigned char scsi3addr[8];
2849
2850 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2851 if (!buf) {
2852 dev_warn(&h->pdev->dev, "out of memory\n");
2853 return;
2854 }
2855
2856 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2857 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2858 buf, sizeof(ReadCapdata_struct_16),
2859 0, scsi3addr, TYPE_CMD);
2860 if (return_code == IO_OK) {
2861 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2862 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2863 } else { /* read capacity command failed */
2864 dev_warn(&h->pdev->dev, "read capacity failed\n");
2865 *total_size = 0;
2866 *block_size = BLOCK_SIZE;
2867 }
2868 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2869 (unsigned long long)*total_size+1, *block_size);
2870 kfree(buf);
2871 }
2872
2873 static int cciss_revalidate(struct gendisk *disk)
2874 {
2875 ctlr_info_t *h = get_host(disk);
2876 drive_info_struct *drv = get_drv(disk);
2877 int logvol;
2878 int FOUND = 0;
2879 unsigned int block_size;
2880 sector_t total_size;
2881 InquiryData_struct *inq_buff = NULL;
2882
2883 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
2884 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2885 sizeof(drv->LunID)) == 0) {
2886 FOUND = 1;
2887 break;
2888 }
2889 }
2890
2891 if (!FOUND)
2892 return 1;
2893
2894 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2895 if (inq_buff == NULL) {
2896 dev_warn(&h->pdev->dev, "out of memory\n");
2897 return 1;
2898 }
2899 if (h->cciss_read == CCISS_READ_10) {
2900 cciss_read_capacity(h, logvol,
2901 &total_size, &block_size);
2902 } else {
2903 cciss_read_capacity_16(h, logvol,
2904 &total_size, &block_size);
2905 }
2906 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2907 inq_buff, drv);
2908
2909 blk_queue_logical_block_size(drv->queue, drv->block_size);
2910 set_capacity(disk, drv->nr_blocks);
2911
2912 kfree(inq_buff);
2913 return 0;
2914 }
2915
2916 /*
2917 * Map (physical) PCI mem into (virtual) kernel space
2918 */
2919 static void __iomem *remap_pci_mem(ulong base, ulong size)
2920 {
2921 ulong page_base = ((ulong) base) & PAGE_MASK;
2922 ulong page_offs = ((ulong) base) - page_base;
2923 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2924
2925 return page_remapped ? (page_remapped + page_offs) : NULL;
2926 }
2927
2928 /*
2929 * Takes jobs of the Q and sends them to the hardware, then puts it on
2930 * the Q to wait for completion.
2931 */
2932 static void start_io(ctlr_info_t *h)
2933 {
2934 CommandList_struct *c;
2935
2936 while (!hlist_empty(&h->reqQ)) {
2937 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
2938 /* can't do anything if fifo is full */
2939 if ((h->access.fifo_full(h))) {
2940 dev_warn(&h->pdev->dev, "fifo full\n");
2941 break;
2942 }
2943
2944 /* Get the first entry from the Request Q */
2945 removeQ(c);
2946 h->Qdepth--;
2947
2948 /* Tell the controller execute command */
2949 h->access.submit_command(h, c);
2950
2951 /* Put job onto the completed Q */
2952 addQ(&h->cmpQ, c);
2953 }
2954 }
2955
2956 /* Assumes that h->lock is held. */
2957 /* Zeros out the error record and then resends the command back */
2958 /* to the controller */
2959 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
2960 {
2961 /* erase the old error information */
2962 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2963
2964 /* add it to software queue and then send it to the controller */
2965 addQ(&h->reqQ, c);
2966 h->Qdepth++;
2967 if (h->Qdepth > h->maxQsinceinit)
2968 h->maxQsinceinit = h->Qdepth;
2969
2970 start_io(h);
2971 }
2972
2973 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2974 unsigned int msg_byte, unsigned int host_byte,
2975 unsigned int driver_byte)
2976 {
2977 /* inverse of macros in scsi.h */
2978 return (scsi_status_byte & 0xff) |
2979 ((msg_byte & 0xff) << 8) |
2980 ((host_byte & 0xff) << 16) |
2981 ((driver_byte & 0xff) << 24);
2982 }
2983
2984 static inline int evaluate_target_status(ctlr_info_t *h,
2985 CommandList_struct *cmd, int *retry_cmd)
2986 {
2987 unsigned char sense_key;
2988 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2989 int error_value;
2990
2991 *retry_cmd = 0;
2992 /* If we get in here, it means we got "target status", that is, scsi status */
2993 status_byte = cmd->err_info->ScsiStatus;
2994 driver_byte = DRIVER_OK;
2995 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2996
2997 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
2998 host_byte = DID_PASSTHROUGH;
2999 else
3000 host_byte = DID_OK;
3001
3002 error_value = make_status_bytes(status_byte, msg_byte,
3003 host_byte, driver_byte);
3004
3005 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3006 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3007 dev_warn(&h->pdev->dev, "cmd %p "
3008 "has SCSI Status 0x%x\n",
3009 cmd, cmd->err_info->ScsiStatus);
3010 return error_value;
3011 }
3012
3013 /* check the sense key */
3014 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3015 /* no status or recovered error */
3016 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3017 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3018 error_value = 0;
3019
3020 if (check_for_unit_attention(h, cmd)) {
3021 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3022 return 0;
3023 }
3024
3025 /* Not SG_IO or similar? */
3026 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3027 if (error_value != 0)
3028 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3029 " sense key = 0x%x\n", cmd, sense_key);
3030 return error_value;
3031 }
3032
3033 /* SG_IO or similar, copy sense data back */
3034 if (cmd->rq->sense) {
3035 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3036 cmd->rq->sense_len = cmd->err_info->SenseLen;
3037 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3038 cmd->rq->sense_len);
3039 } else
3040 cmd->rq->sense_len = 0;
3041
3042 return error_value;
3043 }
3044
3045 /* checks the status of the job and calls complete buffers to mark all
3046 * buffers for the completed job. Note that this function does not need
3047 * to hold the hba/queue lock.
3048 */
3049 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3050 int timeout)
3051 {
3052 int retry_cmd = 0;
3053 struct request *rq = cmd->rq;
3054
3055 rq->errors = 0;
3056
3057 if (timeout)
3058 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3059
3060 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3061 goto after_error_processing;
3062
3063 switch (cmd->err_info->CommandStatus) {
3064 case CMD_TARGET_STATUS:
3065 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3066 break;
3067 case CMD_DATA_UNDERRUN:
3068 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3069 dev_warn(&h->pdev->dev, "cmd %p has"
3070 " completed with data underrun "
3071 "reported\n", cmd);
3072 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3073 }
3074 break;
3075 case CMD_DATA_OVERRUN:
3076 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3077 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3078 " completed with data overrun "
3079 "reported\n", cmd);
3080 break;
3081 case CMD_INVALID:
3082 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3083 "reported invalid\n", cmd);
3084 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3085 cmd->err_info->CommandStatus, DRIVER_OK,
3086 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3087 DID_PASSTHROUGH : DID_ERROR);
3088 break;
3089 case CMD_PROTOCOL_ERR:
3090 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3091 "protocol error\n", cmd);
3092 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3093 cmd->err_info->CommandStatus, DRIVER_OK,
3094 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3095 DID_PASSTHROUGH : DID_ERROR);
3096 break;
3097 case CMD_HARDWARE_ERR:
3098 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3099 " hardware error\n", cmd);
3100 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3101 cmd->err_info->CommandStatus, DRIVER_OK,
3102 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3103 DID_PASSTHROUGH : DID_ERROR);
3104 break;
3105 case CMD_CONNECTION_LOST:
3106 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3107 "connection lost\n", cmd);
3108 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3109 cmd->err_info->CommandStatus, DRIVER_OK,
3110 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3111 DID_PASSTHROUGH : DID_ERROR);
3112 break;
3113 case CMD_ABORTED:
3114 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3115 "aborted\n", cmd);
3116 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3117 cmd->err_info->CommandStatus, DRIVER_OK,
3118 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3119 DID_PASSTHROUGH : DID_ABORT);
3120 break;
3121 case CMD_ABORT_FAILED:
3122 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3123 "abort failed\n", cmd);
3124 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3125 cmd->err_info->CommandStatus, DRIVER_OK,
3126 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3127 DID_PASSTHROUGH : DID_ERROR);
3128 break;
3129 case CMD_UNSOLICITED_ABORT:
3130 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3131 "abort %p\n", h->ctlr, cmd);
3132 if (cmd->retry_count < MAX_CMD_RETRIES) {
3133 retry_cmd = 1;
3134 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3135 cmd->retry_count++;
3136 } else
3137 dev_warn(&h->pdev->dev,
3138 "%p retried too many times\n", cmd);
3139 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3140 cmd->err_info->CommandStatus, DRIVER_OK,
3141 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3142 DID_PASSTHROUGH : DID_ABORT);
3143 break;
3144 case CMD_TIMEOUT:
3145 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3146 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3147 cmd->err_info->CommandStatus, DRIVER_OK,
3148 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3149 DID_PASSTHROUGH : DID_ERROR);
3150 break;
3151 default:
3152 dev_warn(&h->pdev->dev, "cmd %p returned "
3153 "unknown status %x\n", cmd,
3154 cmd->err_info->CommandStatus);
3155 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3156 cmd->err_info->CommandStatus, DRIVER_OK,
3157 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3158 DID_PASSTHROUGH : DID_ERROR);
3159 }
3160
3161 after_error_processing:
3162
3163 /* We need to return this command */
3164 if (retry_cmd) {
3165 resend_cciss_cmd(h, cmd);
3166 return;
3167 }
3168 cmd->rq->completion_data = cmd;
3169 blk_complete_request(cmd->rq);
3170 }
3171
3172 static inline u32 cciss_tag_contains_index(u32 tag)
3173 {
3174 #define DIRECT_LOOKUP_BIT 0x10
3175 return tag & DIRECT_LOOKUP_BIT;
3176 }
3177
3178 static inline u32 cciss_tag_to_index(u32 tag)
3179 {
3180 #define DIRECT_LOOKUP_SHIFT 5
3181 return tag >> DIRECT_LOOKUP_SHIFT;
3182 }
3183
3184 static inline u32 cciss_tag_discard_error_bits(u32 tag)
3185 {
3186 #define CCISS_ERROR_BITS 0x03
3187 return tag & ~CCISS_ERROR_BITS;
3188 }
3189
3190 static inline void cciss_mark_tag_indexed(u32 *tag)
3191 {
3192 *tag |= DIRECT_LOOKUP_BIT;
3193 }
3194
3195 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3196 {
3197 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3198 }
3199
3200 /*
3201 * Get a request and submit it to the controller.
3202 */
3203 static void do_cciss_request(struct request_queue *q)
3204 {
3205 ctlr_info_t *h = q->queuedata;
3206 CommandList_struct *c;
3207 sector_t start_blk;
3208 int seg;
3209 struct request *creq;
3210 u64bit temp64;
3211 struct scatterlist *tmp_sg;
3212 SGDescriptor_struct *curr_sg;
3213 drive_info_struct *drv;
3214 int i, dir;
3215 int sg_index = 0;
3216 int chained = 0;
3217
3218 /* We call start_io here in case there is a command waiting on the
3219 * queue that has not been sent.
3220 */
3221 if (blk_queue_plugged(q))
3222 goto startio;
3223
3224 queue:
3225 creq = blk_peek_request(q);
3226 if (!creq)
3227 goto startio;
3228
3229 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3230
3231 c = cmd_alloc(h);
3232 if (!c)
3233 goto full;
3234
3235 blk_start_request(creq);
3236
3237 tmp_sg = h->scatter_list[c->cmdindex];
3238 spin_unlock_irq(q->queue_lock);
3239
3240 c->cmd_type = CMD_RWREQ;
3241 c->rq = creq;
3242
3243 /* fill in the request */
3244 drv = creq->rq_disk->private_data;
3245 c->Header.ReplyQueue = 0; /* unused in simple mode */
3246 /* got command from pool, so use the command block index instead */
3247 /* for direct lookups. */
3248 /* The first 2 bits are reserved for controller error reporting. */
3249 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3250 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3251 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3252 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3253 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3254 c->Request.Type.Attribute = ATTR_SIMPLE;
3255 c->Request.Type.Direction =
3256 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3257 c->Request.Timeout = 0; /* Don't time out */
3258 c->Request.CDB[0] =
3259 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3260 start_blk = blk_rq_pos(creq);
3261 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3262 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3263 sg_init_table(tmp_sg, h->maxsgentries);
3264 seg = blk_rq_map_sg(q, creq, tmp_sg);
3265
3266 /* get the DMA records for the setup */
3267 if (c->Request.Type.Direction == XFER_READ)
3268 dir = PCI_DMA_FROMDEVICE;
3269 else
3270 dir = PCI_DMA_TODEVICE;
3271
3272 curr_sg = c->SG;
3273 sg_index = 0;
3274 chained = 0;
3275
3276 for (i = 0; i < seg; i++) {
3277 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3278 !chained && ((seg - i) > 1)) {
3279 /* Point to next chain block. */
3280 curr_sg = h->cmd_sg_list[c->cmdindex];
3281 sg_index = 0;
3282 chained = 1;
3283 }
3284 curr_sg[sg_index].Len = tmp_sg[i].length;
3285 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3286 tmp_sg[i].offset,
3287 tmp_sg[i].length, dir);
3288 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3289 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3290 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3291 ++sg_index;
3292 }
3293 if (chained)
3294 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3295 (seg - (h->max_cmd_sgentries - 1)) *
3296 sizeof(SGDescriptor_struct));
3297
3298 /* track how many SG entries we are using */
3299 if (seg > h->maxSG)
3300 h->maxSG = seg;
3301
3302 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3303 "chained[%d]\n",
3304 blk_rq_sectors(creq), seg, chained);
3305
3306 c->Header.SGTotal = seg + chained;
3307 if (seg <= h->max_cmd_sgentries)
3308 c->Header.SGList = c->Header.SGTotal;
3309 else
3310 c->Header.SGList = h->max_cmd_sgentries;
3311 set_performant_mode(h, c);
3312
3313 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3314 if(h->cciss_read == CCISS_READ_10) {
3315 c->Request.CDB[1] = 0;
3316 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3317 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3318 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3319 c->Request.CDB[5] = start_blk & 0xff;
3320 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3321 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3322 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3323 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3324 } else {
3325 u32 upper32 = upper_32_bits(start_blk);
3326
3327 c->Request.CDBLen = 16;
3328 c->Request.CDB[1]= 0;
3329 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3330 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3331 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3332 c->Request.CDB[5]= upper32 & 0xff;
3333 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3334 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3335 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3336 c->Request.CDB[9]= start_blk & 0xff;
3337 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3338 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3339 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3340 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3341 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3342 }
3343 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3344 c->Request.CDBLen = creq->cmd_len;
3345 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3346 } else {
3347 dev_warn(&h->pdev->dev, "bad request type %d\n",
3348 creq->cmd_type);
3349 BUG();
3350 }
3351
3352 spin_lock_irq(q->queue_lock);
3353
3354 addQ(&h->reqQ, c);
3355 h->Qdepth++;
3356 if (h->Qdepth > h->maxQsinceinit)
3357 h->maxQsinceinit = h->Qdepth;
3358
3359 goto queue;
3360 full:
3361 blk_stop_queue(q);
3362 startio:
3363 /* We will already have the driver lock here so not need
3364 * to lock it.
3365 */
3366 start_io(h);
3367 }
3368
3369 static inline unsigned long get_next_completion(ctlr_info_t *h)
3370 {
3371 return h->access.command_completed(h);
3372 }
3373
3374 static inline int interrupt_pending(ctlr_info_t *h)
3375 {
3376 return h->access.intr_pending(h);
3377 }
3378
3379 static inline long interrupt_not_for_us(ctlr_info_t *h)
3380 {
3381 return ((h->access.intr_pending(h) == 0) ||
3382 (h->interrupts_enabled == 0));
3383 }
3384
3385 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3386 u32 raw_tag)
3387 {
3388 if (unlikely(tag_index >= h->nr_cmds)) {
3389 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3390 return 1;
3391 }
3392 return 0;
3393 }
3394
3395 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3396 u32 raw_tag)
3397 {
3398 removeQ(c);
3399 if (likely(c->cmd_type == CMD_RWREQ))
3400 complete_command(h, c, 0);
3401 else if (c->cmd_type == CMD_IOCTL_PEND)
3402 complete(c->waiting);
3403 #ifdef CONFIG_CISS_SCSI_TAPE
3404 else if (c->cmd_type == CMD_SCSI)
3405 complete_scsi_command(c, 0, raw_tag);
3406 #endif
3407 }
3408
3409 static inline u32 next_command(ctlr_info_t *h)
3410 {
3411 u32 a;
3412
3413 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3414 return h->access.command_completed(h);
3415
3416 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3417 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3418 (h->reply_pool_head)++;
3419 h->commands_outstanding--;
3420 } else {
3421 a = FIFO_EMPTY;
3422 }
3423 /* Check for wraparound */
3424 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3425 h->reply_pool_head = h->reply_pool;
3426 h->reply_pool_wraparound ^= 1;
3427 }
3428 return a;
3429 }
3430
3431 /* process completion of an indexed ("direct lookup") command */
3432 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3433 {
3434 u32 tag_index;
3435 CommandList_struct *c;
3436
3437 tag_index = cciss_tag_to_index(raw_tag);
3438 if (bad_tag(h, tag_index, raw_tag))
3439 return next_command(h);
3440 c = h->cmd_pool + tag_index;
3441 finish_cmd(h, c, raw_tag);
3442 return next_command(h);
3443 }
3444
3445 /* process completion of a non-indexed command */
3446 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3447 {
3448 u32 tag;
3449 CommandList_struct *c = NULL;
3450 struct hlist_node *tmp;
3451 __u32 busaddr_masked, tag_masked;
3452
3453 tag = cciss_tag_discard_error_bits(raw_tag);
3454 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3455 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3456 tag_masked = cciss_tag_discard_error_bits(tag);
3457 if (busaddr_masked == tag_masked) {
3458 finish_cmd(h, c, raw_tag);
3459 return next_command(h);
3460 }
3461 }
3462 bad_tag(h, h->nr_cmds + 1, raw_tag);
3463 return next_command(h);
3464 }
3465
3466 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3467 {
3468 ctlr_info_t *h = dev_id;
3469 unsigned long flags;
3470 u32 raw_tag;
3471
3472 if (interrupt_not_for_us(h))
3473 return IRQ_NONE;
3474 spin_lock_irqsave(&h->lock, flags);
3475 while (interrupt_pending(h)) {
3476 raw_tag = get_next_completion(h);
3477 while (raw_tag != FIFO_EMPTY) {
3478 if (cciss_tag_contains_index(raw_tag))
3479 raw_tag = process_indexed_cmd(h, raw_tag);
3480 else
3481 raw_tag = process_nonindexed_cmd(h, raw_tag);
3482 }
3483 }
3484 spin_unlock_irqrestore(&h->lock, flags);
3485 return IRQ_HANDLED;
3486 }
3487
3488 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3489 * check the interrupt pending register because it is not set.
3490 */
3491 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3492 {
3493 ctlr_info_t *h = dev_id;
3494 unsigned long flags;
3495 u32 raw_tag;
3496
3497 spin_lock_irqsave(&h->lock, flags);
3498 raw_tag = get_next_completion(h);
3499 while (raw_tag != FIFO_EMPTY) {
3500 if (cciss_tag_contains_index(raw_tag))
3501 raw_tag = process_indexed_cmd(h, raw_tag);
3502 else
3503 raw_tag = process_nonindexed_cmd(h, raw_tag);
3504 }
3505 spin_unlock_irqrestore(&h->lock, flags);
3506 return IRQ_HANDLED;
3507 }
3508
3509 /**
3510 * add_to_scan_list() - add controller to rescan queue
3511 * @h: Pointer to the controller.
3512 *
3513 * Adds the controller to the rescan queue if not already on the queue.
3514 *
3515 * returns 1 if added to the queue, 0 if skipped (could be on the
3516 * queue already, or the controller could be initializing or shutting
3517 * down).
3518 **/
3519 static int add_to_scan_list(struct ctlr_info *h)
3520 {
3521 struct ctlr_info *test_h;
3522 int found = 0;
3523 int ret = 0;
3524
3525 if (h->busy_initializing)
3526 return 0;
3527
3528 if (!mutex_trylock(&h->busy_shutting_down))
3529 return 0;
3530
3531 mutex_lock(&scan_mutex);
3532 list_for_each_entry(test_h, &scan_q, scan_list) {
3533 if (test_h == h) {
3534 found = 1;
3535 break;
3536 }
3537 }
3538 if (!found && !h->busy_scanning) {
3539 INIT_COMPLETION(h->scan_wait);
3540 list_add_tail(&h->scan_list, &scan_q);
3541 ret = 1;
3542 }
3543 mutex_unlock(&scan_mutex);
3544 mutex_unlock(&h->busy_shutting_down);
3545
3546 return ret;
3547 }
3548
3549 /**
3550 * remove_from_scan_list() - remove controller from rescan queue
3551 * @h: Pointer to the controller.
3552 *
3553 * Removes the controller from the rescan queue if present. Blocks if
3554 * the controller is currently conducting a rescan. The controller
3555 * can be in one of three states:
3556 * 1. Doesn't need a scan
3557 * 2. On the scan list, but not scanning yet (we remove it)
3558 * 3. Busy scanning (and not on the list). In this case we want to wait for
3559 * the scan to complete to make sure the scanning thread for this
3560 * controller is completely idle.
3561 **/
3562 static void remove_from_scan_list(struct ctlr_info *h)
3563 {
3564 struct ctlr_info *test_h, *tmp_h;
3565
3566 mutex_lock(&scan_mutex);
3567 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3568 if (test_h == h) { /* state 2. */
3569 list_del(&h->scan_list);
3570 complete_all(&h->scan_wait);
3571 mutex_unlock(&scan_mutex);
3572 return;
3573 }
3574 }
3575 if (h->busy_scanning) { /* state 3. */
3576 mutex_unlock(&scan_mutex);
3577 wait_for_completion(&h->scan_wait);
3578 } else { /* state 1, nothing to do. */
3579 mutex_unlock(&scan_mutex);
3580 }
3581 }
3582
3583 /**
3584 * scan_thread() - kernel thread used to rescan controllers
3585 * @data: Ignored.
3586 *
3587 * A kernel thread used scan for drive topology changes on
3588 * controllers. The thread processes only one controller at a time
3589 * using a queue. Controllers are added to the queue using
3590 * add_to_scan_list() and removed from the queue either after done
3591 * processing or using remove_from_scan_list().
3592 *
3593 * returns 0.
3594 **/
3595 static int scan_thread(void *data)
3596 {
3597 struct ctlr_info *h;
3598
3599 while (1) {
3600 set_current_state(TASK_INTERRUPTIBLE);
3601 schedule();
3602 if (kthread_should_stop())
3603 break;
3604
3605 while (1) {
3606 mutex_lock(&scan_mutex);
3607 if (list_empty(&scan_q)) {
3608 mutex_unlock(&scan_mutex);
3609 break;
3610 }
3611
3612 h = list_entry(scan_q.next,
3613 struct ctlr_info,
3614 scan_list);
3615 list_del(&h->scan_list);
3616 h->busy_scanning = 1;
3617 mutex_unlock(&scan_mutex);
3618
3619 rebuild_lun_table(h, 0, 0);
3620 complete_all(&h->scan_wait);
3621 mutex_lock(&scan_mutex);
3622 h->busy_scanning = 0;
3623 mutex_unlock(&scan_mutex);
3624 }
3625 }
3626
3627 return 0;
3628 }
3629
3630 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3631 {
3632 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3633 return 0;
3634
3635 switch (c->err_info->SenseInfo[12]) {
3636 case STATE_CHANGED:
3637 dev_warn(&h->pdev->dev, "a state change "
3638 "detected, command retried\n");
3639 return 1;
3640 break;
3641 case LUN_FAILED:
3642 dev_warn(&h->pdev->dev, "LUN failure "
3643 "detected, action required\n");
3644 return 1;
3645 break;
3646 case REPORT_LUNS_CHANGED:
3647 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3648 /*
3649 * Here, we could call add_to_scan_list and wake up the scan thread,
3650 * except that it's quite likely that we will get more than one
3651 * REPORT_LUNS_CHANGED condition in quick succession, which means
3652 * that those which occur after the first one will likely happen
3653 * *during* the scan_thread's rescan. And the rescan code is not
3654 * robust enough to restart in the middle, undoing what it has already
3655 * done, and it's not clear that it's even possible to do this, since
3656 * part of what it does is notify the block layer, which starts
3657 * doing it's own i/o to read partition tables and so on, and the
3658 * driver doesn't have visibility to know what might need undoing.
3659 * In any event, if possible, it is horribly complicated to get right
3660 * so we just don't do it for now.
3661 *
3662 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3663 */
3664 return 1;
3665 break;
3666 case POWER_OR_RESET:
3667 dev_warn(&h->pdev->dev,
3668 "a power on or device reset detected\n");
3669 return 1;
3670 break;
3671 case UNIT_ATTENTION_CLEARED:
3672 dev_warn(&h->pdev->dev,
3673 "unit attention cleared by another initiator\n");
3674 return 1;
3675 break;
3676 default:
3677 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3678 return 1;
3679 }
3680 }
3681
3682 /*
3683 * We cannot read the structure directly, for portability we must use
3684 * the io functions.
3685 * This is for debug only.
3686 */
3687 static void print_cfg_table(ctlr_info_t *h)
3688 {
3689 int i;
3690 char temp_name[17];
3691 CfgTable_struct *tb = h->cfgtable;
3692
3693 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3694 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3695 for (i = 0; i < 4; i++)
3696 temp_name[i] = readb(&(tb->Signature[i]));
3697 temp_name[4] = '\0';
3698 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3699 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3700 readl(&(tb->SpecValence)));
3701 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3702 readl(&(tb->TransportSupport)));
3703 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3704 readl(&(tb->TransportActive)));
3705 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3706 readl(&(tb->HostWrite.TransportRequest)));
3707 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3708 readl(&(tb->HostWrite.CoalIntDelay)));
3709 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3710 readl(&(tb->HostWrite.CoalIntCount)));
3711 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3712 readl(&(tb->CmdsOutMax)));
3713 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3714 readl(&(tb->BusTypes)));
3715 for (i = 0; i < 16; i++)
3716 temp_name[i] = readb(&(tb->ServerName[i]));
3717 temp_name[16] = '\0';
3718 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3719 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3720 readl(&(tb->HeartBeat)));
3721 }
3722
3723 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3724 {
3725 int i, offset, mem_type, bar_type;
3726 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3727 return 0;
3728 offset = 0;
3729 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3730 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3731 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3732 offset += 4;
3733 else {
3734 mem_type = pci_resource_flags(pdev, i) &
3735 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3736 switch (mem_type) {
3737 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3738 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3739 offset += 4; /* 32 bit */
3740 break;
3741 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3742 offset += 8;
3743 break;
3744 default: /* reserved in PCI 2.2 */
3745 dev_warn(&pdev->dev,
3746 "Base address is invalid\n");
3747 return -1;
3748 break;
3749 }
3750 }
3751 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3752 return i + 1;
3753 }
3754 return -1;
3755 }
3756
3757 /* Fill in bucket_map[], given nsgs (the max number of
3758 * scatter gather elements supported) and bucket[],
3759 * which is an array of 8 integers. The bucket[] array
3760 * contains 8 different DMA transfer sizes (in 16
3761 * byte increments) which the controller uses to fetch
3762 * commands. This function fills in bucket_map[], which
3763 * maps a given number of scatter gather elements to one of
3764 * the 8 DMA transfer sizes. The point of it is to allow the
3765 * controller to only do as much DMA as needed to fetch the
3766 * command, with the DMA transfer size encoded in the lower
3767 * bits of the command address.
3768 */
3769 static void calc_bucket_map(int bucket[], int num_buckets,
3770 int nsgs, int *bucket_map)
3771 {
3772 int i, j, b, size;
3773
3774 /* even a command with 0 SGs requires 4 blocks */
3775 #define MINIMUM_TRANSFER_BLOCKS 4
3776 #define NUM_BUCKETS 8
3777 /* Note, bucket_map must have nsgs+1 entries. */
3778 for (i = 0; i <= nsgs; i++) {
3779 /* Compute size of a command with i SG entries */
3780 size = i + MINIMUM_TRANSFER_BLOCKS;
3781 b = num_buckets; /* Assume the biggest bucket */
3782 /* Find the bucket that is just big enough */
3783 for (j = 0; j < 8; j++) {
3784 if (bucket[j] >= size) {
3785 b = j;
3786 break;
3787 }
3788 }
3789 /* for a command with i SG entries, use bucket b. */
3790 bucket_map[i] = b;
3791 }
3792 }
3793
3794 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3795 {
3796 int i;
3797
3798 /* under certain very rare conditions, this can take awhile.
3799 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3800 * as we enter this code.) */
3801 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3802 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3803 break;
3804 msleep(10);
3805 }
3806 }
3807
3808 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3809 {
3810 /* This is a bit complicated. There are 8 registers on
3811 * the controller which we write to to tell it 8 different
3812 * sizes of commands which there may be. It's a way of
3813 * reducing the DMA done to fetch each command. Encoded into
3814 * each command's tag are 3 bits which communicate to the controller
3815 * which of the eight sizes that command fits within. The size of
3816 * each command depends on how many scatter gather entries there are.
3817 * Each SG entry requires 16 bytes. The eight registers are programmed
3818 * with the number of 16-byte blocks a command of that size requires.
3819 * The smallest command possible requires 5 such 16 byte blocks.
3820 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3821 * blocks. Note, this only extends to the SG entries contained
3822 * within the command block, and does not extend to chained blocks
3823 * of SG elements. bft[] contains the eight values we write to
3824 * the registers. They are not evenly distributed, but have more
3825 * sizes for small commands, and fewer sizes for larger commands.
3826 */
3827 __u32 trans_offset;
3828 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3829 /*
3830 * 5 = 1 s/g entry or 4k
3831 * 6 = 2 s/g entry or 8k
3832 * 8 = 4 s/g entry or 16k
3833 * 10 = 6 s/g entry or 24k
3834 */
3835 unsigned long register_value;
3836 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3837
3838 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3839
3840 /* Controller spec: zero out this buffer. */
3841 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3842 h->reply_pool_head = h->reply_pool;
3843
3844 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3845 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3846 h->blockFetchTable);
3847 writel(bft[0], &h->transtable->BlockFetch0);
3848 writel(bft[1], &h->transtable->BlockFetch1);
3849 writel(bft[2], &h->transtable->BlockFetch2);
3850 writel(bft[3], &h->transtable->BlockFetch3);
3851 writel(bft[4], &h->transtable->BlockFetch4);
3852 writel(bft[5], &h->transtable->BlockFetch5);
3853 writel(bft[6], &h->transtable->BlockFetch6);
3854 writel(bft[7], &h->transtable->BlockFetch7);
3855
3856 /* size of controller ring buffer */
3857 writel(h->max_commands, &h->transtable->RepQSize);
3858 writel(1, &h->transtable->RepQCount);
3859 writel(0, &h->transtable->RepQCtrAddrLow32);
3860 writel(0, &h->transtable->RepQCtrAddrHigh32);
3861 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3862 writel(0, &h->transtable->RepQAddr0High32);
3863 writel(CFGTBL_Trans_Performant,
3864 &(h->cfgtable->HostWrite.TransportRequest));
3865
3866 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3867 cciss_wait_for_mode_change_ack(h);
3868 register_value = readl(&(h->cfgtable->TransportActive));
3869 if (!(register_value & CFGTBL_Trans_Performant))
3870 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3871 " performant mode\n");
3872 }
3873
3874 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3875 {
3876 __u32 trans_support;
3877
3878 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3879 /* Attempt to put controller into performant mode if supported */
3880 /* Does board support performant mode? */
3881 trans_support = readl(&(h->cfgtable->TransportSupport));
3882 if (!(trans_support & PERFORMANT_MODE))
3883 return;
3884
3885 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3886 /* Performant mode demands commands on a 32 byte boundary
3887 * pci_alloc_consistent aligns on page boundarys already.
3888 * Just need to check if divisible by 32
3889 */
3890 if ((sizeof(CommandList_struct) % 32) != 0) {
3891 dev_warn(&h->pdev->dev, "%s %d %s\n",
3892 "cciss info: command size[",
3893 (int)sizeof(CommandList_struct),
3894 "] not divisible by 32, no performant mode..\n");
3895 return;
3896 }
3897
3898 /* Performant mode ring buffer and supporting data structures */
3899 h->reply_pool = (__u64 *)pci_alloc_consistent(
3900 h->pdev, h->max_commands * sizeof(__u64),
3901 &(h->reply_pool_dhandle));
3902
3903 /* Need a block fetch table for performant mode */
3904 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3905 sizeof(__u32)), GFP_KERNEL);
3906
3907 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3908 goto clean_up;
3909
3910 cciss_enter_performant_mode(h);
3911
3912 /* Change the access methods to the performant access methods */
3913 h->access = SA5_performant_access;
3914 h->transMethod = CFGTBL_Trans_Performant;
3915
3916 return;
3917 clean_up:
3918 kfree(h->blockFetchTable);
3919 if (h->reply_pool)
3920 pci_free_consistent(h->pdev,
3921 h->max_commands * sizeof(__u64),
3922 h->reply_pool,
3923 h->reply_pool_dhandle);
3924 return;
3925
3926 } /* cciss_put_controller_into_performant_mode */
3927
3928 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3929 * controllers that are capable. If not, we use IO-APIC mode.
3930 */
3931
3932 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
3933 {
3934 #ifdef CONFIG_PCI_MSI
3935 int err;
3936 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3937 {0, 2}, {0, 3}
3938 };
3939
3940 /* Some boards advertise MSI but don't really support it */
3941 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3942 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3943 goto default_int_mode;
3944
3945 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3946 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
3947 if (!err) {
3948 h->intr[0] = cciss_msix_entries[0].vector;
3949 h->intr[1] = cciss_msix_entries[1].vector;
3950 h->intr[2] = cciss_msix_entries[2].vector;
3951 h->intr[3] = cciss_msix_entries[3].vector;
3952 h->msix_vector = 1;
3953 return;
3954 }
3955 if (err > 0) {
3956 dev_warn(&h->pdev->dev,
3957 "only %d MSI-X vectors available\n", err);
3958 goto default_int_mode;
3959 } else {
3960 dev_warn(&h->pdev->dev,
3961 "MSI-X init failed %d\n", err);
3962 goto default_int_mode;
3963 }
3964 }
3965 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3966 if (!pci_enable_msi(h->pdev))
3967 h->msi_vector = 1;
3968 else
3969 dev_warn(&h->pdev->dev, "MSI init failed\n");
3970 }
3971 default_int_mode:
3972 #endif /* CONFIG_PCI_MSI */
3973 /* if we get here we're going to use the default interrupt mode */
3974 h->intr[PERF_MODE_INT] = h->pdev->irq;
3975 return;
3976 }
3977
3978 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3979 {
3980 int i;
3981 u32 subsystem_vendor_id, subsystem_device_id;
3982
3983 subsystem_vendor_id = pdev->subsystem_vendor;
3984 subsystem_device_id = pdev->subsystem_device;
3985 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3986 subsystem_vendor_id;
3987
3988 for (i = 0; i < ARRAY_SIZE(products); i++) {
3989 /* Stand aside for hpsa driver on request */
3990 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3991 return -ENODEV;
3992 if (*board_id == products[i].board_id)
3993 return i;
3994 }
3995 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3996 *board_id);
3997 return -ENODEV;
3998 }
3999
4000 static inline bool cciss_board_disabled(ctlr_info_t *h)
4001 {
4002 u16 command;
4003
4004 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4005 return ((command & PCI_COMMAND_MEMORY) == 0);
4006 }
4007
4008 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4009 unsigned long *memory_bar)
4010 {
4011 int i;
4012
4013 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4014 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4015 /* addressing mode bits already removed */
4016 *memory_bar = pci_resource_start(pdev, i);
4017 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4018 *memory_bar);
4019 return 0;
4020 }
4021 dev_warn(&pdev->dev, "no memory BAR found\n");
4022 return -ENODEV;
4023 }
4024
4025 static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4026 {
4027 int i;
4028 u32 scratchpad;
4029
4030 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4031 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4032 if (scratchpad == CCISS_FIRMWARE_READY)
4033 return 0;
4034 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4035 }
4036 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4037 return -ENODEV;
4038 }
4039
4040 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4041 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4042 u64 *cfg_offset)
4043 {
4044 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4045 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4046 *cfg_base_addr &= (u32) 0x0000ffff;
4047 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4048 if (*cfg_base_addr_index == -1) {
4049 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4050 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4051 return -ENODEV;
4052 }
4053 return 0;
4054 }
4055
4056 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4057 {
4058 u64 cfg_offset;
4059 u32 cfg_base_addr;
4060 u64 cfg_base_addr_index;
4061 u32 trans_offset;
4062 int rc;
4063
4064 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4065 &cfg_base_addr_index, &cfg_offset);
4066 if (rc)
4067 return rc;
4068 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4069 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4070 if (!h->cfgtable)
4071 return -ENOMEM;
4072 /* Find performant mode table. */
4073 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4074 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4075 cfg_base_addr_index)+cfg_offset+trans_offset,
4076 sizeof(*h->transtable));
4077 if (!h->transtable)
4078 return -ENOMEM;
4079 return 0;
4080 }
4081
4082 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4083 {
4084 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4085 if (h->max_commands < 16) {
4086 dev_warn(&h->pdev->dev, "Controller reports "
4087 "max supported commands of %d, an obvious lie. "
4088 "Using 16. Ensure that firmware is up to date.\n",
4089 h->max_commands);
4090 h->max_commands = 16;
4091 }
4092 }
4093
4094 /* Interrogate the hardware for some limits:
4095 * max commands, max SG elements without chaining, and with chaining,
4096 * SG chain block size, etc.
4097 */
4098 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4099 {
4100 cciss_get_max_perf_mode_cmds(h);
4101 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4102 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4103 /*
4104 * Limit in-command s/g elements to 32 save dma'able memory.
4105 * Howvever spec says if 0, use 31
4106 */
4107 h->max_cmd_sgentries = 31;
4108 if (h->maxsgentries > 512) {
4109 h->max_cmd_sgentries = 32;
4110 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4111 h->maxsgentries--; /* save one for chain pointer */
4112 } else {
4113 h->maxsgentries = 31; /* default to traditional values */
4114 h->chainsize = 0;
4115 }
4116 }
4117
4118 static inline bool CISS_signature_present(ctlr_info_t *h)
4119 {
4120 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4121 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4122 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4123 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4124 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4125 return false;
4126 }
4127 return true;
4128 }
4129
4130 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4131 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4132 {
4133 #ifdef CONFIG_X86
4134 u32 prefetch;
4135
4136 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4137 prefetch |= 0x100;
4138 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4139 #endif
4140 }
4141
4142 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4143 * in a prefetch beyond physical memory.
4144 */
4145 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4146 {
4147 u32 dma_prefetch;
4148 __u32 dma_refetch;
4149
4150 if (h->board_id != 0x3225103C)
4151 return;
4152 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4153 dma_prefetch |= 0x8000;
4154 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4155 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4156 dma_refetch |= 0x1;
4157 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4158 }
4159
4160 static int __devinit cciss_pci_init(ctlr_info_t *h)
4161 {
4162 int prod_index, err;
4163
4164 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4165 if (prod_index < 0)
4166 return -ENODEV;
4167 h->product_name = products[prod_index].product_name;
4168 h->access = *(products[prod_index].access);
4169
4170 if (cciss_board_disabled(h)) {
4171 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4172 return -ENODEV;
4173 }
4174 err = pci_enable_device(h->pdev);
4175 if (err) {
4176 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4177 return err;
4178 }
4179
4180 err = pci_request_regions(h->pdev, "cciss");
4181 if (err) {
4182 dev_warn(&h->pdev->dev,
4183 "Cannot obtain PCI resources, aborting\n");
4184 return err;
4185 }
4186
4187 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4188 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4189
4190 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4191 * else we use the IO-APIC interrupt assigned to us by system ROM.
4192 */
4193 cciss_interrupt_mode(h);
4194 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4195 if (err)
4196 goto err_out_free_res;
4197 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4198 if (!h->vaddr) {
4199 err = -ENOMEM;
4200 goto err_out_free_res;
4201 }
4202 err = cciss_wait_for_board_ready(h);
4203 if (err)
4204 goto err_out_free_res;
4205 err = cciss_find_cfgtables(h);
4206 if (err)
4207 goto err_out_free_res;
4208 print_cfg_table(h);
4209 cciss_find_board_params(h);
4210
4211 if (!CISS_signature_present(h)) {
4212 err = -ENODEV;
4213 goto err_out_free_res;
4214 }
4215 cciss_enable_scsi_prefetch(h);
4216 cciss_p600_dma_prefetch_quirk(h);
4217 cciss_put_controller_into_performant_mode(h);
4218 return 0;
4219
4220 err_out_free_res:
4221 /*
4222 * Deliberately omit pci_disable_device(): it does something nasty to
4223 * Smart Array controllers that pci_enable_device does not undo
4224 */
4225 if (h->transtable)
4226 iounmap(h->transtable);
4227 if (h->cfgtable)
4228 iounmap(h->cfgtable);
4229 if (h->vaddr)
4230 iounmap(h->vaddr);
4231 pci_release_regions(h->pdev);
4232 return err;
4233 }
4234
4235 /* Function to find the first free pointer into our hba[] array
4236 * Returns -1 if no free entries are left.
4237 */
4238 static int alloc_cciss_hba(struct pci_dev *pdev)
4239 {
4240 int i;
4241
4242 for (i = 0; i < MAX_CTLR; i++) {
4243 if (!hba[i]) {
4244 ctlr_info_t *h;
4245
4246 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4247 if (!h)
4248 goto Enomem;
4249 hba[i] = h;
4250 return i;
4251 }
4252 }
4253 dev_warn(&pdev->dev, "This driver supports a maximum"
4254 " of %d controllers.\n", MAX_CTLR);
4255 return -1;
4256 Enomem:
4257 dev_warn(&pdev->dev, "out of memory.\n");
4258 return -1;
4259 }
4260
4261 static void free_hba(ctlr_info_t *h)
4262 {
4263 int i;
4264
4265 hba[h->ctlr] = NULL;
4266 for (i = 0; i < h->highest_lun + 1; i++)
4267 if (h->gendisk[i] != NULL)
4268 put_disk(h->gendisk[i]);
4269 kfree(h);
4270 }
4271
4272 /* Send a message CDB to the firmware. */
4273 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4274 {
4275 typedef struct {
4276 CommandListHeader_struct CommandHeader;
4277 RequestBlock_struct Request;
4278 ErrDescriptor_struct ErrorDescriptor;
4279 } Command;
4280 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4281 Command *cmd;
4282 dma_addr_t paddr64;
4283 uint32_t paddr32, tag;
4284 void __iomem *vaddr;
4285 int i, err;
4286
4287 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4288 if (vaddr == NULL)
4289 return -ENOMEM;
4290
4291 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4292 CCISS commands, so they must be allocated from the lower 4GiB of
4293 memory. */
4294 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4295 if (err) {
4296 iounmap(vaddr);
4297 return -ENOMEM;
4298 }
4299
4300 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4301 if (cmd == NULL) {
4302 iounmap(vaddr);
4303 return -ENOMEM;
4304 }
4305
4306 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4307 although there's no guarantee, we assume that the address is at
4308 least 4-byte aligned (most likely, it's page-aligned). */
4309 paddr32 = paddr64;
4310
4311 cmd->CommandHeader.ReplyQueue = 0;
4312 cmd->CommandHeader.SGList = 0;
4313 cmd->CommandHeader.SGTotal = 0;
4314 cmd->CommandHeader.Tag.lower = paddr32;
4315 cmd->CommandHeader.Tag.upper = 0;
4316 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4317
4318 cmd->Request.CDBLen = 16;
4319 cmd->Request.Type.Type = TYPE_MSG;
4320 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4321 cmd->Request.Type.Direction = XFER_NONE;
4322 cmd->Request.Timeout = 0; /* Don't time out */
4323 cmd->Request.CDB[0] = opcode;
4324 cmd->Request.CDB[1] = type;
4325 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4326
4327 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4328 cmd->ErrorDescriptor.Addr.upper = 0;
4329 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4330
4331 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4332
4333 for (i = 0; i < 10; i++) {
4334 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4335 if ((tag & ~3) == paddr32)
4336 break;
4337 schedule_timeout_uninterruptible(HZ);
4338 }
4339
4340 iounmap(vaddr);
4341
4342 /* we leak the DMA buffer here ... no choice since the controller could
4343 still complete the command. */
4344 if (i == 10) {
4345 dev_err(&pdev->dev,
4346 "controller message %02x:%02x timed out\n",
4347 opcode, type);
4348 return -ETIMEDOUT;
4349 }
4350
4351 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4352
4353 if (tag & 2) {
4354 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4355 opcode, type);
4356 return -EIO;
4357 }
4358
4359 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4360 opcode, type);
4361 return 0;
4362 }
4363
4364 #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4365 #define cciss_noop(p) cciss_message(p, 3, 0)
4366
4367 static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4368 {
4369 /* the #defines are stolen from drivers/pci/msi.h. */
4370 #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4371 #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4372
4373 int pos;
4374 u16 control = 0;
4375
4376 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4377 if (pos) {
4378 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4379 if (control & PCI_MSI_FLAGS_ENABLE) {
4380 dev_info(&pdev->dev, "resetting MSI\n");
4381 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4382 }
4383 }
4384
4385 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4386 if (pos) {
4387 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4388 if (control & PCI_MSIX_FLAGS_ENABLE) {
4389 dev_info(&pdev->dev, "resetting MSI-X\n");
4390 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4391 }
4392 }
4393
4394 return 0;
4395 }
4396
4397 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4398 void * __iomem vaddr, bool use_doorbell)
4399 {
4400 u16 pmcsr;
4401 int pos;
4402
4403 if (use_doorbell) {
4404 /* For everything after the P600, the PCI power state method
4405 * of resetting the controller doesn't work, so we have this
4406 * other way using the doorbell register.
4407 */
4408 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4409 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4410 msleep(1000);
4411 } else { /* Try to do it the PCI power state way */
4412
4413 /* Quoting from the Open CISS Specification: "The Power
4414 * Management Control/Status Register (CSR) controls the power
4415 * state of the device. The normal operating state is D0,
4416 * CSR=00h. The software off state is D3, CSR=03h. To reset
4417 * the controller, place the interface device in D3 then to D0,
4418 * this causes a secondary PCI reset which will reset the
4419 * controller." */
4420
4421 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4422 if (pos == 0) {
4423 dev_err(&pdev->dev,
4424 "cciss_controller_hard_reset: "
4425 "PCI PM not supported\n");
4426 return -ENODEV;
4427 }
4428 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4429 /* enter the D3hot power management state */
4430 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4431 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4432 pmcsr |= PCI_D3hot;
4433 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4434
4435 msleep(500);
4436
4437 /* enter the D0 power management state */
4438 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4439 pmcsr |= PCI_D0;
4440 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4441
4442 msleep(500);
4443 }
4444 return 0;
4445 }
4446
4447 /* This does a hard reset of the controller using PCI power management
4448 * states or using the doorbell register. */
4449 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4450 {
4451 u16 saved_config_space[32];
4452 u64 cfg_offset;
4453 u32 cfg_base_addr;
4454 u64 cfg_base_addr_index;
4455 void __iomem *vaddr;
4456 unsigned long paddr;
4457 u32 misc_fw_support, active_transport;
4458 int rc, i;
4459 CfgTable_struct __iomem *cfgtable;
4460 bool use_doorbell;
4461 u32 board_id;
4462
4463 /* For controllers as old a the p600, this is very nearly
4464 * the same thing as
4465 *
4466 * pci_save_state(pci_dev);
4467 * pci_set_power_state(pci_dev, PCI_D3hot);
4468 * pci_set_power_state(pci_dev, PCI_D0);
4469 * pci_restore_state(pci_dev);
4470 *
4471 * but we can't use these nice canned kernel routines on
4472 * kexec, because they also check the MSI/MSI-X state in PCI
4473 * configuration space and do the wrong thing when it is
4474 * set/cleared. Also, the pci_save/restore_state functions
4475 * violate the ordering requirements for restoring the
4476 * configuration space from the CCISS document (see the
4477 * comment below). So we roll our own ....
4478 *
4479 * For controllers newer than the P600, the pci power state
4480 * method of resetting doesn't work so we have another way
4481 * using the doorbell register.
4482 */
4483
4484 /* Exclude 640x boards. These are two pci devices in one slot
4485 * which share a battery backed cache module. One controls the
4486 * cache, the other accesses the cache through the one that controls
4487 * it. If we reset the one controlling the cache, the other will
4488 * likely not be happy. Just forbid resetting this conjoined mess.
4489 */
4490 cciss_lookup_board_id(pdev, &board_id);
4491 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4492 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4493 "due to shared cache module.");
4494 return -ENODEV;
4495 }
4496
4497 for (i = 0; i < 32; i++)
4498 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
4499
4500 /* find the first memory BAR, so we can find the cfg table */
4501 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4502 if (rc)
4503 return rc;
4504 vaddr = remap_pci_mem(paddr, 0x250);
4505 if (!vaddr)
4506 return -ENOMEM;
4507
4508 /* find cfgtable in order to check if reset via doorbell is supported */
4509 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4510 &cfg_base_addr_index, &cfg_offset);
4511 if (rc)
4512 goto unmap_vaddr;
4513 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4514 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4515 if (!cfgtable) {
4516 rc = -ENOMEM;
4517 goto unmap_vaddr;
4518 }
4519
4520 /* If reset via doorbell register is supported, use that. */
4521 misc_fw_support = readl(&cfgtable->misc_fw_support);
4522 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4523
4524 /* The doorbell reset seems to cause lockups on some Smart
4525 * Arrays (e.g. P410, P410i, maybe others). Until this is
4526 * fixed or at least isolated, avoid the doorbell reset.
4527 */
4528 use_doorbell = 0;
4529
4530 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4531 if (rc)
4532 goto unmap_cfgtable;
4533
4534 /* Restore the PCI configuration space. The Open CISS
4535 * Specification says, "Restore the PCI Configuration
4536 * Registers, offsets 00h through 60h. It is important to
4537 * restore the command register, 16-bits at offset 04h,
4538 * last. Do not restore the configuration status register,
4539 * 16-bits at offset 06h." Note that the offset is 2*i.
4540 */
4541 for (i = 0; i < 32; i++) {
4542 if (i == 2 || i == 3)
4543 continue;
4544 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4545 }
4546 wmb();
4547 pci_write_config_word(pdev, 4, saved_config_space[2]);
4548
4549 /* Some devices (notably the HP Smart Array 5i Controller)
4550 need a little pause here */
4551 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4552
4553 /* Controller should be in simple mode at this point. If it's not,
4554 * It means we're on one of those controllers which doesn't support
4555 * the doorbell reset method and on which the PCI power management reset
4556 * method doesn't work (P800, for example.)
4557 * In those cases, don't try to proceed, as it generally doesn't work.
4558 */
4559 active_transport = readl(&cfgtable->TransportActive);
4560 if (active_transport & PERFORMANT_MODE) {
4561 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4562 " Ignoring controller.\n");
4563 rc = -ENODEV;
4564 }
4565
4566 unmap_cfgtable:
4567 iounmap(cfgtable);
4568
4569 unmap_vaddr:
4570 iounmap(vaddr);
4571 return rc;
4572 }
4573
4574 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4575 {
4576 int rc, i;
4577
4578 if (!reset_devices)
4579 return 0;
4580
4581 /* Reset the controller with a PCI power-cycle or via doorbell */
4582 rc = cciss_kdump_hard_reset_controller(pdev);
4583
4584 /* -ENOTSUPP here means we cannot reset the controller
4585 * but it's already (and still) up and running in
4586 * "performant mode". Or, it might be 640x, which can't reset
4587 * due to concerns about shared bbwc between 6402/6404 pair.
4588 */
4589 if (rc == -ENOTSUPP)
4590 return 0; /* just try to do the kdump anyhow. */
4591 if (rc)
4592 return -ENODEV;
4593 if (cciss_reset_msi(pdev))
4594 return -ENODEV;
4595
4596 /* Now try to get the controller to respond to a no-op */
4597 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4598 if (cciss_noop(pdev) == 0)
4599 break;
4600 else
4601 dev_warn(&pdev->dev, "no-op failed%s\n",
4602 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4603 "; re-trying" : ""));
4604 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4605 }
4606 return 0;
4607 }
4608
4609 /*
4610 * This is it. Find all the controllers and register them. I really hate
4611 * stealing all these major device numbers.
4612 * returns the number of block devices registered.
4613 */
4614 static int __devinit cciss_init_one(struct pci_dev *pdev,
4615 const struct pci_device_id *ent)
4616 {
4617 int i;
4618 int j = 0;
4619 int k = 0;
4620 int rc;
4621 int dac, return_code;
4622 InquiryData_struct *inq_buff;
4623 ctlr_info_t *h;
4624
4625 rc = cciss_init_reset_devices(pdev);
4626 if (rc)
4627 return rc;
4628 i = alloc_cciss_hba(pdev);
4629 if (i < 0)
4630 return -1;
4631
4632 h = hba[i];
4633 h->pdev = pdev;
4634 h->busy_initializing = 1;
4635 INIT_HLIST_HEAD(&h->cmpQ);
4636 INIT_HLIST_HEAD(&h->reqQ);
4637 mutex_init(&h->busy_shutting_down);
4638
4639 if (cciss_pci_init(h) != 0)
4640 goto clean_no_release_regions;
4641
4642 sprintf(h->devname, "cciss%d", i);
4643 h->ctlr = i;
4644
4645 init_completion(&h->scan_wait);
4646
4647 if (cciss_create_hba_sysfs_entry(h))
4648 goto clean0;
4649
4650 /* configure PCI DMA stuff */
4651 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4652 dac = 1;
4653 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4654 dac = 0;
4655 else {
4656 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4657 goto clean1;
4658 }
4659
4660 /*
4661 * register with the major number, or get a dynamic major number
4662 * by passing 0 as argument. This is done for greater than
4663 * 8 controller support.
4664 */
4665 if (i < MAX_CTLR_ORIG)
4666 h->major = COMPAQ_CISS_MAJOR + i;
4667 rc = register_blkdev(h->major, h->devname);
4668 if (rc == -EBUSY || rc == -EINVAL) {
4669 dev_err(&h->pdev->dev,
4670 "Unable to get major number %d for %s "
4671 "on hba %d\n", h->major, h->devname, i);
4672 goto clean1;
4673 } else {
4674 if (i >= MAX_CTLR_ORIG)
4675 h->major = rc;
4676 }
4677
4678 /* make sure the board interrupts are off */
4679 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4680 if (h->msi_vector || h->msix_vector) {
4681 if (request_irq(h->intr[PERF_MODE_INT],
4682 do_cciss_msix_intr,
4683 IRQF_DISABLED, h->devname, h)) {
4684 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4685 h->intr[PERF_MODE_INT], h->devname);
4686 goto clean2;
4687 }
4688 } else {
4689 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4690 IRQF_DISABLED, h->devname, h)) {
4691 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4692 h->intr[PERF_MODE_INT], h->devname);
4693 goto clean2;
4694 }
4695 }
4696
4697 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
4698 h->devname, pdev->device, pci_name(pdev),
4699 h->intr[PERF_MODE_INT], dac ? "" : " not");
4700
4701 h->cmd_pool_bits =
4702 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4703 * sizeof(unsigned long), GFP_KERNEL);
4704 h->cmd_pool = (CommandList_struct *)
4705 pci_alloc_consistent(h->pdev,
4706 h->nr_cmds * sizeof(CommandList_struct),
4707 &(h->cmd_pool_dhandle));
4708 h->errinfo_pool = (ErrorInfo_struct *)
4709 pci_alloc_consistent(h->pdev,
4710 h->nr_cmds * sizeof(ErrorInfo_struct),
4711 &(h->errinfo_pool_dhandle));
4712 if ((h->cmd_pool_bits == NULL)
4713 || (h->cmd_pool == NULL)
4714 || (h->errinfo_pool == NULL)) {
4715 dev_err(&h->pdev->dev, "out of memory");
4716 goto clean4;
4717 }
4718
4719 /* Need space for temp scatter list */
4720 h->scatter_list = kmalloc(h->max_commands *
4721 sizeof(struct scatterlist *),
4722 GFP_KERNEL);
4723 if (!h->scatter_list)
4724 goto clean4;
4725
4726 for (k = 0; k < h->nr_cmds; k++) {
4727 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4728 h->maxsgentries,
4729 GFP_KERNEL);
4730 if (h->scatter_list[k] == NULL) {
4731 dev_err(&h->pdev->dev,
4732 "could not allocate s/g lists\n");
4733 goto clean4;
4734 }
4735 }
4736 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4737 h->chainsize, h->nr_cmds);
4738 if (!h->cmd_sg_list && h->chainsize > 0)
4739 goto clean4;
4740
4741 spin_lock_init(&h->lock);
4742
4743 /* Initialize the pdev driver private data.
4744 have it point to h. */
4745 pci_set_drvdata(pdev, h);
4746 /* command and error info recs zeroed out before
4747 they are used */
4748 memset(h->cmd_pool_bits, 0,
4749 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4750 * sizeof(unsigned long));
4751
4752 h->num_luns = 0;
4753 h->highest_lun = -1;
4754 for (j = 0; j < CISS_MAX_LUN; j++) {
4755 h->drv[j] = NULL;
4756 h->gendisk[j] = NULL;
4757 }
4758
4759 cciss_scsi_setup(h);
4760
4761 /* Turn the interrupts on so we can service requests */
4762 h->access.set_intr_mask(h, CCISS_INTR_ON);
4763
4764 /* Get the firmware version */
4765 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4766 if (inq_buff == NULL) {
4767 dev_err(&h->pdev->dev, "out of memory\n");
4768 goto clean4;
4769 }
4770
4771 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
4772 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
4773 if (return_code == IO_OK) {
4774 h->firm_ver[0] = inq_buff->data_byte[32];
4775 h->firm_ver[1] = inq_buff->data_byte[33];
4776 h->firm_ver[2] = inq_buff->data_byte[34];
4777 h->firm_ver[3] = inq_buff->data_byte[35];
4778 } else { /* send command failed */
4779 dev_warn(&h->pdev->dev, "unable to determine firmware"
4780 " version of controller\n");
4781 }
4782 kfree(inq_buff);
4783
4784 cciss_procinit(h);
4785
4786 h->cciss_max_sectors = 8192;
4787
4788 rebuild_lun_table(h, 1, 0);
4789 h->busy_initializing = 0;
4790 return 1;
4791
4792 clean4:
4793 kfree(h->cmd_pool_bits);
4794 /* Free up sg elements */
4795 for (k-- ; k >= 0; k--)
4796 kfree(h->scatter_list[k]);
4797 kfree(h->scatter_list);
4798 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4799 if (h->cmd_pool)
4800 pci_free_consistent(h->pdev,
4801 h->nr_cmds * sizeof(CommandList_struct),
4802 h->cmd_pool, h->cmd_pool_dhandle);
4803 if (h->errinfo_pool)
4804 pci_free_consistent(h->pdev,
4805 h->nr_cmds * sizeof(ErrorInfo_struct),
4806 h->errinfo_pool,
4807 h->errinfo_pool_dhandle);
4808 free_irq(h->intr[PERF_MODE_INT], h);
4809 clean2:
4810 unregister_blkdev(h->major, h->devname);
4811 clean1:
4812 cciss_destroy_hba_sysfs_entry(h);
4813 clean0:
4814 pci_release_regions(pdev);
4815 clean_no_release_regions:
4816 h->busy_initializing = 0;
4817
4818 /*
4819 * Deliberately omit pci_disable_device(): it does something nasty to
4820 * Smart Array controllers that pci_enable_device does not undo
4821 */
4822 pci_set_drvdata(pdev, NULL);
4823 free_hba(h);
4824 return -1;
4825 }
4826
4827 static void cciss_shutdown(struct pci_dev *pdev)
4828 {
4829 ctlr_info_t *h;
4830 char *flush_buf;
4831 int return_code;
4832
4833 h = pci_get_drvdata(pdev);
4834 flush_buf = kzalloc(4, GFP_KERNEL);
4835 if (!flush_buf) {
4836 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
4837 return;
4838 }
4839 /* write all data in the battery backed cache to disk */
4840 memset(flush_buf, 0, 4);
4841 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
4842 4, 0, CTLR_LUNID, TYPE_CMD);
4843 kfree(flush_buf);
4844 if (return_code != IO_OK)
4845 dev_warn(&h->pdev->dev, "Error flushing cache\n");
4846 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4847 free_irq(h->intr[PERF_MODE_INT], h);
4848 }
4849
4850 static void __devexit cciss_remove_one(struct pci_dev *pdev)
4851 {
4852 ctlr_info_t *h;
4853 int i, j;
4854
4855 if (pci_get_drvdata(pdev) == NULL) {
4856 dev_err(&pdev->dev, "Unable to remove device\n");
4857 return;
4858 }
4859
4860 h = pci_get_drvdata(pdev);
4861 i = h->ctlr;
4862 if (hba[i] == NULL) {
4863 dev_err(&pdev->dev, "device appears to already be removed\n");
4864 return;
4865 }
4866
4867 mutex_lock(&h->busy_shutting_down);
4868
4869 remove_from_scan_list(h);
4870 remove_proc_entry(h->devname, proc_cciss);
4871 unregister_blkdev(h->major, h->devname);
4872
4873 /* remove it from the disk list */
4874 for (j = 0; j < CISS_MAX_LUN; j++) {
4875 struct gendisk *disk = h->gendisk[j];
4876 if (disk) {
4877 struct request_queue *q = disk->queue;
4878
4879 if (disk->flags & GENHD_FL_UP) {
4880 cciss_destroy_ld_sysfs_entry(h, j, 1);
4881 del_gendisk(disk);
4882 }
4883 if (q)
4884 blk_cleanup_queue(q);
4885 }
4886 }
4887
4888 #ifdef CONFIG_CISS_SCSI_TAPE
4889 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
4890 #endif
4891
4892 cciss_shutdown(pdev);
4893
4894 #ifdef CONFIG_PCI_MSI
4895 if (h->msix_vector)
4896 pci_disable_msix(h->pdev);
4897 else if (h->msi_vector)
4898 pci_disable_msi(h->pdev);
4899 #endif /* CONFIG_PCI_MSI */
4900
4901 iounmap(h->transtable);
4902 iounmap(h->cfgtable);
4903 iounmap(h->vaddr);
4904
4905 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4906 h->cmd_pool, h->cmd_pool_dhandle);
4907 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4908 h->errinfo_pool, h->errinfo_pool_dhandle);
4909 kfree(h->cmd_pool_bits);
4910 /* Free up sg elements */
4911 for (j = 0; j < h->nr_cmds; j++)
4912 kfree(h->scatter_list[j]);
4913 kfree(h->scatter_list);
4914 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4915 /*
4916 * Deliberately omit pci_disable_device(): it does something nasty to
4917 * Smart Array controllers that pci_enable_device does not undo
4918 */
4919 pci_release_regions(pdev);
4920 pci_set_drvdata(pdev, NULL);
4921 cciss_destroy_hba_sysfs_entry(h);
4922 mutex_unlock(&h->busy_shutting_down);
4923 free_hba(h);
4924 }
4925
4926 static struct pci_driver cciss_pci_driver = {
4927 .name = "cciss",
4928 .probe = cciss_init_one,
4929 .remove = __devexit_p(cciss_remove_one),
4930 .id_table = cciss_pci_device_id, /* id_table */
4931 .shutdown = cciss_shutdown,
4932 };
4933
4934 /*
4935 * This is it. Register the PCI driver information for the cards we control
4936 * the OS will call our registered routines when it finds one of our cards.
4937 */
4938 static int __init cciss_init(void)
4939 {
4940 int err;
4941
4942 /*
4943 * The hardware requires that commands are aligned on a 64-bit
4944 * boundary. Given that we use pci_alloc_consistent() to allocate an
4945 * array of them, the size must be a multiple of 8 bytes.
4946 */
4947 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
4948 printk(KERN_INFO DRIVER_NAME "\n");
4949
4950 err = bus_register(&cciss_bus_type);
4951 if (err)
4952 return err;
4953
4954 /* Start the scan thread */
4955 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4956 if (IS_ERR(cciss_scan_thread)) {
4957 err = PTR_ERR(cciss_scan_thread);
4958 goto err_bus_unregister;
4959 }
4960
4961 /* Register for our PCI devices */
4962 err = pci_register_driver(&cciss_pci_driver);
4963 if (err)
4964 goto err_thread_stop;
4965
4966 return err;
4967
4968 err_thread_stop:
4969 kthread_stop(cciss_scan_thread);
4970 err_bus_unregister:
4971 bus_unregister(&cciss_bus_type);
4972
4973 return err;
4974 }
4975
4976 static void __exit cciss_cleanup(void)
4977 {
4978 int i;
4979
4980 pci_unregister_driver(&cciss_pci_driver);
4981 /* double check that all controller entrys have been removed */
4982 for (i = 0; i < MAX_CTLR; i++) {
4983 if (hba[i] != NULL) {
4984 dev_warn(&hba[i]->pdev->dev,
4985 "had to remove controller\n");
4986 cciss_remove_one(hba[i]->pdev);
4987 }
4988 }
4989 kthread_stop(cciss_scan_thread);
4990 remove_proc_entry("driver/cciss", NULL);
4991 bus_unregister(&cciss_bus_type);
4992 }
4993
4994 module_init(cciss_init);
4995 module_exit(cciss_cleanup);
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