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[linux-rt-nao.git] / arch / mips / include / asm / mach-ip27 / dma-coherence.h
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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
8 */
9 #ifndef __ASM_MACH_IP27_DMA_COHERENCE_H
10 #define __ASM_MACH_IP27_DMA_COHERENCE_H
12 #include <asm/pci/bridge.h>
14 #define pdev_to_baddr(pdev, addr) \
15 (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))
16 #define dev_to_baddr(dev, addr) \
17 pdev_to_baddr(to_pci_dev(dev), (addr))
19 struct device;
21 static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
22 size_t size)
24 dma_addr_t pa = dev_to_baddr(dev, virt_to_phys(addr));
26 return pa;
29 static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
31 dma_addr_t pa = dev_to_baddr(dev, page_to_phys(page));
33 return pa;
36 static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
38 return dma_addr & ~(0xffUL << 56);
41 static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr)
45 static inline int plat_dma_supported(struct device *dev, u64 mask)
48 * we fall back to GFP_DMA when the mask isn't all 1s,
49 * so we can't guarantee allocations that must be
50 * within a tighter range than GFP_DMA..
52 if (mask < DMA_BIT_MASK(24))
53 return 0;
55 return 1;
58 static inline void plat_extra_sync_for_device(struct device *dev)
60 return;
63 static inline int plat_dma_mapping_error(struct device *dev,
64 dma_addr_t dma_addr)
66 return 0;
69 static inline int plat_device_is_coherent(struct device *dev)
71 return 1; /* IP27 non-cohernet mode is unsupported */
74 #endif /* __ASM_MACH_IP27_DMA_COHERENCE_H */