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[linux-rt-nao.git] / arch / x86 / include / asm / pci_64.h
blob4da207982777e75a970fca5fee80cb2883381e4e
1 #ifndef _ASM_X86_PCI_64_H
2 #define _ASM_X86_PCI_64_H
4 #ifdef __KERNEL__
6 #ifdef CONFIG_CALGARY_IOMMU
7 static inline void *pci_iommu(struct pci_bus *bus)
9 struct pci_sysdata *sd = bus->sysdata;
10 return sd->iommu;
13 static inline void set_pci_iommu(struct pci_bus *bus, void *val)
15 struct pci_sysdata *sd = bus->sysdata;
16 sd->iommu = val;
18 #endif /* CONFIG_CALGARY_IOMMU */
20 extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
21 int reg, int len, u32 *value);
22 extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
23 int reg, int len, u32 value);
25 extern void dma32_reserve_bootmem(void);
27 /* The PCI address space does equal the physical memory
28 * address space. The networking and block device layers use
29 * this boolean for bounce buffer decisions
31 * On AMD64 it mostly equals, but we set it to zero if a hardware
32 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
34 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
36 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
37 dma_addr_t ADDR_NAME;
38 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
39 __u32 LEN_NAME;
40 #define pci_unmap_addr(PTR, ADDR_NAME) \
41 ((PTR)->ADDR_NAME)
42 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
43 (((PTR)->ADDR_NAME) = (VAL))
44 #define pci_unmap_len(PTR, LEN_NAME) \
45 ((PTR)->LEN_NAME)
46 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
47 (((PTR)->LEN_NAME) = (VAL))
49 #endif /* __KERNEL__ */
51 #endif /* _ASM_X86_PCI_64_H */