2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
17 * For more information, go to http://www.urbanmyth.org/microcode
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
73 #include <linux/platform_device.h>
74 #include <linux/capability.h>
75 #include <linux/miscdevice.h>
76 #include <linux/firmware.h>
77 #include <linux/smp_lock.h>
78 #include <linux/spinlock.h>
79 #include <linux/cpumask.h>
80 #include <linux/uaccess.h>
81 #include <linux/vmalloc.h>
82 #include <linux/kernel.h>
83 #include <linux/module.h>
84 #include <linux/mutex.h>
85 #include <linux/sched.h>
86 #include <linux/init.h>
87 #include <linux/slab.h>
88 #include <linux/cpu.h>
92 #include <asm/microcode.h>
93 #include <asm/processor.h>
96 MODULE_DESCRIPTION("Microcode Update Driver");
97 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
98 MODULE_LICENSE("GPL");
100 struct microcode_header_intel
{
108 unsigned int datasize
;
109 unsigned int totalsize
;
110 unsigned int reserved
[3];
113 struct microcode_intel
{
114 struct microcode_header_intel hdr
;
115 unsigned int bits
[0];
118 /* microcode format is extended from prescott processors */
119 struct extended_signature
{
125 struct extended_sigtable
{
128 unsigned int reserved
[3];
129 struct extended_signature sigs
[0];
132 #define DEFAULT_UCODE_DATASIZE (2000)
133 #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
134 #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
135 #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
136 #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
137 #define DWSIZE (sizeof(u32))
139 #define get_totalsize(mc) \
140 (((struct microcode_intel *)mc)->hdr.totalsize ? \
141 ((struct microcode_intel *)mc)->hdr.totalsize : \
142 DEFAULT_UCODE_TOTALSIZE)
144 #define get_datasize(mc) \
145 (((struct microcode_intel *)mc)->hdr.datasize ? \
146 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
148 #define sigmatch(s1, s2, p1, p2) \
149 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
151 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
153 /* serialize access to the physical write to MSR 0x79 */
154 static DEFINE_RAW_SPINLOCK(microcode_update_lock
);
156 static int collect_cpu_info(int cpu_num
, struct cpu_signature
*csig
)
158 struct cpuinfo_x86
*c
= &cpu_data(cpu_num
);
162 memset(csig
, 0, sizeof(*csig
));
164 if (c
->x86_vendor
!= X86_VENDOR_INTEL
|| c
->x86
< 6 ||
165 cpu_has(c
, X86_FEATURE_IA64
)) {
166 printk(KERN_ERR
"microcode: CPU%d not a capable Intel "
167 "processor\n", cpu_num
);
171 csig
->sig
= cpuid_eax(0x00000001);
173 if ((c
->x86_model
>= 5) || (c
->x86
> 6)) {
174 /* get processor flags from MSR 0x17 */
175 rdmsr(MSR_IA32_PLATFORM_ID
, val
[0], val
[1]);
176 csig
->pf
= 1 << ((val
[1] >> 18) & 7);
179 /* serialize access to the physical write to MSR 0x79 */
180 spin_lock_irqsave(µcode_update_lock
, flags
);
182 wrmsr(MSR_IA32_UCODE_REV
, 0, 0);
183 /* see notes above for revision 1.07. Apparent chip bug */
185 /* get the current revision from MSR 0x8B */
186 rdmsr(MSR_IA32_UCODE_REV
, val
[0], csig
->rev
);
187 spin_unlock_irqrestore(µcode_update_lock
, flags
);
189 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
190 csig
->sig
, csig
->pf
, csig
->rev
);
195 static inline int update_match_cpu(struct cpu_signature
*csig
, int sig
, int pf
)
197 return (!sigmatch(sig
, csig
->sig
, pf
, csig
->pf
)) ? 0 : 1;
201 update_match_revision(struct microcode_header_intel
*mc_header
, int rev
)
203 return (mc_header
->rev
<= rev
) ? 0 : 1;
206 static int microcode_sanity_check(void *mc
)
208 unsigned long total_size
, data_size
, ext_table_size
;
209 struct microcode_header_intel
*mc_header
= mc
;
210 struct extended_sigtable
*ext_header
= NULL
;
211 int sum
, orig_sum
, ext_sigcount
= 0, i
;
212 struct extended_signature
*ext_sig
;
214 total_size
= get_totalsize(mc_header
);
215 data_size
= get_datasize(mc_header
);
217 if (data_size
+ MC_HEADER_SIZE
> total_size
) {
218 printk(KERN_ERR
"microcode: error! "
219 "Bad data size in microcode data file\n");
223 if (mc_header
->ldrver
!= 1 || mc_header
->hdrver
!= 1) {
224 printk(KERN_ERR
"microcode: error! "
225 "Unknown microcode update format\n");
228 ext_table_size
= total_size
- (MC_HEADER_SIZE
+ data_size
);
229 if (ext_table_size
) {
230 if ((ext_table_size
< EXT_HEADER_SIZE
)
231 || ((ext_table_size
- EXT_HEADER_SIZE
) % EXT_SIGNATURE_SIZE
)) {
232 printk(KERN_ERR
"microcode: error! "
233 "Small exttable size in microcode data file\n");
236 ext_header
= mc
+ MC_HEADER_SIZE
+ data_size
;
237 if (ext_table_size
!= exttable_size(ext_header
)) {
238 printk(KERN_ERR
"microcode: error! "
239 "Bad exttable size in microcode data file\n");
242 ext_sigcount
= ext_header
->count
;
245 /* check extended table checksum */
246 if (ext_table_size
) {
247 int ext_table_sum
= 0;
248 int *ext_tablep
= (int *)ext_header
;
250 i
= ext_table_size
/ DWSIZE
;
252 ext_table_sum
+= ext_tablep
[i
];
254 printk(KERN_WARNING
"microcode: aborting, "
255 "bad extended signature table checksum\n");
260 /* calculate the checksum */
262 i
= (MC_HEADER_SIZE
+ data_size
) / DWSIZE
;
264 orig_sum
+= ((int *)mc
)[i
];
266 printk(KERN_ERR
"microcode: aborting, bad checksum\n");
271 /* check extended signature checksum */
272 for (i
= 0; i
< ext_sigcount
; i
++) {
273 ext_sig
= (void *)ext_header
+ EXT_HEADER_SIZE
+
274 EXT_SIGNATURE_SIZE
* i
;
276 - (mc_header
->sig
+ mc_header
->pf
+ mc_header
->cksum
)
277 + (ext_sig
->sig
+ ext_sig
->pf
+ ext_sig
->cksum
);
279 printk(KERN_ERR
"microcode: aborting, bad checksum\n");
287 * return 0 - no update found
288 * return 1 - found update
291 get_matching_microcode(struct cpu_signature
*cpu_sig
, void *mc
, int rev
)
293 struct microcode_header_intel
*mc_header
= mc
;
294 struct extended_sigtable
*ext_header
;
295 unsigned long total_size
= get_totalsize(mc_header
);
297 struct extended_signature
*ext_sig
;
299 if (!update_match_revision(mc_header
, rev
))
302 if (update_match_cpu(cpu_sig
, mc_header
->sig
, mc_header
->pf
))
305 /* Look for ext. headers: */
306 if (total_size
<= get_datasize(mc_header
) + MC_HEADER_SIZE
)
309 ext_header
= mc
+ get_datasize(mc_header
) + MC_HEADER_SIZE
;
310 ext_sigcount
= ext_header
->count
;
311 ext_sig
= (void *)ext_header
+ EXT_HEADER_SIZE
;
313 for (i
= 0; i
< ext_sigcount
; i
++) {
314 if (update_match_cpu(cpu_sig
, ext_sig
->sig
, ext_sig
->pf
))
321 static void apply_microcode(int cpu
)
323 struct microcode_intel
*mc_intel
;
324 struct ucode_cpu_info
*uci
;
329 cpu_num
= raw_smp_processor_id();
330 uci
= ucode_cpu_info
+ cpu
;
333 /* We should bind the task to the CPU */
334 BUG_ON(cpu_num
!= cpu
);
336 if (mc_intel
== NULL
)
339 /* serialize access to the physical write to MSR 0x79 */
340 spin_lock_irqsave(µcode_update_lock
, flags
);
342 /* write microcode via MSR 0x79 */
343 wrmsr(MSR_IA32_UCODE_WRITE
,
344 (unsigned long) mc_intel
->bits
,
345 (unsigned long) mc_intel
->bits
>> 16 >> 16);
346 wrmsr(MSR_IA32_UCODE_REV
, 0, 0);
348 /* see notes above for revision 1.07. Apparent chip bug */
351 /* get the current revision from MSR 0x8B */
352 rdmsr(MSR_IA32_UCODE_REV
, val
[0], val
[1]);
354 spin_unlock_irqrestore(µcode_update_lock
, flags
);
355 if (val
[1] != mc_intel
->hdr
.rev
) {
356 printk(KERN_ERR
"microcode: CPU%d update from revision "
357 "0x%x to 0x%x failed\n",
358 cpu_num
, uci
->cpu_sig
.rev
, val
[1]);
361 printk(KERN_INFO
"microcode: CPU%d updated from revision "
362 "0x%x to 0x%x, date = %04x-%02x-%02x \n",
363 cpu_num
, uci
->cpu_sig
.rev
, val
[1],
364 mc_intel
->hdr
.date
& 0xffff,
365 mc_intel
->hdr
.date
>> 24,
366 (mc_intel
->hdr
.date
>> 16) & 0xff);
368 uci
->cpu_sig
.rev
= val
[1];
371 static int generic_load_microcode(int cpu
, void *data
, size_t size
,
372 int (*get_ucode_data
)(void *, const void *, size_t))
374 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
375 u8
*ucode_ptr
= data
, *new_mc
= NULL
, *mc
;
376 int new_rev
= uci
->cpu_sig
.rev
;
377 unsigned int leftover
= size
;
380 struct microcode_header_intel mc_header
;
381 unsigned int mc_size
;
383 if (get_ucode_data(&mc_header
, ucode_ptr
, sizeof(mc_header
)))
386 mc_size
= get_totalsize(&mc_header
);
387 if (!mc_size
|| mc_size
> leftover
) {
388 printk(KERN_ERR
"microcode: error!"
389 "Bad data in microcode data file\n");
393 mc
= vmalloc(mc_size
);
397 if (get_ucode_data(mc
, ucode_ptr
, mc_size
) ||
398 microcode_sanity_check(mc
) < 0) {
403 if (get_matching_microcode(&uci
->cpu_sig
, mc
, new_rev
)) {
406 new_rev
= mc_header
.rev
;
411 ucode_ptr
+= mc_size
;
425 uci
->mc
= (struct microcode_intel
*)new_mc
;
427 pr_debug("microcode: CPU%d found a matching microcode update with"
428 " version 0x%x (current=0x%x)\n",
429 cpu
, new_rev
, uci
->cpu_sig
.rev
);
432 return (int)leftover
;
435 static int get_ucode_fw(void *to
, const void *from
, size_t n
)
441 static int request_microcode_fw(int cpu
, struct device
*device
)
444 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
445 const struct firmware
*firmware
;
448 /* We should bind the task to the CPU */
449 BUG_ON(cpu
!= raw_smp_processor_id());
450 sprintf(name
, "intel-ucode/%02x-%02x-%02x",
451 c
->x86
, c
->x86_model
, c
->x86_mask
);
452 ret
= request_firmware(&firmware
, name
, device
);
454 pr_debug("microcode: data file %s load failed\n", name
);
458 ret
= generic_load_microcode(cpu
, (void *)firmware
->data
,
459 firmware
->size
, &get_ucode_fw
);
461 release_firmware(firmware
);
466 static int get_ucode_user(void *to
, const void *from
, size_t n
)
468 return copy_from_user(to
, from
, n
);
471 static int request_microcode_user(int cpu
, const void __user
*buf
, size_t size
)
473 /* We should bind the task to the CPU */
474 BUG_ON(cpu
!= raw_smp_processor_id());
476 return generic_load_microcode(cpu
, (void *)buf
, size
, &get_ucode_user
);
479 static void microcode_fini_cpu(int cpu
)
481 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
487 static struct microcode_ops microcode_intel_ops
= {
488 .request_microcode_user
= request_microcode_user
,
489 .request_microcode_fw
= request_microcode_fw
,
490 .collect_cpu_info
= collect_cpu_info
,
491 .apply_microcode
= apply_microcode
,
492 .microcode_fini_cpu
= microcode_fini_cpu
,
495 struct microcode_ops
* __init
init_intel_microcode(void)
497 return µcode_intel_ops
;