1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
10 #include <linux/platform_data/cros_ec_commands.h>
11 #include <linux/platform_data/cros_ec_proto.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
15 #include <uapi/linux/sched/types.h>
19 /* The header byte, which follows the preamble */
20 #define EC_MSG_HEADER 0xec
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
26 * we could increase this so that might expect the preamble and
27 * message to occur in a single transaction. However, the maximum
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
29 * time of perhaps <320us (200 bytes / 1600 bits).
31 #define EC_MSG_PREAMBLE_COUNT 32
34 * Allow for a long time for the EC to respond. We support i2c
35 * tunneling and support fairly long messages for the tunnel (249
36 * bytes long at the moment). If we're talking to a 100 kHz device
37 * on the other end and need to transfer ~256 bytes, then we need:
38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
40 * We'll wait 8 times that to handle clock stretching and other
41 * paranoia. Note that some battery gas gauge ICs claim to have a
42 * clock stretch of 144ms in rare situations. That's incentive for
43 * not directly passing i2c through, but it's too late for that for
46 * It's pretty unlikely that we'll really see a 249 byte tunnel in
47 * anything other than testing. If this was more common we might
48 * consider having slow commands like this require a GET_STATUS
49 * wait loop. The 'flash write' command would be another candidate
50 * for this, clocking in at 2-3ms.
52 #define EC_MSG_DEADLINE_MS 200
55 * Time between raising the SPI chip select (for the end of a
56 * transaction) and dropping it again (for the next transaction).
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
64 * struct cros_ec_spi - information about a SPI-connected EC
66 * @spi: SPI device we are connected to
67 * @last_transfer_ns: time that we last finished a transfer.
68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn on CS at the start of a transaction.
70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71 * is sent when we want to turn off CS at the end of a transaction.
72 * @high_pri_worker: Used to schedule high priority work.
75 struct spi_device
*spi
;
77 unsigned int start_of_msg_delay
;
78 unsigned int end_of_msg_delay
;
79 struct kthread_worker
*high_pri_worker
;
82 typedef int (*cros_ec_xfer_fn_t
) (struct cros_ec_device
*ec_dev
,
83 struct cros_ec_command
*ec_msg
);
86 * struct cros_ec_xfer_work_params - params for our high priority workers
88 * @work: The work_struct needed to queue work
89 * @fn: The function to use to transfer
90 * @ec_dev: ChromeOS EC device
91 * @ec_msg: Message to transfer
92 * @ret: The return value of the function
95 struct cros_ec_xfer_work_params
{
96 struct kthread_work work
;
98 struct cros_ec_device
*ec_dev
;
99 struct cros_ec_command
*ec_msg
;
103 static void debug_packet(struct device
*dev
, const char *name
, u8
*ptr
,
107 dev_dbg(dev
, "%s: %*ph\n", name
, len
, ptr
);
111 static int terminate_request(struct cros_ec_device
*ec_dev
)
113 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
114 struct spi_message msg
;
115 struct spi_transfer trans
;
119 * Turn off CS, possibly adding a delay to ensure the rising edge
120 * doesn't come too soon after the end of the data.
122 spi_message_init(&msg
);
123 memset(&trans
, 0, sizeof(trans
));
124 trans
.delay
.value
= ec_spi
->end_of_msg_delay
;
125 trans
.delay
.unit
= SPI_DELAY_UNIT_USECS
;
126 spi_message_add_tail(&trans
, &msg
);
128 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
130 /* Reset end-of-response timer */
131 ec_spi
->last_transfer_ns
= ktime_get_ns();
134 "cs-deassert spi transfer failed: %d\n",
142 * receive_n_bytes - receive n bytes from the EC.
144 * Assumes buf is a pointer into the ec_dev->din buffer
146 * @ec_dev: ChromeOS EC device.
147 * @buf: Pointer to the buffer receiving the data.
148 * @n: Number of bytes received.
150 static int receive_n_bytes(struct cros_ec_device
*ec_dev
, u8
*buf
, int n
)
152 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
153 struct spi_transfer trans
;
154 struct spi_message msg
;
157 if (buf
- ec_dev
->din
+ n
> ec_dev
->din_size
)
160 memset(&trans
, 0, sizeof(trans
));
165 spi_message_init(&msg
);
166 spi_message_add_tail(&trans
, &msg
);
167 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
169 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
175 * cros_ec_spi_receive_packet - Receive a packet from the EC.
177 * This function has two phases: reading the preamble bytes (since if we read
178 * data from the EC before it is ready to send, we just get preamble) and
179 * reading the actual message.
181 * The received data is placed into ec_dev->din.
183 * @ec_dev: ChromeOS EC device
184 * @need_len: Number of message bytes we need to read
186 static int cros_ec_spi_receive_packet(struct cros_ec_device
*ec_dev
,
189 struct ec_host_response
*response
;
192 unsigned long deadline
;
195 if (ec_dev
->din_size
< EC_MSG_PREAMBLE_COUNT
)
198 /* Receive data until we see the header byte */
199 deadline
= jiffies
+ msecs_to_jiffies(EC_MSG_DEADLINE_MS
);
201 unsigned long start_jiffies
= jiffies
;
203 ret
= receive_n_bytes(ec_dev
,
205 EC_MSG_PREAMBLE_COUNT
);
210 for (end
= ptr
+ EC_MSG_PREAMBLE_COUNT
; ptr
!= end
; ptr
++) {
211 if (*ptr
== EC_SPI_FRAME_START
) {
212 dev_dbg(ec_dev
->dev
, "msg found at %zd\n",
221 * Use the time at the start of the loop as a timeout. This
222 * gives us one last shot at getting the transfer and is useful
223 * in case we got context switched out for a while.
225 if (time_after(start_jiffies
, deadline
)) {
226 dev_warn(ec_dev
->dev
, "EC failed to respond in time\n");
232 * ptr now points to the header byte. Copy any valid data to the
233 * start of our buffer
236 todo
= min(todo
, need_len
);
237 memmove(ec_dev
->din
, ptr
, todo
);
238 ptr
= ec_dev
->din
+ todo
;
239 dev_dbg(ec_dev
->dev
, "need %d, got %d bytes from preamble\n",
243 /* If the entire response struct wasn't read, get the rest of it. */
244 if (todo
< sizeof(*response
)) {
245 ret
= receive_n_bytes(ec_dev
, ptr
, sizeof(*response
) - todo
);
248 ptr
+= (sizeof(*response
) - todo
);
249 todo
= sizeof(*response
);
252 response
= (struct ec_host_response
*)ec_dev
->din
;
254 /* Abort if data_len is too large. */
255 if (response
->data_len
> ec_dev
->din_size
)
258 /* Receive data until we have it all */
259 while (need_len
> 0) {
261 * We can't support transfers larger than the SPI FIFO size
262 * unless we have DMA. We don't have DMA on the ISP SPI ports
263 * for Exynos. We need a way of asking SPI driver for
264 * maximum-supported transfer size.
266 todo
= min(need_len
, 256);
267 dev_dbg(ec_dev
->dev
, "loop, todo=%d, need_len=%d, ptr=%zd\n",
268 todo
, need_len
, ptr
- ec_dev
->din
);
270 ret
= receive_n_bytes(ec_dev
, ptr
, todo
);
278 dev_dbg(ec_dev
->dev
, "loop done, ptr=%zd\n", ptr
- ec_dev
->din
);
284 * cros_ec_spi_receive_response - Receive a response from the EC.
286 * This function has two phases: reading the preamble bytes (since if we read
287 * data from the EC before it is ready to send, we just get preamble) and
288 * reading the actual message.
290 * The received data is placed into ec_dev->din.
292 * @ec_dev: ChromeOS EC device
293 * @need_len: Number of message bytes we need to read
295 static int cros_ec_spi_receive_response(struct cros_ec_device
*ec_dev
,
300 unsigned long deadline
;
303 if (ec_dev
->din_size
< EC_MSG_PREAMBLE_COUNT
)
306 /* Receive data until we see the header byte */
307 deadline
= jiffies
+ msecs_to_jiffies(EC_MSG_DEADLINE_MS
);
309 unsigned long start_jiffies
= jiffies
;
311 ret
= receive_n_bytes(ec_dev
,
313 EC_MSG_PREAMBLE_COUNT
);
318 for (end
= ptr
+ EC_MSG_PREAMBLE_COUNT
; ptr
!= end
; ptr
++) {
319 if (*ptr
== EC_SPI_FRAME_START
) {
320 dev_dbg(ec_dev
->dev
, "msg found at %zd\n",
329 * Use the time at the start of the loop as a timeout. This
330 * gives us one last shot at getting the transfer and is useful
331 * in case we got context switched out for a while.
333 if (time_after(start_jiffies
, deadline
)) {
334 dev_warn(ec_dev
->dev
, "EC failed to respond in time\n");
340 * ptr now points to the header byte. Copy any valid data to the
341 * start of our buffer
344 todo
= min(todo
, need_len
);
345 memmove(ec_dev
->din
, ptr
, todo
);
346 ptr
= ec_dev
->din
+ todo
;
347 dev_dbg(ec_dev
->dev
, "need %d, got %d bytes from preamble\n",
351 /* Receive data until we have it all */
352 while (need_len
> 0) {
354 * We can't support transfers larger than the SPI FIFO size
355 * unless we have DMA. We don't have DMA on the ISP SPI ports
356 * for Exynos. We need a way of asking SPI driver for
357 * maximum-supported transfer size.
359 todo
= min(need_len
, 256);
360 dev_dbg(ec_dev
->dev
, "loop, todo=%d, need_len=%d, ptr=%zd\n",
361 todo
, need_len
, ptr
- ec_dev
->din
);
363 ret
= receive_n_bytes(ec_dev
, ptr
, todo
);
367 debug_packet(ec_dev
->dev
, "interim", ptr
, todo
);
372 dev_dbg(ec_dev
->dev
, "loop done, ptr=%zd\n", ptr
- ec_dev
->din
);
378 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
380 * @ec_dev: ChromeOS EC device
381 * @ec_msg: Message to transfer
383 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device
*ec_dev
,
384 struct cros_ec_command
*ec_msg
)
386 struct ec_host_response
*response
;
387 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
388 struct spi_transfer trans
, trans_delay
;
389 struct spi_message msg
;
395 int ret
= 0, final_ret
;
398 len
= cros_ec_prepare_tx(ec_dev
, ec_msg
);
401 dev_dbg(ec_dev
->dev
, "prepared, len=%d\n", len
);
403 /* If it's too soon to do another transaction, wait */
404 delay
= ktime_get_ns() - ec_spi
->last_transfer_ns
;
405 if (delay
< EC_SPI_RECOVERY_TIME_NS
)
406 ndelay(EC_SPI_RECOVERY_TIME_NS
- delay
);
408 rx_buf
= kzalloc(len
, GFP_KERNEL
);
412 spi_bus_lock(ec_spi
->spi
->controller
);
415 * Leave a gap between CS assertion and clocking of data to allow the
418 spi_message_init(&msg
);
419 if (ec_spi
->start_of_msg_delay
) {
420 memset(&trans_delay
, 0, sizeof(trans_delay
));
421 trans_delay
.delay
.value
= ec_spi
->start_of_msg_delay
;
422 trans_delay
.delay
.unit
= SPI_DELAY_UNIT_USECS
;
423 spi_message_add_tail(&trans_delay
, &msg
);
426 /* Transmit phase - send our message */
427 memset(&trans
, 0, sizeof(trans
));
428 trans
.tx_buf
= ec_dev
->dout
;
429 trans
.rx_buf
= rx_buf
;
432 spi_message_add_tail(&trans
, &msg
);
433 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
435 /* Get the response */
437 /* Verify that EC can process command */
438 for (i
= 0; i
< len
; i
++) {
441 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
442 * markers are all signs that the EC didn't fully
443 * receive our command. e.g., if the EC is flashing
444 * itself, it can't respond to any commands and instead
445 * clocks out EC_SPI_PAST_END from its SPI hardware
446 * buffer. Similar occurrences can happen if the AP is
447 * too slow to clock out data after asserting CS -- the
448 * EC will abort and fill its buffer with
449 * EC_SPI_RX_BAD_DATA.
451 * In all cases, these errors should be safe to retry.
452 * Report -EAGAIN and let the caller decide what to do
455 if (rx_byte
== EC_SPI_PAST_END
||
456 rx_byte
== EC_SPI_RX_BAD_DATA
||
457 rx_byte
== EC_SPI_NOT_READY
) {
465 ret
= cros_ec_spi_receive_packet(ec_dev
,
466 ec_msg
->insize
+ sizeof(*response
));
467 else if (ret
!= -EAGAIN
)
468 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
470 final_ret
= terminate_request(ec_dev
);
472 spi_bus_unlock(ec_spi
->spi
->controller
);
481 /* check response error code */
482 response
= (struct ec_host_response
*)ptr
;
483 ec_msg
->result
= response
->result
;
485 ret
= cros_ec_check_result(ec_dev
, ec_msg
);
489 len
= response
->data_len
;
491 if (len
> ec_msg
->insize
) {
492 dev_err(ec_dev
->dev
, "packet too long (%d bytes, expected %d)",
493 len
, ec_msg
->insize
);
498 for (i
= 0; i
< sizeof(*response
); i
++)
501 /* copy response packet payload and compute checksum */
502 memcpy(ec_msg
->data
, ptr
+ sizeof(*response
), len
);
503 for (i
= 0; i
< len
; i
++)
504 sum
+= ec_msg
->data
[i
];
508 "bad packet checksum, calculated %x\n",
517 if (ec_msg
->command
== EC_CMD_REBOOT_EC
)
518 msleep(EC_REBOOT_DELAY_MS
);
524 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
526 * @ec_dev: ChromeOS EC device
527 * @ec_msg: Message to transfer
529 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device
*ec_dev
,
530 struct cros_ec_command
*ec_msg
)
532 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
533 struct spi_transfer trans
;
534 struct spi_message msg
;
540 int ret
= 0, final_ret
;
543 len
= cros_ec_prepare_tx(ec_dev
, ec_msg
);
546 dev_dbg(ec_dev
->dev
, "prepared, len=%d\n", len
);
548 /* If it's too soon to do another transaction, wait */
549 delay
= ktime_get_ns() - ec_spi
->last_transfer_ns
;
550 if (delay
< EC_SPI_RECOVERY_TIME_NS
)
551 ndelay(EC_SPI_RECOVERY_TIME_NS
- delay
);
553 rx_buf
= kzalloc(len
, GFP_KERNEL
);
557 spi_bus_lock(ec_spi
->spi
->controller
);
559 /* Transmit phase - send our message */
560 debug_packet(ec_dev
->dev
, "out", ec_dev
->dout
, len
);
561 memset(&trans
, 0, sizeof(trans
));
562 trans
.tx_buf
= ec_dev
->dout
;
563 trans
.rx_buf
= rx_buf
;
566 spi_message_init(&msg
);
567 spi_message_add_tail(&trans
, &msg
);
568 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
570 /* Get the response */
572 /* Verify that EC can process command */
573 for (i
= 0; i
< len
; i
++) {
575 /* See comments in cros_ec_pkt_xfer_spi() */
576 if (rx_byte
== EC_SPI_PAST_END
||
577 rx_byte
== EC_SPI_RX_BAD_DATA
||
578 rx_byte
== EC_SPI_NOT_READY
) {
586 ret
= cros_ec_spi_receive_response(ec_dev
,
587 ec_msg
->insize
+ EC_MSG_TX_PROTO_BYTES
);
588 else if (ret
!= -EAGAIN
)
589 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
591 final_ret
= terminate_request(ec_dev
);
593 spi_bus_unlock(ec_spi
->spi
->controller
);
602 /* check response error code */
603 ec_msg
->result
= ptr
[0];
604 ret
= cros_ec_check_result(ec_dev
, ec_msg
);
609 sum
= ptr
[0] + ptr
[1];
610 if (len
> ec_msg
->insize
) {
611 dev_err(ec_dev
->dev
, "packet too long (%d bytes, expected %d)",
612 len
, ec_msg
->insize
);
617 /* copy response packet payload and compute checksum */
618 for (i
= 0; i
< len
; i
++) {
621 ec_msg
->data
[i
] = ptr
[i
+ 2];
625 debug_packet(ec_dev
->dev
, "in", ptr
, len
+ 3);
627 if (sum
!= ptr
[len
+ 2]) {
629 "bad packet checksum, expected %02x, got %02x\n",
638 if (ec_msg
->command
== EC_CMD_REBOOT_EC
)
639 msleep(EC_REBOOT_DELAY_MS
);
644 static void cros_ec_xfer_high_pri_work(struct kthread_work
*work
)
646 struct cros_ec_xfer_work_params
*params
;
648 params
= container_of(work
, struct cros_ec_xfer_work_params
, work
);
649 params
->ret
= params
->fn(params
->ec_dev
, params
->ec_msg
);
652 static int cros_ec_xfer_high_pri(struct cros_ec_device
*ec_dev
,
653 struct cros_ec_command
*ec_msg
,
654 cros_ec_xfer_fn_t fn
)
656 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
657 struct cros_ec_xfer_work_params params
= {
658 .work
= KTHREAD_WORK_INIT(params
.work
,
659 cros_ec_xfer_high_pri_work
),
666 * This looks a bit ridiculous. Why do the work on a
667 * different thread if we're just going to block waiting for
668 * the thread to finish? The key here is that the thread is
669 * running at high priority but the calling context might not
670 * be. We need to be at high priority to avoid getting
671 * context switched out for too long and the EC giving up on
674 kthread_queue_work(ec_spi
->high_pri_worker
, ¶ms
.work
);
675 kthread_flush_work(¶ms
.work
);
680 static int cros_ec_pkt_xfer_spi(struct cros_ec_device
*ec_dev
,
681 struct cros_ec_command
*ec_msg
)
683 return cros_ec_xfer_high_pri(ec_dev
, ec_msg
, do_cros_ec_pkt_xfer_spi
);
686 static int cros_ec_cmd_xfer_spi(struct cros_ec_device
*ec_dev
,
687 struct cros_ec_command
*ec_msg
)
689 return cros_ec_xfer_high_pri(ec_dev
, ec_msg
, do_cros_ec_cmd_xfer_spi
);
692 static void cros_ec_spi_dt_probe(struct cros_ec_spi
*ec_spi
, struct device
*dev
)
694 struct device_node
*np
= dev
->of_node
;
698 ret
= of_property_read_u32(np
, "google,cros-ec-spi-pre-delay", &val
);
700 ec_spi
->start_of_msg_delay
= val
;
702 ret
= of_property_read_u32(np
, "google,cros-ec-spi-msg-delay", &val
);
704 ec_spi
->end_of_msg_delay
= val
;
707 static void cros_ec_spi_high_pri_release(void *worker
)
709 kthread_destroy_worker(worker
);
712 static int cros_ec_spi_devm_high_pri_alloc(struct device
*dev
,
713 struct cros_ec_spi
*ec_spi
)
717 ec_spi
->high_pri_worker
=
718 kthread_run_worker(0, "cros_ec_spi_high_pri");
720 if (IS_ERR(ec_spi
->high_pri_worker
)) {
721 err
= PTR_ERR(ec_spi
->high_pri_worker
);
722 dev_err(dev
, "Can't create cros_ec high pri worker: %d\n", err
);
726 err
= devm_add_action_or_reset(dev
, cros_ec_spi_high_pri_release
,
727 ec_spi
->high_pri_worker
);
731 sched_set_fifo(ec_spi
->high_pri_worker
->task
);
736 static int cros_ec_spi_probe(struct spi_device
*spi
)
738 struct device
*dev
= &spi
->dev
;
739 struct cros_ec_device
*ec_dev
;
740 struct cros_ec_spi
*ec_spi
;
744 err
= spi_setup(spi
);
748 ec_spi
= devm_kzalloc(dev
, sizeof(*ec_spi
), GFP_KERNEL
);
752 ec_dev
= devm_kzalloc(dev
, sizeof(*ec_dev
), GFP_KERNEL
);
756 /* Check for any DT properties */
757 cros_ec_spi_dt_probe(ec_spi
, dev
);
759 spi_set_drvdata(spi
, ec_dev
);
761 ec_dev
->priv
= ec_spi
;
762 ec_dev
->irq
= spi
->irq
;
763 ec_dev
->cmd_xfer
= cros_ec_cmd_xfer_spi
;
764 ec_dev
->pkt_xfer
= cros_ec_pkt_xfer_spi
;
765 ec_dev
->phys_name
= dev_name(&ec_spi
->spi
->dev
);
766 ec_dev
->din_size
= EC_MSG_PREAMBLE_COUNT
+
767 sizeof(struct ec_host_response
) +
768 sizeof(struct ec_response_get_protocol_info
);
769 ec_dev
->dout_size
= sizeof(struct ec_host_request
) + sizeof(struct ec_params_rwsig_action
);
771 ec_spi
->last_transfer_ns
= ktime_get_ns();
773 err
= cros_ec_spi_devm_high_pri_alloc(dev
, ec_spi
);
777 err
= cros_ec_register(ec_dev
);
779 dev_err(dev
, "cannot register EC\n");
783 device_init_wakeup(&spi
->dev
, true);
788 static void cros_ec_spi_remove(struct spi_device
*spi
)
790 struct cros_ec_device
*ec_dev
= spi_get_drvdata(spi
);
792 cros_ec_unregister(ec_dev
);
795 #ifdef CONFIG_PM_SLEEP
796 static int cros_ec_spi_suspend(struct device
*dev
)
798 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
800 return cros_ec_suspend(ec_dev
);
803 static int cros_ec_spi_resume(struct device
*dev
)
805 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
807 return cros_ec_resume(ec_dev
);
811 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops
, cros_ec_spi_suspend
,
814 static const struct of_device_id cros_ec_spi_of_match
[] = {
815 { .compatible
= "google,cros-ec-spi", },
818 MODULE_DEVICE_TABLE(of
, cros_ec_spi_of_match
);
820 static const struct spi_device_id cros_ec_spi_id
[] = {
821 { "cros-ec-spi", 0 },
824 MODULE_DEVICE_TABLE(spi
, cros_ec_spi_id
);
826 static struct spi_driver cros_ec_driver_spi
= {
828 .name
= "cros-ec-spi",
829 .of_match_table
= cros_ec_spi_of_match
,
830 .pm
= &cros_ec_spi_pm_ops
,
831 .probe_type
= PROBE_PREFER_ASYNCHRONOUS
,
833 .probe
= cros_ec_spi_probe
,
834 .remove
= cros_ec_spi_remove
,
835 .id_table
= cros_ec_spi_id
,
838 module_spi_driver(cros_ec_driver_spi
);
840 MODULE_LICENSE("GPL v2");
841 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");