drivers/watchdog/sp805_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * drivers/char/watchdog/sp805-wdt.c
   4  *
   5  * Watchdog driver for ARM SP805 watchdog module
   6  *
   7  * Copyright (C) 2010 ST Microelectronics
   8  * Viresh Kumar <vireshk@kernel.org>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2 or later. This program is licensed "as is" without any
  12  * warranty of any kind, whether express or implied.
  13  */
  14
  15 #include <linux/device.h>
  16 #include <linux/resource.h>
  17 #include <linux/amba/bus.h>
  18 #include <linux/bitops.h>
  19 #include <linux/clk.h>
  20 #include <linux/io.h>
  21 #include <linux/ioport.h>
  22 #include <linux/kernel.h>
  23 #include <linux/math64.h>
  24 #include <linux/module.h>
  25 #include <linux/moduleparam.h>
  26 #include <linux/pm.h>
  27 #include <linux/property.h>
  28 #include <linux/reset.h>
  29 #include <linux/slab.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/types.h>
  32 #include <linux/watchdog.h>
  33
  34 /* default timeout in seconds */
  35 #define DEFAULT_TIMEOUT         60
  36
  37 #define MODULE_NAME             "sp805-wdt"
  38
  39 /* watchdog register offsets and masks */
  40 #define WDTLOAD                 0x000
  41         #define LOAD_MIN        0x00000001
  42         #define LOAD_MAX        0xFFFFFFFF
  43 #define WDTVALUE                0x004
  44 #define WDTCONTROL              0x008
  45         /* control register masks */
  46         #define INT_ENABLE      (1 << 0)
  47         #define RESET_ENABLE    (1 << 1)
  48         #define ENABLE_MASK     (INT_ENABLE | RESET_ENABLE)
  49 #define WDTINTCLR               0x00C
  50 #define WDTRIS                  0x010
  51 #define WDTMIS                  0x014
  52         #define INT_MASK        (1 << 0)
  53 #define WDTLOCK                 0xC00
  54         #define UNLOCK          0x1ACCE551
  55         #define LOCK            0x00000001
  56
  57 /**
  58  * struct sp805_wdt: sp805 wdt device structure
  59  * @wdd: instance of struct watchdog_device
  60  * @lock: spin lock protecting dev structure and io access
  61  * @base: base address of wdt
  62  * @clk: (optional) clock structure of wdt
  63  * @rate: (optional) clock rate when provided via properties
  64  * @adev: amba device structure of wdt
  65  * @load_val: load value to be set for current timeout
  66  */
  67 struct sp805_wdt {
  68         struct watchdog_device          wdd;
  69         spinlock_t                      lock;
  70         void __iomem                    *base;
  71         struct clk                      *clk;
  72         u64                             rate;
  73         struct amba_device              *adev;
  74         unsigned int                    load_val;
  75 };
  76
  77 static bool nowayout = WATCHDOG_NOWAYOUT;
  78 module_param(nowayout, bool, 0);
  79 MODULE_PARM_DESC(nowayout,
  80                 "Set to 1 to keep watchdog running after device release");
  81
  82 /* returns true if wdt is running; otherwise returns false */
  83 static bool wdt_is_running(struct watchdog_device *wdd)
  84 {
  85         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  86         u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
  87
  88         return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
  89 }
  90
  91 /* This routine finds load value that will reset system in required timeout */
  92 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
  93 {
  94         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  95         u64 load, rate;
  96
  97         rate = wdt->rate;
  98
  99         /*
 100          * sp805 runs counter with given value twice, after the end of first
 101          * counter it gives an interrupt and then starts counter again. If
 102          * interrupt already occurred then it resets the system. This is why
 103          * load is half of what should be required.
 104          */
 105         load = div_u64(rate, 2) * timeout - 1;
 106
 107         load = (load > LOAD_MAX) ? LOAD_MAX : load;
 108         load = (load < LOAD_MIN) ? LOAD_MIN : load;
 109
 110         spin_lock(&wdt->lock);
 111         wdt->load_val = load;
 112         /* roundup timeout to closest positive integer value */
 113         wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
 114         spin_unlock(&wdt->lock);
 115
 116         return 0;
 117 }
 118
 119 /* returns number of seconds left for reset to occur */
 120 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
 121 {
 122         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
 123         u64 load;
 124
 125         spin_lock(&wdt->lock);
 126         load = readl_relaxed(wdt->base + WDTVALUE);
 127
 128         /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
 129         if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
 130                 load += (u64)wdt->load_val + 1;
 131         spin_unlock(&wdt->lock);
 132
 133         return div_u64(load, wdt->rate);
 134 }
 135
 136 static int
 137 wdt_restart(struct watchdog_device *wdd, unsigned long mode, void *cmd)
 138 {
 139         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
 140
 141         writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 142         writel_relaxed(0, wdt->base + WDTCONTROL);
 143         writel_relaxed(0, wdt->base + WDTLOAD);
 144         writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
 145
 146         /* Flush posted writes. */
 147         readl_relaxed(wdt->base + WDTLOCK);
 148
 149         return 0;
 150 }
 151
 152 static int wdt_config(struct watchdog_device *wdd, bool ping)
 153 {
 154         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
 155         int ret;
 156
 157         if (!ping) {
 158
 159                 ret = clk_prepare_enable(wdt->clk);
 160                 if (ret) {
 161                         dev_err(&wdt->adev->dev, "clock enable fail");
 162                         return ret;
 163                 }
 164         }
 165
 166         spin_lock(&wdt->lock);
 167
 168         writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 169         writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
 170         writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
 171
 172         if (!ping)
 173                 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
 174                                 WDTCONTROL);
 175
 176         writel_relaxed(LOCK, wdt->base + WDTLOCK);
 177
 178         /* Flush posted writes. */
 179         readl_relaxed(wdt->base + WDTLOCK);
 180         spin_unlock(&wdt->lock);
 181
 182         return 0;
 183 }
 184
 185 static int wdt_ping(struct watchdog_device *wdd)
 186 {
 187         return wdt_config(wdd, true);
 188 }
 189
 190 /* enables watchdog timers reset */
 191 static int wdt_enable(struct watchdog_device *wdd)
 192 {
 193         return wdt_config(wdd, false);
 194 }
 195
 196 /* disables watchdog timers reset */
 197 static int wdt_disable(struct watchdog_device *wdd)
 198 {
 199         struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
 200
 201         spin_lock(&wdt->lock);
 202
 203         writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 204         writel_relaxed(0, wdt->base + WDTCONTROL);
 205         writel_relaxed(LOCK, wdt->base + WDTLOCK);
 206
 207         /* Flush posted writes. */
 208         readl_relaxed(wdt->base + WDTLOCK);
 209         spin_unlock(&wdt->lock);
 210
 211         clk_disable_unprepare(wdt->clk);
 212
 213         return 0;
 214 }
 215
 216 static const struct watchdog_info wdt_info = {
 217         .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 218         .identity = MODULE_NAME,
 219 };
 220
 221 static const struct watchdog_ops wdt_ops = {
 222         .owner          = THIS_MODULE,
 223         .start          = wdt_enable,
 224         .stop           = wdt_disable,
 225         .ping           = wdt_ping,
 226         .set_timeout    = wdt_setload,
 227         .get_timeleft   = wdt_timeleft,
 228         .restart        = wdt_restart,
 229 };
 230
 231 static int
 232 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
 233 {
 234         struct sp805_wdt *wdt;
 235         struct reset_control *rst;
 236         u64 rate = 0;
 237         int ret = 0;
 238
 239         wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
 240         if (!wdt) {
 241                 ret = -ENOMEM;
 242                 goto err;
 243         }
 244
 245         wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
 246         if (IS_ERR(wdt->base))
 247                 return PTR_ERR(wdt->base);
 248
 249         /*
 250          * When driver probe with ACPI device, clock devices
 251          * are not available, so watchdog rate get from
 252          * clock-frequency property given in _DSD object.
 253          */
 254         device_property_read_u64(&adev->dev, "clock-frequency", &rate);
 255
 256         wdt->clk = devm_clk_get_optional(&adev->dev, NULL);
 257         if (IS_ERR(wdt->clk))
 258                 return dev_err_probe(&adev->dev, PTR_ERR(wdt->clk), "Clock not found\n");
 259
 260         wdt->rate = clk_get_rate(wdt->clk);
 261         if (!wdt->rate)
 262                 wdt->rate = rate;
 263         if (!wdt->rate) {
 264                 dev_err(&adev->dev, "no clock-frequency property\n");
 265                 return -ENODEV;
 266         }
 267
 268         rst = devm_reset_control_get_optional_exclusive(&adev->dev, NULL);
 269         if (IS_ERR(rst))
 270                 return dev_err_probe(&adev->dev, PTR_ERR(rst), "Can not get reset\n");
 271
 272         reset_control_deassert(rst);
 273
 274         wdt->adev = adev;
 275         wdt->wdd.info = &wdt_info;
 276         wdt->wdd.ops = &wdt_ops;
 277         wdt->wdd.parent = &adev->dev;
 278
 279         spin_lock_init(&wdt->lock);
 280         watchdog_set_nowayout(&wdt->wdd, nowayout);
 281         watchdog_set_drvdata(&wdt->wdd, wdt);
 282         watchdog_set_restart_priority(&wdt->wdd, 128);
 283         watchdog_stop_on_unregister(&wdt->wdd);
 284
 285         /*
 286          * If 'timeout-sec' devicetree property is specified, use that.
 287          * Otherwise, use DEFAULT_TIMEOUT
 288          */
 289         wdt->wdd.timeout = DEFAULT_TIMEOUT;
 290         watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
 291         wdt_setload(&wdt->wdd, wdt->wdd.timeout);
 292
 293         /*
 294          * If HW is already running, enable/reset the wdt and set the running
 295          * bit to tell the wdt subsystem
 296          */
 297         if (wdt_is_running(&wdt->wdd)) {
 298                 wdt_enable(&wdt->wdd);
 299                 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
 300         }
 301
 302         watchdog_stop_on_reboot(&wdt->wdd);
 303         ret = watchdog_register_device(&wdt->wdd);
 304         if (ret)
 305                 goto err;
 306         amba_set_drvdata(adev, wdt);
 307
 308         dev_info(&adev->dev, "registration successful\n");
 309         return 0;
 310
 311 err:
 312         dev_err(&adev->dev, "Probe Failed!!!\n");
 313         return ret;
 314 }
 315
 316 static void sp805_wdt_remove(struct amba_device *adev)
 317 {
 318         struct sp805_wdt *wdt = amba_get_drvdata(adev);
 319
 320         watchdog_unregister_device(&wdt->wdd);
 321         watchdog_set_drvdata(&wdt->wdd, NULL);
 322 }
 323
 324 static int __maybe_unused sp805_wdt_suspend(struct device *dev)
 325 {
 326         struct sp805_wdt *wdt = dev_get_drvdata(dev);
 327
 328         if (watchdog_active(&wdt->wdd))
 329                 return wdt_disable(&wdt->wdd);
 330
 331         return 0;
 332 }
 333
 334 static int __maybe_unused sp805_wdt_resume(struct device *dev)
 335 {
 336         struct sp805_wdt *wdt = dev_get_drvdata(dev);
 337
 338         if (watchdog_active(&wdt->wdd))
 339                 return wdt_enable(&wdt->wdd);
 340
 341         return 0;
 342 }
 343
 344 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
 345                 sp805_wdt_resume);
 346
 347 static const struct amba_id sp805_wdt_ids[] = {
 348         {
 349                 .id     = 0x00141805,
 350                 .mask   = 0x00ffffff,
 351         },
 352         {
 353                 .id     = 0x001bb824,
 354                 .mask   = 0x00ffffff,
 355         },
 356         { 0, 0 },
 357 };
 358
 359 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
 360
 361 static struct amba_driver sp805_wdt_driver = {
 362         .drv = {
 363                 .name   = MODULE_NAME,
 364                 .pm     = &sp805_wdt_dev_pm_ops,
 365         },
 366         .id_table       = sp805_wdt_ids,
 367         .probe          = sp805_wdt_probe,
 368         .remove = sp805_wdt_remove,
 369 };
 370
 371 module_amba_driver(sp805_wdt_driver);
 372
 373 MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
 374 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
 375 MODULE_LICENSE("GPL");