arch/loongarch/lib/dump_tlb.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
   4  *
   5  * Derived from MIPS:
   6  * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
   7  * Copyright (C) 1999 by Silicon Graphics, Inc.
   8  */
   9 #include <linux/kernel.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/loongarch.h>
  13 #include <asm/page.h>
  14 #include <asm/pgtable.h>
  15 #include <asm/tlb.h>
  16
  17 void dump_tlb_regs(void)
  18 {
  19         const int field = 2 * sizeof(unsigned long);
  20
  21         pr_info("Index    : 0x%0x\n", read_csr_tlbidx());
  22         pr_info("PageSize : 0x%0x\n", read_csr_pagesize());
  23         pr_info("EntryHi  : 0x%0*lx\n", field, read_csr_entryhi());
  24         pr_info("EntryLo0 : 0x%0*lx\n", field, read_csr_entrylo0());
  25         pr_info("EntryLo1 : 0x%0*lx\n", field, read_csr_entrylo1());
  26 }
  27
  28 static void dump_tlb(int first, int last)
  29 {
  30         unsigned long s_entryhi, entryhi, asid;
  31         unsigned long long entrylo0, entrylo1, pa;
  32         unsigned int index;
  33         unsigned int s_index, s_asid;
  34         unsigned int pagesize, c0, c1, i;
  35         unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
  36         int pwidth = 16;
  37         int vwidth = 16;
  38         int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
  39
  40         s_entryhi = read_csr_entryhi();
  41         s_index = read_csr_tlbidx();
  42         s_asid = read_csr_asid();
  43
  44         for (i = first; i <= last; i++) {
  45                 write_csr_index(i);
  46                 tlb_read();
  47                 pagesize = read_csr_pagesize();
  48                 entryhi  = read_csr_entryhi();
  49                 entrylo0 = read_csr_entrylo0();
  50                 entrylo1 = read_csr_entrylo1();
  51                 index = read_csr_tlbidx();
  52                 asid = read_csr_asid();
  53
  54                 /* EHINV bit marks entire entry as invalid */
  55                 if (index & CSR_TLBIDX_EHINV)
  56                         continue;
  57                 /*
  58                  * ASID takes effect in absence of G (global) bit.
  59                  */
  60                 if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
  61                     asid != s_asid)
  62                         continue;
  63
  64                 /*
  65                  * Only print entries in use
  66                  */
  67                 pr_info("Index: %4d pgsize=0x%x ", i, (1 << pagesize));
  68
  69                 c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
  70                 c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
  71
  72                 pr_cont("va=0x%0*lx asid=0x%0*lx",
  73                         vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
  74
  75                 /* NR/NX are in awkward places, so mask them off separately */
  76                 pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
  77                 pa = pa & PAGE_MASK;
  78                 pr_cont("\n\t[");
  79                 pr_cont("nr=%d nx=%d ",
  80                         (entrylo0 & ENTRYLO_NR) ? 1 : 0,
  81                         (entrylo0 & ENTRYLO_NX) ? 1 : 0);
  82                 pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
  83                         pwidth, pa, c0,
  84                         (entrylo0 & ENTRYLO_D) ? 1 : 0,
  85                         (entrylo0 & ENTRYLO_V) ? 1 : 0,
  86                         (entrylo0 & ENTRYLO_G) ? 1 : 0,
  87                         (entrylo0 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
  88                 /* NR/NX are in awkward places, so mask them off separately */
  89                 pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
  90                 pa = pa & PAGE_MASK;
  91                 pr_cont("nr=%d nx=%d ",
  92                         (entrylo1 & ENTRYLO_NR) ? 1 : 0,
  93                         (entrylo1 & ENTRYLO_NX) ? 1 : 0);
  94                 pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
  95                         pwidth, pa, c1,
  96                         (entrylo1 & ENTRYLO_D) ? 1 : 0,
  97                         (entrylo1 & ENTRYLO_V) ? 1 : 0,
  98                         (entrylo1 & ENTRYLO_G) ? 1 : 0,
  99                         (entrylo1 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
 100         }
 101         pr_info("\n");
 102
 103         write_csr_entryhi(s_entryhi);
 104         write_csr_tlbidx(s_index);
 105         write_csr_asid(s_asid);
 106 }
 107
 108 void dump_tlb_all(void)
 109 {
 110         dump_tlb(0, current_cpu_data.tlbsize - 1);
 111 }