arch/openrisc/kernel/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * OpenRISC setup.c
   4  *
   5  * Linux architectural port borrowing liberally from similar works of
   6  * others.  All original copyrights apply as per the original source
   7  * declaration.
   8  *
   9  * Modifications for the OpenRISC architecture:
  10  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
  11  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
  12  *
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/tty.h>
  25 #include <linux/ioport.h>
  26 #include <linux/delay.h>
  27 #include <linux/console.h>
  28 #include <linux/init.h>
  29 #include <linux/memblock.h>
  30 #include <linux/seq_file.h>
  31 #include <linux/serial.h>
  32 #include <linux/initrd.h>
  33 #include <linux/of_fdt.h>
  34 #include <linux/of.h>
  35 #include <linux/device.h>
  36
  37 #include <asm/sections.h>
  38 #include <asm/types.h>
  39 #include <asm/setup.h>
  40 #include <asm/io.h>
  41 #include <asm/cpuinfo.h>
  42 #include <asm/delay.h>
  43
  44 #include "vmlinux.h"
  45
  46 static void __init setup_memory(void)
  47 {
  48         unsigned long ram_start_pfn;
  49         unsigned long ram_end_pfn;
  50         phys_addr_t memory_start, memory_end;
  51
  52         memory_end = memory_start = 0;
  53
  54         /* Find main memory where is the kernel, we assume its the only one */
  55         memory_start = memblock_start_of_DRAM();
  56         memory_end = memblock_end_of_DRAM();
  57
  58         if (!memory_end) {
  59                 panic("No memory!");
  60         }
  61
  62         ram_start_pfn = PFN_UP(memory_start);
  63         ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
  64
  65         /* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
  66         min_low_pfn = ram_start_pfn;
  67         max_low_pfn = ram_end_pfn;
  68         max_pfn = ram_end_pfn;
  69
  70         /*
  71          * initialize the boot-time allocator (with low memory only).
  72          *
  73          * This makes the memory from the end of the kernel to the end of
  74          * RAM usable.
  75          */
  76         memblock_reserve(__pa(_stext), _end - _stext);
  77
  78 #ifdef CONFIG_BLK_DEV_INITRD
  79         /* Then reserve the initrd, if any */
  80         if (initrd_start && (initrd_end > initrd_start)) {
  81                 unsigned long aligned_start = ALIGN_DOWN(initrd_start, PAGE_SIZE);
  82                 unsigned long aligned_end = ALIGN(initrd_end, PAGE_SIZE);
  83
  84                 memblock_reserve(__pa(aligned_start), aligned_end - aligned_start);
  85         }
  86 #endif /* CONFIG_BLK_DEV_INITRD */
  87
  88         early_init_fdt_reserve_self();
  89         early_init_fdt_scan_reserved_mem();
  90
  91         memblock_dump_all();
  92 }
  93
  94 struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];
  95
  96 static void print_cpuinfo(void)
  97 {
  98         unsigned long upr = mfspr(SPR_UPR);
  99         unsigned long vr = mfspr(SPR_VR);
 100         unsigned int version;
 101         unsigned int revision;
 102         struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
 103
 104         version = (vr & SPR_VR_VER) >> 24;
 105         revision = (vr & SPR_VR_REV);
 106
 107         printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
 108                version, revision, cpuinfo->clock_frequency / 1000000);
 109
 110         if (!(upr & SPR_UPR_UP)) {
 111                 printk(KERN_INFO
 112                        "-- no UPR register... unable to detect configuration\n");
 113                 return;
 114         }
 115
 116         if (upr & SPR_UPR_DCP)
 117                 printk(KERN_INFO
 118                        "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 119                        cpuinfo->dcache_size, cpuinfo->dcache_block_size,
 120                        cpuinfo->dcache_ways);
 121         else
 122                 printk(KERN_INFO "-- dcache disabled\n");
 123         if (upr & SPR_UPR_ICP)
 124                 printk(KERN_INFO
 125                        "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
 126                        cpuinfo->icache_size, cpuinfo->icache_block_size,
 127                        cpuinfo->icache_ways);
 128         else
 129                 printk(KERN_INFO "-- icache disabled\n");
 130
 131         if (upr & SPR_UPR_DMP)
 132                 printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
 133                        1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 134                        1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
 135         if (upr & SPR_UPR_IMP)
 136                 printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
 137                        1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 138                        1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
 139
 140         printk(KERN_INFO "-- additional features:\n");
 141         if (upr & SPR_UPR_DUP)
 142                 printk(KERN_INFO "-- debug unit\n");
 143         if (upr & SPR_UPR_PCUP)
 144                 printk(KERN_INFO "-- performance counters\n");
 145         if (upr & SPR_UPR_PMP)
 146                 printk(KERN_INFO "-- power management\n");
 147         if (upr & SPR_UPR_PICP)
 148                 printk(KERN_INFO "-- PIC\n");
 149         if (upr & SPR_UPR_TTP)
 150                 printk(KERN_INFO "-- timer\n");
 151         if (upr & SPR_UPR_CUP)
 152                 printk(KERN_INFO "-- custom unit(s)\n");
 153 }
 154
 155 void __init setup_cpuinfo(void)
 156 {
 157         struct device_node *cpu;
 158         unsigned long iccfgr, dccfgr;
 159         unsigned long cache_set_size;
 160         int cpu_id = smp_processor_id();
 161         struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id];
 162
 163         cpu = of_get_cpu_node(cpu_id, NULL);
 164         if (!cpu)
 165                 panic("Couldn't find CPU%d in device tree...\n", cpu_id);
 166
 167         iccfgr = mfspr(SPR_ICCFGR);
 168         cpuinfo->icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
 169         cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
 170         cpuinfo->icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
 171         cpuinfo->icache_size =
 172             cache_set_size * cpuinfo->icache_ways * cpuinfo->icache_block_size;
 173
 174         dccfgr = mfspr(SPR_DCCFGR);
 175         cpuinfo->dcache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
 176         cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
 177         cpuinfo->dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
 178         cpuinfo->dcache_size =
 179             cache_set_size * cpuinfo->dcache_ways * cpuinfo->dcache_block_size;
 180
 181         if (of_property_read_u32(cpu, "clock-frequency",
 182                                  &cpuinfo->clock_frequency)) {
 183                 printk(KERN_WARNING
 184                        "Device tree missing CPU 'clock-frequency' parameter."
 185                        "Assuming frequency 25MHZ"
 186                        "This is probably not what you want.");
 187         }
 188
 189         cpuinfo->coreid = mfspr(SPR_COREID);
 190
 191         of_node_put(cpu);
 192
 193         print_cpuinfo();
 194 }
 195
 196 /**
 197  * or1k_early_setup
 198  * @fdt: pointer to the start of the device tree in memory or NULL
 199  *
 200  * Handles the pointer to the device tree that this kernel is to use
 201  * for establishing the available platform devices.
 202  *
 203  * Falls back on built-in device tree in case null pointer is passed.
 204  */
 205
 206 void __init or1k_early_setup(void *fdt)
 207 {
 208         if (fdt)
 209                 pr_info("FDT at %p\n", fdt);
 210         else {
 211                 fdt = __dtb_start;
 212                 pr_info("Compiled-in FDT at %p\n", fdt);
 213         }
 214         early_init_devtree(fdt);
 215 }
 216
 217 static inline unsigned long extract_value_bits(unsigned long reg,
 218                                                short bit_nr, short width)
 219 {
 220         return (reg >> bit_nr) & (0 << width);
 221 }
 222
 223 static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
 224 {
 225         while (!(mask & 0x1)) {
 226                 reg = reg >> 1;
 227                 mask = mask >> 1;
 228         }
 229         return mask & reg;
 230 }
 231
 232 /*
 233  * calibrate_delay
 234  *
 235  * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
 236  * from the clock frequency passed in via the device tree
 237  *
 238  */
 239
 240 void calibrate_delay(void)
 241 {
 242         const int *val;
 243         struct device_node *cpu = of_get_cpu_node(smp_processor_id(), NULL);
 244
 245         val = of_get_property(cpu, "clock-frequency", NULL);
 246         if (!val)
 247                 panic("no cpu 'clock-frequency' parameter in device tree");
 248         loops_per_jiffy = *val / HZ;
 249         pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
 250                 loops_per_jiffy / (500000 / HZ),
 251                 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
 252
 253         of_node_put(cpu);
 254 }
 255
 256 void __init setup_arch(char **cmdline_p)
 257 {
 258         /* setup memblock allocator */
 259         setup_memory();
 260
 261         unflatten_and_copy_device_tree();
 262
 263         setup_cpuinfo();
 264
 265 #ifdef CONFIG_SMP
 266         smp_init_cpus();
 267 #endif
 268
 269         /* process 1's initial memory region is the kernel code/data */
 270         setup_initial_init_mm(_stext, _etext, _edata, _end);
 271
 272 #ifdef CONFIG_BLK_DEV_INITRD
 273         if (initrd_start == initrd_end) {
 274                 printk(KERN_INFO "Initial ramdisk not found\n");
 275                 initrd_start = 0;
 276                 initrd_end = 0;
 277         } else {
 278                 printk(KERN_INFO "Initial ramdisk at: 0x%p (%lu bytes)\n",
 279                        (void *)(initrd_start), initrd_end - initrd_start);
 280                 initrd_below_start_ok = 1;
 281         }
 282 #endif
 283
 284         /* paging_init() sets up the MMU and marks all pages as reserved */
 285         paging_init();
 286
 287         *cmdline_p = boot_command_line;
 288
 289         printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
 290 }
 291
 292 static int show_cpuinfo(struct seq_file *m, void *v)
 293 {
 294         unsigned int vr, cpucfgr;
 295         unsigned int avr;
 296         unsigned int version;
 297         struct cpuinfo_or1k *cpuinfo = v;
 298
 299         vr = mfspr(SPR_VR);
 300         cpucfgr = mfspr(SPR_CPUCFGR);
 301
 302 #ifdef CONFIG_SMP
 303         seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid);
 304 #endif
 305         if (vr & SPR_VR_UVRP) {
 306                 vr = mfspr(SPR_VR2);
 307                 version = vr & SPR_VR2_VER;
 308                 avr = mfspr(SPR_AVR);
 309                 seq_printf(m, "cpu architecture\t: "
 310                            "OpenRISC 1000 (%d.%d-rev%d)\n",
 311                            (avr >> 24) & 0xff,
 312                            (avr >> 16) & 0xff,
 313                            (avr >> 8) & 0xff);
 314                 seq_printf(m, "cpu implementation id\t: 0x%x\n",
 315                            (vr & SPR_VR2_CPUID) >> 24);
 316                 seq_printf(m, "cpu version\t\t: 0x%x\n", version);
 317         } else {
 318                 version = (vr & SPR_VR_VER) >> 24;
 319                 seq_printf(m, "cpu\t\t\t: OpenRISC-%x\n", version);
 320                 seq_printf(m, "revision\t\t: %d\n", vr & SPR_VR_REV);
 321         }
 322         seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ);
 323         seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo->dcache_size);
 324         seq_printf(m, "dcache block size\t: %d bytes\n",
 325                    cpuinfo->dcache_block_size);
 326         seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo->dcache_ways);
 327         seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo->icache_size);
 328         seq_printf(m, "icache block size\t: %d bytes\n",
 329                    cpuinfo->icache_block_size);
 330         seq_printf(m, "icache ways\t\t: %d\n", cpuinfo->icache_ways);
 331         seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n",
 332                    1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
 333                    1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
 334         seq_printf(m, "dmmu\t\t\t: %d entries, %lu ways\n",
 335                    1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
 336                    1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
 337         seq_printf(m, "bogomips\t\t: %lu.%02lu\n",
 338                    (loops_per_jiffy * HZ) / 500000,
 339                    ((loops_per_jiffy * HZ) / 5000) % 100);
 340
 341         seq_puts(m, "features\t\t: ");
 342         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB32S ? "orbis32" : "");
 343         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB64S ? "orbis64" : "");
 344         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF32S ? "orfpx32" : "");
 345         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF64S ? "orfpx64" : "");
 346         seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OV64S ? "orvdx64" : "");
 347         seq_puts(m, "\n");
 348
 349         seq_puts(m, "\n");
 350
 351         return 0;
 352 }
 353
 354 static void *c_start(struct seq_file *m, loff_t *pos)
 355 {
 356         *pos = cpumask_next(*pos - 1, cpu_online_mask);
 357         if ((*pos) < nr_cpu_ids)
 358                 return &cpuinfo_or1k[*pos];
 359         return NULL;
 360 }
 361
 362 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 363 {
 364         (*pos)++;
 365         return c_start(m, pos);
 366 }
 367
 368 static void c_stop(struct seq_file *m, void *v)
 369 {
 370 }
 371
 372 const struct seq_operations cpuinfo_op = {
 373         .start = c_start,
 374         .next = c_next,
 375         .stop = c_stop,
 376         .show = show_cpuinfo,
 377 };