arch/sh/include/cpu-sh4/cpu/addrspace.h

   1 /* SPDX-License-Identifier: GPL-2.0
   2  *
   3  * Copyright (C) 1999 by Kaz Kojima
   4  *
   5  * Defitions for the address spaces of the SH-4 CPUs.
   6  */
   7 #ifndef __ASM_CPU_SH4_ADDRSPACE_H
   8 #define __ASM_CPU_SH4_ADDRSPACE_H
   9
  10 #define P0SEG           0x00000000
  11 #define P1SEG           0x80000000
  12 #define P2SEG           0xa0000000
  13 #define P3SEG           0xc0000000
  14 #define P4SEG           0xe0000000
  15
  16 /* Detailed P4SEG  */
  17 #define P4SEG_STORE_QUE (P4SEG)
  18 #define P4SEG_IC_ADDR   0xf0000000
  19 #define P4SEG_IC_DATA   0xf1000000
  20 #define P4SEG_ITLB_ADDR 0xf2000000
  21 #define P4SEG_ITLB_DATA 0xf3000000
  22 #define P4SEG_OC_ADDR   0xf4000000
  23 #define P4SEG_OC_DATA   0xf5000000
  24 #define P4SEG_TLB_ADDR  0xf6000000
  25 #define P4SEG_TLB_DATA  0xf7000000
  26 #define P4SEG_REG_BASE  0xff000000
  27
  28 #define PA_AREA0        0x00000000
  29 #define PA_AREA1        0x04000000
  30 #define PA_AREA2        0x08000000
  31 #define PA_AREA3        0x0c000000
  32 #define PA_AREA4        0x10000000
  33 #define PA_AREA5        0x14000000
  34 #define PA_AREA6        0x18000000
  35 #define PA_AREA7        0x1c000000
  36
  37 #define PA_AREA5_IO     0xb4000000      /* Area 5 IO Memory */
  38 #define PA_AREA6_IO     0xb8000000      /* Area 6 IO Memory */
  39
  40 #endif /* __ASM_CPU_SH4_ADDRSPACE_H */
  41