drivers/crypto/qce/common.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #ifndef _COMMON_H_
   7 #define _COMMON_H_
   8
   9 #include <linux/crypto.h>
  10 #include <linux/types.h>
  11 #include <crypto/aes.h>
  12 #include <crypto/hash.h>
  13 #include <crypto/internal/skcipher.h>
  14 #include <crypto/internal/aead.h>
  15
  16 /* xts du size */
  17 #define QCE_SECTOR_SIZE                 512
  18
  19 /* key size in bytes */
  20 #define QCE_SHA_HMAC_KEY_SIZE           64
  21 #define QCE_MAX_CIPHER_KEY_SIZE         AES_KEYSIZE_256
  22
  23 /* IV length in bytes */
  24 #define QCE_AES_IV_LENGTH               AES_BLOCK_SIZE
  25 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  26 #define QCE_MAX_IV_SIZE                 AES_BLOCK_SIZE
  27
  28 /* maximum nonce bytes  */
  29 #define QCE_MAX_NONCE                   16
  30 #define QCE_MAX_NONCE_WORDS             (QCE_MAX_NONCE / sizeof(u32))
  31
  32 /* burst size alignment requirement */
  33 #define QCE_MAX_ALIGN_SIZE              64
  34
  35 /* cipher algorithms */
  36 #define QCE_ALG_DES                     BIT(0)
  37 #define QCE_ALG_3DES                    BIT(1)
  38 #define QCE_ALG_AES                     BIT(2)
  39
  40 /* hash and hmac algorithms */
  41 #define QCE_HASH_SHA1                   BIT(3)
  42 #define QCE_HASH_SHA256                 BIT(4)
  43 #define QCE_HASH_SHA1_HMAC              BIT(5)
  44 #define QCE_HASH_SHA256_HMAC            BIT(6)
  45 #define QCE_HASH_AES_CMAC               BIT(7)
  46
  47 /* cipher modes */
  48 #define QCE_MODE_CBC                    BIT(8)
  49 #define QCE_MODE_ECB                    BIT(9)
  50 #define QCE_MODE_CTR                    BIT(10)
  51 #define QCE_MODE_XTS                    BIT(11)
  52 #define QCE_MODE_CCM                    BIT(12)
  53 #define QCE_MODE_MASK                   GENMASK(12, 8)
  54
  55 #define QCE_MODE_CCM_RFC4309            BIT(13)
  56
  57 /* cipher encryption/decryption operations */
  58 #define QCE_ENCRYPT                     BIT(30)
  59 #define QCE_DECRYPT                     BIT(31)
  60
  61 #define IS_DES(flags)                   (flags & QCE_ALG_DES)
  62 #define IS_3DES(flags)                  (flags & QCE_ALG_3DES)
  63 #define IS_AES(flags)                   (flags & QCE_ALG_AES)
  64
  65 #define IS_SHA1(flags)                  (flags & QCE_HASH_SHA1)
  66 #define IS_SHA256(flags)                (flags & QCE_HASH_SHA256)
  67 #define IS_SHA1_HMAC(flags)             (flags & QCE_HASH_SHA1_HMAC)
  68 #define IS_SHA256_HMAC(flags)           (flags & QCE_HASH_SHA256_HMAC)
  69 #define IS_CMAC(flags)                  (flags & QCE_HASH_AES_CMAC)
  70 #define IS_SHA(flags)                   (IS_SHA1(flags) || IS_SHA256(flags))
  71 #define IS_SHA_HMAC(flags)              \
  72                 (IS_SHA1_HMAC(flags) || IS_SHA256_HMAC(flags))
  73
  74 #define IS_CBC(mode)                    (mode & QCE_MODE_CBC)
  75 #define IS_ECB(mode)                    (mode & QCE_MODE_ECB)
  76 #define IS_CTR(mode)                    (mode & QCE_MODE_CTR)
  77 #define IS_XTS(mode)                    (mode & QCE_MODE_XTS)
  78 #define IS_CCM(mode)                    (mode & QCE_MODE_CCM)
  79 #define IS_CCM_RFC4309(mode)            ((mode) & QCE_MODE_CCM_RFC4309)
  80
  81 #define IS_ENCRYPT(dir)                 (dir & QCE_ENCRYPT)
  82 #define IS_DECRYPT(dir)                 (dir & QCE_DECRYPT)
  83
  84 struct qce_alg_template {
  85         struct list_head entry;
  86         u32 crypto_alg_type;
  87         unsigned long alg_flags;
  88         const u32 *std_iv;
  89         union {
  90                 struct skcipher_alg skcipher;
  91                 struct ahash_alg ahash;
  92                 struct aead_alg aead;
  93         } alg;
  94         struct qce_device *qce;
  95         const u8 *hash_zero;
  96         const u32 digest_size;
  97 };
  98
  99 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
 100 int qce_check_status(struct qce_device *qce, u32 *status);
 101 void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
 102 int qce_start(struct crypto_async_request *async_req, u32 type);
 103
 104 #endif /* _COMMON_H_ */