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module: Convert symbol namespace to string literal
[linux.git] / drivers / iio / accel / bma180.c
blob128db14ba726a3ada82a43cfcea04c8fc1bfee76
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * bma180.c - IIO driver for Bosch BMA180 triaxial acceleration sensor
4 *
5 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com>
6 *
7 * Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net>
8 *
9 * SPI is not supported by driver
10 * BMA023/BMA150/SMB380: 7-bit I2C slave address 0x38
11 * BMA180: 7-bit I2C slave address 0x40 or 0x41
12 * BMA250: 7-bit I2C slave address 0x18 or 0x19
13 */
14
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/bitops.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/types.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/sysfs.h>
27 #include <linux/iio/buffer.h>
28 #include <linux/iio/trigger.h>
29 #include <linux/iio/trigger_consumer.h>
30 #include <linux/iio/triggered_buffer.h>
31
32 #define BMA180_DRV_NAME "bma180"
33 #define BMA180_IRQ_NAME "bma180_event"
34
35 enum chip_ids {
36 BMA023,
37 BMA150,
38 BMA180,
39 BMA250,
40 };
41
42 struct bma180_data;
43
44 struct bma180_part_info {
45 u8 chip_id;
46 const struct iio_chan_spec *channels;
47 unsigned int num_channels;
48 const int *scale_table;
49 unsigned int num_scales;
50 const int *bw_table;
51 unsigned int num_bw;
52 int temp_offset;
53
54 u8 int_reset_reg, int_reset_mask;
55 u8 sleep_reg, sleep_mask;
56 u8 bw_reg, bw_mask, bw_offset;
57 u8 scale_reg, scale_mask;
58 u8 power_reg, power_mask, lowpower_val;
59 u8 int_enable_reg, int_enable_mask;
60 u8 softreset_reg, softreset_val;
61
62 int (*chip_config)(struct bma180_data *data);
63 void (*chip_disable)(struct bma180_data *data);
64 };
65
66 /* Register set */
67 #define BMA023_CTRL_REG0 0x0a
68 #define BMA023_CTRL_REG1 0x0b
69 #define BMA023_CTRL_REG2 0x14
70 #define BMA023_CTRL_REG3 0x15
71
72 #define BMA023_RANGE_MASK GENMASK(4, 3) /* Range of accel values */
73 #define BMA023_BW_MASK GENMASK(2, 0) /* Accel bandwidth */
74 #define BMA023_SLEEP BIT(0)
75 #define BMA023_INT_RESET_MASK BIT(6)
76 #define BMA023_NEW_DATA_INT BIT(5) /* Intr every new accel data is ready */
77 #define BMA023_RESET_VAL BIT(1)
78
79 #define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
80 #define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
81 #define BMA180_TEMP 0x08
82 #define BMA180_CTRL_REG0 0x0d
83 #define BMA180_RESET 0x10
84 #define BMA180_BW_TCS 0x20
85 #define BMA180_CTRL_REG3 0x21
86 #define BMA180_TCO_Z 0x30
87 #define BMA180_OFFSET_LSB1 0x35
88
89 /* BMA180_CTRL_REG0 bits */
90 #define BMA180_DIS_WAKE_UP BIT(0) /* Disable wake up mode */
91 #define BMA180_SLEEP BIT(1) /* 1 - chip will sleep */
92 #define BMA180_EE_W BIT(4) /* Unlock writing to addr from 0x20 */
93 #define BMA180_RESET_INT BIT(6) /* Reset pending interrupts */
94
95 /* BMA180_CTRL_REG3 bits */
96 #define BMA180_NEW_DATA_INT BIT(1) /* Intr every new accel data is ready */
97
98 /* BMA180_OFFSET_LSB1 skipping mode bit */
99 #define BMA180_SMP_SKIP BIT(0)
100
101 /* Bit masks for registers bit fields */
102 #define BMA180_RANGE 0x0e /* Range of measured accel values */
103 #define BMA180_BW 0xf0 /* Accel bandwidth */
104 #define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
105
106 /* We have to write this value in reset register to do soft reset */
107 #define BMA180_RESET_VAL 0xb6
108
109 #define BMA023_ID_REG_VAL 0x02
110 #define BMA180_ID_REG_VAL 0x03
111 #define BMA250_ID_REG_VAL 0x03
112
113 /* Chip power modes */
114 #define BMA180_LOW_POWER 0x03
115
116 #define BMA250_RANGE_REG 0x0f
117 #define BMA250_BW_REG 0x10
118 #define BMA250_POWER_REG 0x11
119 #define BMA250_RESET_REG 0x14
120 #define BMA250_INT_ENABLE_REG 0x17
121 #define BMA250_INT_MAP_REG 0x1a
122 #define BMA250_INT_RESET_REG 0x21
123
124 #define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
125 #define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
126 #define BMA250_BW_OFFSET 8
127 #define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
128 #define BMA250_LOWPOWER_MASK BIT(6)
129 #define BMA250_DATA_INTEN_MASK BIT(4)
130 #define BMA250_INT1_DATA_MASK BIT(0)
131 #define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
132
133 struct bma180_data {
134 struct regulator *vdd_supply;
135 struct regulator *vddio_supply;
136 struct i2c_client *client;
137 struct iio_trigger *trig;
138 const struct bma180_part_info *part_info;
139 struct iio_mount_matrix orientation;
140 struct mutex mutex;
141 bool sleep_state;
142 int scale;
143 int bw;
144 bool pmode;
145 /* Ensure timestamp is naturally aligned */
146 struct {
147 s16 chan[4];
148 aligned_s64 timestamp;
149 } scan;
150 };
151
152 enum bma180_chan {
153 AXIS_X,
154 AXIS_Y,
155 AXIS_Z,
156 TEMP
157 };
158
159 static int bma023_bw_table[] = { 25, 50, 100, 190, 375, 750, 1500 }; /* Hz */
160 static int bma023_scale_table[] = { 2452, 4903, 9709, };
161
162 static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
163 static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
164
165 static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250, 500, 1000 }; /* Hz */
166 static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
167 0, 0, 306458 };
168
169 static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
170 {
171 int ret;
172
173 if (data->sleep_state)
174 return -EBUSY;
175
176 switch (chan) {
177 case TEMP:
178 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
179 if (ret < 0)
180 dev_err(&data->client->dev, "failed to read temp register\n");
181 break;
182 default:
183 ret = i2c_smbus_read_word_data(data->client,
184 BMA180_ACC_X_LSB + chan * 2);
185 if (ret < 0)
186 dev_err(&data->client->dev,
187 "failed to read accel_%c register\n",
188 'x' + chan);
189 }
190
191 return ret;
192 }
193
194 static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
195 {
196 int ret = i2c_smbus_read_byte_data(data->client, reg);
197 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1));
198
199 if (ret < 0)
200 return ret;
201
202 return i2c_smbus_write_byte_data(data->client, reg, reg_val);
203 }
204
205 static int bma180_reset_intr(struct bma180_data *data)
206 {
207 int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
208 data->part_info->int_reset_mask, 1);
209
210 if (ret)
211 dev_err(&data->client->dev, "failed to reset interrupt\n");
212
213 return ret;
214 }
215
216 static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
217 {
218 int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
219 data->part_info->int_enable_mask, state);
220 if (ret)
221 goto err;
222 ret = bma180_reset_intr(data);
223 if (ret)
224 goto err;
225
226 return 0;
227
228 err:
229 dev_err(&data->client->dev,
230 "failed to set new data interrupt state %d\n", state);
231 return ret;
232 }
233
234 static int bma180_set_sleep_state(struct bma180_data *data, bool state)
235 {
236 int ret = bma180_set_bits(data, data->part_info->sleep_reg,
237 data->part_info->sleep_mask, state);
238
239 if (ret) {
240 dev_err(&data->client->dev,
241 "failed to set sleep state %d\n", state);
242 return ret;
243 }
244 data->sleep_state = state;
245
246 return 0;
247 }
248
249 static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
250 {
251 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
252
253 if (ret)
254 dev_err(&data->client->dev,
255 "failed to set ee writing state %d\n", state);
256
257 return ret;
258 }
259
260 static int bma180_set_bw(struct bma180_data *data, int val)
261 {
262 int ret, i;
263
264 if (data->sleep_state)
265 return -EBUSY;
266
267 for (i = 0; i < data->part_info->num_bw; ++i) {
268 if (data->part_info->bw_table[i] == val) {
269 ret = bma180_set_bits(data, data->part_info->bw_reg,
270 data->part_info->bw_mask,
271 i + data->part_info->bw_offset);
272 if (ret) {
273 dev_err(&data->client->dev,
274 "failed to set bandwidth\n");
275 return ret;
276 }
277 data->bw = val;
278 return 0;
279 }
280 }
281
282 return -EINVAL;
283 }
284
285 static int bma180_set_scale(struct bma180_data *data, int val)
286 {
287 int ret, i;
288
289 if (data->sleep_state)
290 return -EBUSY;
291
292 for (i = 0; i < data->part_info->num_scales; ++i)
293 if (data->part_info->scale_table[i] == val) {
294 ret = bma180_set_bits(data, data->part_info->scale_reg,
295 data->part_info->scale_mask, i);
296 if (ret) {
297 dev_err(&data->client->dev,
298 "failed to set scale\n");
299 return ret;
300 }
301 data->scale = val;
302 return 0;
303 }
304
305 return -EINVAL;
306 }
307
308 static int bma180_set_pmode(struct bma180_data *data, bool mode)
309 {
310 u8 reg_val = mode ? data->part_info->lowpower_val : 0;
311 int ret = bma180_set_bits(data, data->part_info->power_reg,
312 data->part_info->power_mask, reg_val);
313
314 if (ret) {
315 dev_err(&data->client->dev, "failed to set power mode\n");
316 return ret;
317 }
318 data->pmode = mode;
319
320 return 0;
321 }
322
323 static int bma180_soft_reset(struct bma180_data *data)
324 {
325 int ret = i2c_smbus_write_byte_data(data->client,
326 data->part_info->softreset_reg,
327 data->part_info->softreset_val);
328
329 if (ret)
330 dev_err(&data->client->dev, "failed to reset the chip\n");
331
332 return ret;
333 }
334
335 static int bma180_chip_init(struct bma180_data *data)
336 {
337 /* Try to read chip_id register. It must return 0x03. */
338 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
339
340 if (ret < 0)
341 return ret;
342 if (ret != data->part_info->chip_id) {
343 dev_err(&data->client->dev, "wrong chip ID %d expected %d\n",
344 ret, data->part_info->chip_id);
345 return -ENODEV;
346 }
347
348 ret = bma180_soft_reset(data);
349 if (ret)
350 return ret;
351 /*
352 * No serial transaction should occur within minimum 10 us
353 * after soft_reset command
354 */
355 msleep(20);
356
357 return bma180_set_new_data_intr_state(data, false);
358 }
359
360 static int bma023_chip_config(struct bma180_data *data)
361 {
362 int ret = bma180_chip_init(data);
363
364 if (ret)
365 goto err;
366
367 ret = bma180_set_bw(data, 50); /* 50 Hz */
368 if (ret)
369 goto err;
370 ret = bma180_set_scale(data, 2452); /* 2 G */
371 if (ret)
372 goto err;
373
374 return 0;
375
376 err:
377 dev_err(&data->client->dev, "failed to config the chip\n");
378 return ret;
379 }
380
381 static int bma180_chip_config(struct bma180_data *data)
382 {
383 int ret = bma180_chip_init(data);
384
385 if (ret)
386 goto err;
387 ret = bma180_set_pmode(data, false);
388 if (ret)
389 goto err;
390 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
391 if (ret)
392 goto err;
393 ret = bma180_set_ee_writing_state(data, true);
394 if (ret)
395 goto err;
396 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
397 if (ret)
398 goto err;
399 ret = bma180_set_bw(data, 20); /* 20 Hz */
400 if (ret)
401 goto err;
402 ret = bma180_set_scale(data, 2452); /* 2 G */
403 if (ret)
404 goto err;
405
406 return 0;
407
408 err:
409 dev_err(&data->client->dev, "failed to config the chip\n");
410 return ret;
411 }
412
413 static int bma250_chip_config(struct bma180_data *data)
414 {
415 int ret = bma180_chip_init(data);
416
417 if (ret)
418 goto err;
419 ret = bma180_set_pmode(data, false);
420 if (ret)
421 goto err;
422 ret = bma180_set_bw(data, 16); /* 16 Hz */
423 if (ret)
424 goto err;
425 ret = bma180_set_scale(data, 38344); /* 2 G */
426 if (ret)
427 goto err;
428 /*
429 * This enables dataready interrupt on the INT1 pin
430 * FIXME: support using the INT2 pin
431 */
432 ret = bma180_set_bits(data, BMA250_INT_MAP_REG, BMA250_INT1_DATA_MASK, 1);
433 if (ret)
434 goto err;
435
436 return 0;
437
438 err:
439 dev_err(&data->client->dev, "failed to config the chip\n");
440 return ret;
441 }
442
443 static void bma023_chip_disable(struct bma180_data *data)
444 {
445 if (bma180_set_sleep_state(data, true))
446 goto err;
447
448 return;
449
450 err:
451 dev_err(&data->client->dev, "failed to disable the chip\n");
452 }
453
454 static void bma180_chip_disable(struct bma180_data *data)
455 {
456 if (bma180_set_new_data_intr_state(data, false))
457 goto err;
458 if (bma180_set_ee_writing_state(data, false))
459 goto err;
460 if (bma180_set_sleep_state(data, true))
461 goto err;
462
463 return;
464
465 err:
466 dev_err(&data->client->dev, "failed to disable the chip\n");
467 }
468
469 static void bma250_chip_disable(struct bma180_data *data)
470 {
471 if (bma180_set_new_data_intr_state(data, false))
472 goto err;
473 if (bma180_set_sleep_state(data, true))
474 goto err;
475
476 return;
477
478 err:
479 dev_err(&data->client->dev, "failed to disable the chip\n");
480 }
481
482 static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n,
483 bool micros)
484 {
485 size_t len = 0;
486 int i;
487
488 for (i = 0; i < n; i++) {
489 if (!vals[i])
490 continue;
491 len += scnprintf(buf + len, PAGE_SIZE - len,
492 micros ? "0.%06d " : "%d ", vals[i]);
493 }
494 buf[len - 1] = '\n';
495
496 return len;
497 }
498
499 static ssize_t bma180_show_filter_freq_avail(struct device *dev,
500 struct device_attribute *attr, char *buf)
501 {
502 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
503
504 return bma180_show_avail(buf, data->part_info->bw_table,
505 data->part_info->num_bw, false);
506 }
507
508 static ssize_t bma180_show_scale_avail(struct device *dev,
509 struct device_attribute *attr, char *buf)
510 {
511 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
512
513 return bma180_show_avail(buf, data->part_info->scale_table,
514 data->part_info->num_scales, true);
515 }
516
517 static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
518 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
519
520 static IIO_DEVICE_ATTR(in_accel_scale_available,
521 S_IRUGO, bma180_show_scale_avail, NULL, 0);
522
523 static struct attribute *bma180_attributes[] = {
524 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
525 dev_attr.attr,
526 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
527 NULL,
528 };
529
530 static const struct attribute_group bma180_attrs_group = {
531 .attrs = bma180_attributes,
532 };
533
534 static int bma180_read_raw(struct iio_dev *indio_dev,
535 struct iio_chan_spec const *chan, int *val, int *val2,
536 long mask)
537 {
538 struct bma180_data *data = iio_priv(indio_dev);
539 int ret;
540
541 switch (mask) {
542 case IIO_CHAN_INFO_RAW:
543 ret = iio_device_claim_direct_mode(indio_dev);
544 if (ret)
545 return ret;
546
547 mutex_lock(&data->mutex);
548 ret = bma180_get_data_reg(data, chan->scan_index);
549 mutex_unlock(&data->mutex);
550 iio_device_release_direct_mode(indio_dev);
551 if (ret < 0)
552 return ret;
553 if (chan->scan_type.sign == 's') {
554 *val = sign_extend32(ret >> chan->scan_type.shift,
555 chan->scan_type.realbits - 1);
556 } else {
557 *val = ret;
558 }
559 return IIO_VAL_INT;
560 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
561 *val = data->bw;
562 return IIO_VAL_INT;
563 case IIO_CHAN_INFO_SCALE:
564 switch (chan->type) {
565 case IIO_ACCEL:
566 *val = 0;
567 *val2 = data->scale;
568 return IIO_VAL_INT_PLUS_MICRO;
569 case IIO_TEMP:
570 *val = 500;
571 return IIO_VAL_INT;
572 default:
573 return -EINVAL;
574 }
575 case IIO_CHAN_INFO_OFFSET:
576 *val = data->part_info->temp_offset;
577 return IIO_VAL_INT;
578 default:
579 return -EINVAL;
580 }
581 }
582
583 static int bma180_write_raw(struct iio_dev *indio_dev,
584 struct iio_chan_spec const *chan, int val, int val2, long mask)
585 {
586 struct bma180_data *data = iio_priv(indio_dev);
587 int ret;
588
589 switch (mask) {
590 case IIO_CHAN_INFO_SCALE:
591 if (val)
592 return -EINVAL;
593 mutex_lock(&data->mutex);
594 ret = bma180_set_scale(data, val2);
595 mutex_unlock(&data->mutex);
596 return ret;
597 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
598 if (val2)
599 return -EINVAL;
600 mutex_lock(&data->mutex);
601 ret = bma180_set_bw(data, val);
602 mutex_unlock(&data->mutex);
603 return ret;
604 default:
605 return -EINVAL;
606 }
607 }
608
609 static const struct iio_info bma180_info = {
610 .attrs = &bma180_attrs_group,
611 .read_raw = bma180_read_raw,
612 .write_raw = bma180_write_raw,
613 };
614
615 static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
616
617 static int bma180_get_power_mode(struct iio_dev *indio_dev,
618 const struct iio_chan_spec *chan)
619 {
620 struct bma180_data *data = iio_priv(indio_dev);
621
622 return data->pmode;
623 }
624
625 static int bma180_set_power_mode(struct iio_dev *indio_dev,
626 const struct iio_chan_spec *chan, unsigned int mode)
627 {
628 struct bma180_data *data = iio_priv(indio_dev);
629 int ret;
630
631 mutex_lock(&data->mutex);
632 ret = bma180_set_pmode(data, mode);
633 mutex_unlock(&data->mutex);
634
635 return ret;
636 }
637
638 static const struct iio_mount_matrix *
639 bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev,
640 const struct iio_chan_spec *chan)
641 {
642 struct bma180_data *data = iio_priv(indio_dev);
643
644 return &data->orientation;
645 }
646
647 static const struct iio_enum bma180_power_mode_enum = {
648 .items = bma180_power_modes,
649 .num_items = ARRAY_SIZE(bma180_power_modes),
650 .get = bma180_get_power_mode,
651 .set = bma180_set_power_mode,
652 };
653
654 static const struct iio_chan_spec_ext_info bma023_ext_info[] = {
655 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
656 { }
657 };
658
659 static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
660 IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
661 IIO_ENUM_AVAILABLE("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
662 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
663 { }
664 };
665
666 #define BMA023_ACC_CHANNEL(_axis, _bits) { \
667 .type = IIO_ACCEL, \
668 .modified = 1, \
669 .channel2 = IIO_MOD_##_axis, \
670 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
671 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
672 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
673 .scan_index = AXIS_##_axis, \
674 .scan_type = { \
675 .sign = 's', \
676 .realbits = _bits, \
677 .storagebits = 16, \
678 .shift = 16 - _bits, \
679 }, \
680 .ext_info = bma023_ext_info, \
681 }
682
683 #define BMA150_TEMP_CHANNEL { \
684 .type = IIO_TEMP, \
685 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
686 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
687 .scan_index = TEMP, \
688 .scan_type = { \
689 .sign = 'u', \
690 .realbits = 8, \
691 .storagebits = 16, \
692 }, \
693 }
694
695 #define BMA180_ACC_CHANNEL(_axis, _bits) { \
696 .type = IIO_ACCEL, \
697 .modified = 1, \
698 .channel2 = IIO_MOD_##_axis, \
699 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
700 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
701 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
702 .scan_index = AXIS_##_axis, \
703 .scan_type = { \
704 .sign = 's', \
705 .realbits = _bits, \
706 .storagebits = 16, \
707 .shift = 16 - _bits, \
708 }, \
709 .ext_info = bma180_ext_info, \
710 }
711
712 #define BMA180_TEMP_CHANNEL { \
713 .type = IIO_TEMP, \
714 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
715 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
716 .scan_index = TEMP, \
717 .scan_type = { \
718 .sign = 's', \
719 .realbits = 8, \
720 .storagebits = 16, \
721 }, \
722 }
723
724 static const struct iio_chan_spec bma023_channels[] = {
725 BMA023_ACC_CHANNEL(X, 10),
726 BMA023_ACC_CHANNEL(Y, 10),
727 BMA023_ACC_CHANNEL(Z, 10),
728 IIO_CHAN_SOFT_TIMESTAMP(4),
729 };
730
731 static const struct iio_chan_spec bma150_channels[] = {
732 BMA023_ACC_CHANNEL(X, 10),
733 BMA023_ACC_CHANNEL(Y, 10),
734 BMA023_ACC_CHANNEL(Z, 10),
735 BMA150_TEMP_CHANNEL,
736 IIO_CHAN_SOFT_TIMESTAMP(4),
737 };
738
739 static const struct iio_chan_spec bma180_channels[] = {
740 BMA180_ACC_CHANNEL(X, 14),
741 BMA180_ACC_CHANNEL(Y, 14),
742 BMA180_ACC_CHANNEL(Z, 14),
743 BMA180_TEMP_CHANNEL,
744 IIO_CHAN_SOFT_TIMESTAMP(4),
745 };
746
747 static const struct iio_chan_spec bma250_channels[] = {
748 BMA180_ACC_CHANNEL(X, 10),
749 BMA180_ACC_CHANNEL(Y, 10),
750 BMA180_ACC_CHANNEL(Z, 10),
751 BMA180_TEMP_CHANNEL,
752 IIO_CHAN_SOFT_TIMESTAMP(4),
753 };
754
755 static const struct bma180_part_info bma180_part_info[] = {
756 [BMA023] = {
757 .chip_id = BMA023_ID_REG_VAL,
758 .channels = bma023_channels,
759 .num_channels = ARRAY_SIZE(bma023_channels),
760 .scale_table = bma023_scale_table,
761 .num_scales = ARRAY_SIZE(bma023_scale_table),
762 .bw_table = bma023_bw_table,
763 .num_bw = ARRAY_SIZE(bma023_bw_table),
764 /* No temperature channel */
765 .temp_offset = 0,
766 .int_reset_reg = BMA023_CTRL_REG0,
767 .int_reset_mask = BMA023_INT_RESET_MASK,
768 .sleep_reg = BMA023_CTRL_REG0,
769 .sleep_mask = BMA023_SLEEP,
770 .bw_reg = BMA023_CTRL_REG2,
771 .bw_mask = BMA023_BW_MASK,
772 .scale_reg = BMA023_CTRL_REG2,
773 .scale_mask = BMA023_RANGE_MASK,
774 /* No power mode on bma023 */
775 .power_reg = 0,
776 .power_mask = 0,
777 .lowpower_val = 0,
778 .int_enable_reg = BMA023_CTRL_REG3,
779 .int_enable_mask = BMA023_NEW_DATA_INT,
780 .softreset_reg = BMA023_CTRL_REG0,
781 .softreset_val = BMA023_RESET_VAL,
782 .chip_config = bma023_chip_config,
783 .chip_disable = bma023_chip_disable,
784 },
785 [BMA150] = {
786 .chip_id = BMA023_ID_REG_VAL,
787 .channels = bma150_channels,
788 .num_channels = ARRAY_SIZE(bma150_channels),
789 .scale_table = bma023_scale_table,
790 .num_scales = ARRAY_SIZE(bma023_scale_table),
791 .bw_table = bma023_bw_table,
792 .num_bw = ARRAY_SIZE(bma023_bw_table),
793 .temp_offset = -60, /* 0 LSB @ -30 degree C */
794 .int_reset_reg = BMA023_CTRL_REG0,
795 .int_reset_mask = BMA023_INT_RESET_MASK,
796 .sleep_reg = BMA023_CTRL_REG0,
797 .sleep_mask = BMA023_SLEEP,
798 .bw_reg = BMA023_CTRL_REG2,
799 .bw_mask = BMA023_BW_MASK,
800 .scale_reg = BMA023_CTRL_REG2,
801 .scale_mask = BMA023_RANGE_MASK,
802 /* No power mode on bma150 */
803 .power_reg = 0,
804 .power_mask = 0,
805 .lowpower_val = 0,
806 .int_enable_reg = BMA023_CTRL_REG3,
807 .int_enable_mask = BMA023_NEW_DATA_INT,
808 .softreset_reg = BMA023_CTRL_REG0,
809 .softreset_val = BMA023_RESET_VAL,
810 .chip_config = bma023_chip_config,
811 .chip_disable = bma023_chip_disable,
812 },
813 [BMA180] = {
814 .chip_id = BMA180_ID_REG_VAL,
815 .channels = bma180_channels,
816 .num_channels = ARRAY_SIZE(bma180_channels),
817 .scale_table = bma180_scale_table,
818 .num_scales = ARRAY_SIZE(bma180_scale_table),
819 .bw_table = bma180_bw_table,
820 .num_bw = ARRAY_SIZE(bma180_bw_table),
821 .temp_offset = 48, /* 0 LSB @ 24 degree C */
822 .int_reset_reg = BMA180_CTRL_REG0,
823 .int_reset_mask = BMA180_RESET_INT,
824 .sleep_reg = BMA180_CTRL_REG0,
825 .sleep_mask = BMA180_SLEEP,
826 .bw_reg = BMA180_BW_TCS,
827 .bw_mask = BMA180_BW,
828 .scale_reg = BMA180_OFFSET_LSB1,
829 .scale_mask = BMA180_RANGE,
830 .power_reg = BMA180_TCO_Z,
831 .power_mask = BMA180_MODE_CONFIG,
832 .lowpower_val = BMA180_LOW_POWER,
833 .int_enable_reg = BMA180_CTRL_REG3,
834 .int_enable_mask = BMA180_NEW_DATA_INT,
835 .softreset_reg = BMA180_RESET,
836 .softreset_val = BMA180_RESET_VAL,
837 .chip_config = bma180_chip_config,
838 .chip_disable = bma180_chip_disable,
839 },
840 [BMA250] = {
841 .chip_id = BMA250_ID_REG_VAL,
842 .channels = bma250_channels,
843 .num_channels = ARRAY_SIZE(bma250_channels),
844 .scale_table = bma250_scale_table,
845 .num_scales = ARRAY_SIZE(bma250_scale_table),
846 .bw_table = bma250_bw_table,
847 .num_bw = ARRAY_SIZE(bma250_bw_table),
848 .temp_offset = 48, /* 0 LSB @ 24 degree C */
849 .int_reset_reg = BMA250_INT_RESET_REG,
850 .int_reset_mask = BMA250_INT_RESET_MASK,
851 .sleep_reg = BMA250_POWER_REG,
852 .sleep_mask = BMA250_SUSPEND_MASK,
853 .bw_reg = BMA250_BW_REG,
854 .bw_mask = BMA250_BW_MASK,
855 .bw_offset = BMA250_BW_OFFSET,
856 .scale_reg = BMA250_RANGE_REG,
857 .scale_mask = BMA250_RANGE_MASK,
858 .power_reg = BMA250_POWER_REG,
859 .power_mask = BMA250_LOWPOWER_MASK,
860 .lowpower_val = 1,
861 .int_enable_reg = BMA250_INT_ENABLE_REG,
862 .int_enable_mask = BMA250_DATA_INTEN_MASK,
863 .softreset_reg = BMA250_RESET_REG,
864 .softreset_val = BMA180_RESET_VAL,
865 .chip_config = bma250_chip_config,
866 .chip_disable = bma250_chip_disable,
867 },
868 };
869
870 static irqreturn_t bma180_trigger_handler(int irq, void *p)
871 {
872 struct iio_poll_func *pf = p;
873 struct iio_dev *indio_dev = pf->indio_dev;
874 struct bma180_data *data = iio_priv(indio_dev);
875 s64 time_ns = iio_get_time_ns(indio_dev);
876 int bit, ret, i = 0;
877
878 mutex_lock(&data->mutex);
879
880 iio_for_each_active_channel(indio_dev, bit) {
881 ret = bma180_get_data_reg(data, bit);
882 if (ret < 0) {
883 mutex_unlock(&data->mutex);
884 goto err;
885 }
886 data->scan.chan[i++] = ret;
887 }
888
889 mutex_unlock(&data->mutex);
890
891 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, time_ns);
892 err:
893 iio_trigger_notify_done(indio_dev->trig);
894
895 return IRQ_HANDLED;
896 }
897
898 static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig,
899 bool state)
900 {
901 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
902 struct bma180_data *data = iio_priv(indio_dev);
903
904 return bma180_set_new_data_intr_state(data, state);
905 }
906
907 static void bma180_trig_reen(struct iio_trigger *trig)
908 {
909 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
910 struct bma180_data *data = iio_priv(indio_dev);
911 int ret;
912
913 ret = bma180_reset_intr(data);
914 if (ret)
915 dev_err(&data->client->dev, "failed to reset interrupt\n");
916 }
917
918 static const struct iio_trigger_ops bma180_trigger_ops = {
919 .set_trigger_state = bma180_data_rdy_trigger_set_state,
920 .reenable = bma180_trig_reen,
921 };
922
923 static int bma180_probe(struct i2c_client *client)
924 {
925 const struct i2c_device_id *id = i2c_client_get_device_id(client);
926 struct device *dev = &client->dev;
927 struct bma180_data *data;
928 struct iio_dev *indio_dev;
929 int ret;
930
931 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
932 if (!indio_dev)
933 return -ENOMEM;
934
935 data = iio_priv(indio_dev);
936 i2c_set_clientdata(client, indio_dev);
937 data->client = client;
938 data->part_info = i2c_get_match_data(client);
939
940 ret = iio_read_mount_matrix(dev, &data->orientation);
941 if (ret)
942 return ret;
943
944 data->vdd_supply = devm_regulator_get(dev, "vdd");
945 if (IS_ERR(data->vdd_supply))
946 return dev_err_probe(dev, PTR_ERR(data->vdd_supply),
947 "Failed to get vdd regulator\n");
948
949 data->vddio_supply = devm_regulator_get(dev, "vddio");
950 if (IS_ERR(data->vddio_supply))
951 return dev_err_probe(dev, PTR_ERR(data->vddio_supply),
952 "Failed to get vddio regulator\n");
953
954 /* Typical voltage 2.4V these are min and max */
955 ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);
956 if (ret)
957 return ret;
958 ret = regulator_set_voltage(data->vddio_supply, 1200000, 3600000);
959 if (ret)
960 return ret;
961 ret = regulator_enable(data->vdd_supply);
962 if (ret) {
963 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
964 return ret;
965 }
966 ret = regulator_enable(data->vddio_supply);
967 if (ret) {
968 dev_err(dev, "Failed to enable vddio regulator: %d\n", ret);
969 goto err_disable_vdd;
970 }
971 /* Wait to make sure we started up properly (3 ms at least) */
972 usleep_range(3000, 5000);
973
974 ret = data->part_info->chip_config(data);
975 if (ret < 0)
976 goto err_chip_disable;
977
978 mutex_init(&data->mutex);
979 indio_dev->channels = data->part_info->channels;
980 indio_dev->num_channels = data->part_info->num_channels;
981 indio_dev->name = id->name;
982 indio_dev->modes = INDIO_DIRECT_MODE;
983 indio_dev->info = &bma180_info;
984
985 if (client->irq > 0) {
986 data->trig = iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
987 iio_device_id(indio_dev));
988 if (!data->trig) {
989 ret = -ENOMEM;
990 goto err_chip_disable;
991 }
992
993 ret = devm_request_irq(dev, client->irq,
994 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
995 "bma180_event", data->trig);
996 if (ret) {
997 dev_err(dev, "unable to request IRQ\n");
998 goto err_trigger_free;
999 }
1000
1001 data->trig->ops = &bma180_trigger_ops;
1002 iio_trigger_set_drvdata(data->trig, indio_dev);
1003
1004 ret = iio_trigger_register(data->trig);
1005 if (ret)
1006 goto err_trigger_free;
1007
1008 indio_dev->trig = iio_trigger_get(data->trig);
1009 }
1010
1011 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1012 bma180_trigger_handler, NULL);
1013 if (ret < 0) {
1014 dev_err(dev, "unable to setup iio triggered buffer\n");
1015 goto err_trigger_unregister;
1016 }
1017
1018 ret = iio_device_register(indio_dev);
1019 if (ret < 0) {
1020 dev_err(dev, "unable to register iio device\n");
1021 goto err_buffer_cleanup;
1022 }
1023
1024 return 0;
1025
1026 err_buffer_cleanup:
1027 iio_triggered_buffer_cleanup(indio_dev);
1028 err_trigger_unregister:
1029 if (data->trig)
1030 iio_trigger_unregister(data->trig);
1031 err_trigger_free:
1032 iio_trigger_free(data->trig);
1033 err_chip_disable:
1034 data->part_info->chip_disable(data);
1035 regulator_disable(data->vddio_supply);
1036 err_disable_vdd:
1037 regulator_disable(data->vdd_supply);
1038
1039 return ret;
1040 }
1041
1042 static void bma180_remove(struct i2c_client *client)
1043 {
1044 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1045 struct bma180_data *data = iio_priv(indio_dev);
1046
1047 iio_device_unregister(indio_dev);
1048 iio_triggered_buffer_cleanup(indio_dev);
1049 if (data->trig) {
1050 iio_trigger_unregister(data->trig);
1051 iio_trigger_free(data->trig);
1052 }
1053
1054 mutex_lock(&data->mutex);
1055 data->part_info->chip_disable(data);
1056 mutex_unlock(&data->mutex);
1057 regulator_disable(data->vddio_supply);
1058 regulator_disable(data->vdd_supply);
1059 }
1060
1061 static int bma180_suspend(struct device *dev)
1062 {
1063 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1064 struct bma180_data *data = iio_priv(indio_dev);
1065 int ret;
1066
1067 mutex_lock(&data->mutex);
1068 ret = bma180_set_sleep_state(data, true);
1069 mutex_unlock(&data->mutex);
1070
1071 return ret;
1072 }
1073
1074 static int bma180_resume(struct device *dev)
1075 {
1076 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1077 struct bma180_data *data = iio_priv(indio_dev);
1078 int ret;
1079
1080 mutex_lock(&data->mutex);
1081 ret = bma180_set_sleep_state(data, false);
1082 mutex_unlock(&data->mutex);
1083
1084 return ret;
1085 }
1086
1087 static DEFINE_SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
1088
1089 static const struct i2c_device_id bma180_ids[] = {
1090 { "bma023", (kernel_ulong_t)&bma180_part_info[BMA023] },
1091 { "bma150", (kernel_ulong_t)&bma180_part_info[BMA150] },
1092 { "bma180", (kernel_ulong_t)&bma180_part_info[BMA180] },
1093 { "bma250", (kernel_ulong_t)&bma180_part_info[BMA250] },
1094 { "smb380", (kernel_ulong_t)&bma180_part_info[BMA150] },
1095 { }
1096 };
1097
1098 MODULE_DEVICE_TABLE(i2c, bma180_ids);
1099
1100 static const struct of_device_id bma180_of_match[] = {
1101 {
1102 .compatible = "bosch,bma023",
1103 .data = &bma180_part_info[BMA023]
1104 },
1105 {
1106 .compatible = "bosch,bma150",
1107 .data = &bma180_part_info[BMA150]
1108 },
1109 {
1110 .compatible = "bosch,bma180",
1111 .data = &bma180_part_info[BMA180]
1112 },
1113 {
1114 .compatible = "bosch,bma250",
1115 .data = &bma180_part_info[BMA250]
1116 },
1117 {
1118 .compatible = "bosch,smb380",
1119 .data = &bma180_part_info[BMA150]
1120 },
1121 { }
1122 };
1123 MODULE_DEVICE_TABLE(of, bma180_of_match);
1124
1125 static struct i2c_driver bma180_driver = {
1126 .driver = {
1127 .name = "bma180",
1128 .pm = pm_sleep_ptr(&bma180_pm_ops),
1129 .of_match_table = bma180_of_match,
1130 },
1131 .probe = bma180_probe,
1132 .remove = bma180_remove,
1133 .id_table = bma180_ids,
1134 };
1135
1136 module_i2c_driver(bma180_driver);
1137
1138 MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
1139 MODULE_AUTHOR("Texas Instruments, Inc.");
1140 MODULE_DESCRIPTION("Bosch BMA023/BMA1x0/BMA250 triaxial acceleration sensor");
1141 MODULE_LICENSE("GPL");
Linux Kernel