drivers/iio/dac/ad5592r-base.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * AD5592R Digital <-> Analog converters driver
   4  *
   5  * Copyright 2014-2016 Analog Devices Inc.
   6  * Author: Paul Cercueil <paul.cercueil@analog.com>
   7  */
   8
   9 #include <linux/bitops.h>
  10 #include <linux/delay.h>
  11 #include <linux/iio/iio.h>
  12 #include <linux/module.h>
  13 #include <linux/mutex.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/gpio/consumer.h>
  16 #include <linux/gpio/driver.h>
  17 #include <linux/property.h>
  18
  19 #include <dt-bindings/iio/adi,ad5592r.h>
  20
  21 #include "ad5592r-base.h"
  22
  23 static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
  24 {
  25         struct ad5592r_state *st = gpiochip_get_data(chip);
  26         int ret = 0;
  27         u8 val;
  28
  29         mutex_lock(&st->gpio_lock);
  30
  31         if (st->gpio_out & BIT(offset))
  32                 val = st->gpio_val;
  33         else
  34                 ret = st->ops->gpio_read(st, &val);
  35
  36         mutex_unlock(&st->gpio_lock);
  37
  38         if (ret < 0)
  39                 return ret;
  40
  41         return !!(val & BIT(offset));
  42 }
  43
  44 static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  45 {
  46         struct ad5592r_state *st = gpiochip_get_data(chip);
  47
  48         mutex_lock(&st->gpio_lock);
  49
  50         if (value)
  51                 st->gpio_val |= BIT(offset);
  52         else
  53                 st->gpio_val &= ~BIT(offset);
  54
  55         st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
  56
  57         mutex_unlock(&st->gpio_lock);
  58 }
  59
  60 static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  61 {
  62         struct ad5592r_state *st = gpiochip_get_data(chip);
  63         int ret;
  64
  65         mutex_lock(&st->gpio_lock);
  66
  67         st->gpio_out &= ~BIT(offset);
  68         st->gpio_in |= BIT(offset);
  69
  70         ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
  71         if (ret < 0)
  72                 goto err_unlock;
  73
  74         ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
  75
  76 err_unlock:
  77         mutex_unlock(&st->gpio_lock);
  78
  79         return ret;
  80 }
  81
  82 static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
  83                                          unsigned offset, int value)
  84 {
  85         struct ad5592r_state *st = gpiochip_get_data(chip);
  86         int ret;
  87
  88         mutex_lock(&st->gpio_lock);
  89
  90         if (value)
  91                 st->gpio_val |= BIT(offset);
  92         else
  93                 st->gpio_val &= ~BIT(offset);
  94
  95         st->gpio_in &= ~BIT(offset);
  96         st->gpio_out |= BIT(offset);
  97
  98         ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
  99         if (ret < 0)
 100                 goto err_unlock;
 101
 102         ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
 103         if (ret < 0)
 104                 goto err_unlock;
 105
 106         ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
 107
 108 err_unlock:
 109         mutex_unlock(&st->gpio_lock);
 110
 111         return ret;
 112 }
 113
 114 static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
 115 {
 116         struct ad5592r_state *st = gpiochip_get_data(chip);
 117
 118         if (!(st->gpio_map & BIT(offset))) {
 119                 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
 120                         offset);
 121                 return -ENODEV;
 122         }
 123
 124         return 0;
 125 }
 126
 127 static const char * const ad5592r_gpio_names[] = {
 128         "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7",
 129 };
 130
 131 static int ad5592r_gpio_init(struct ad5592r_state *st)
 132 {
 133         if (!st->gpio_map)
 134                 return 0;
 135
 136         st->gpiochip.label = dev_name(st->dev);
 137         st->gpiochip.base = -1;
 138         st->gpiochip.ngpio = 8;
 139         st->gpiochip.parent = st->dev;
 140         st->gpiochip.can_sleep = true;
 141         st->gpiochip.direction_input = ad5592r_gpio_direction_input;
 142         st->gpiochip.direction_output = ad5592r_gpio_direction_output;
 143         st->gpiochip.get = ad5592r_gpio_get;
 144         st->gpiochip.set = ad5592r_gpio_set;
 145         st->gpiochip.request = ad5592r_gpio_request;
 146         st->gpiochip.owner = THIS_MODULE;
 147         st->gpiochip.names = ad5592r_gpio_names;
 148
 149         mutex_init(&st->gpio_lock);
 150
 151         return gpiochip_add_data(&st->gpiochip, st);
 152 }
 153
 154 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
 155 {
 156         if (st->gpio_map)
 157                 gpiochip_remove(&st->gpiochip);
 158 }
 159
 160 static int ad5592r_reset(struct ad5592r_state *st)
 161 {
 162         struct gpio_desc *gpio;
 163
 164         gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
 165         if (IS_ERR(gpio))
 166                 return PTR_ERR(gpio);
 167
 168         if (gpio) {
 169                 udelay(1);
 170                 gpiod_set_value(gpio, 1);
 171         } else {
 172                 mutex_lock(&st->lock);
 173                 /* Writing this magic value resets the device */
 174                 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
 175                 mutex_unlock(&st->lock);
 176         }
 177
 178         udelay(250);
 179
 180         return 0;
 181 }
 182
 183 static int ad5592r_get_vref(struct ad5592r_state *st)
 184 {
 185         int ret;
 186
 187         if (st->reg) {
 188                 ret = regulator_get_voltage(st->reg);
 189                 if (ret < 0)
 190                         return ret;
 191
 192                 return ret / 1000;
 193         } else {
 194                 return 2500;
 195         }
 196 }
 197
 198 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
 199 {
 200         const struct ad5592r_rw_ops *ops = st->ops;
 201         int ret;
 202         unsigned i;
 203         u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
 204         u16 read_back;
 205
 206         for (i = 0; i < st->num_channels; i++) {
 207                 switch (st->channel_modes[i]) {
 208                 case CH_MODE_DAC:
 209                         dac |= BIT(i);
 210                         break;
 211
 212                 case CH_MODE_ADC:
 213                         adc |= BIT(i);
 214                         break;
 215
 216                 case CH_MODE_DAC_AND_ADC:
 217                         dac |= BIT(i);
 218                         adc |= BIT(i);
 219                         break;
 220
 221                 case CH_MODE_GPIO:
 222                         st->gpio_map |= BIT(i);
 223                         st->gpio_in |= BIT(i); /* Default to input */
 224                         break;
 225
 226                 case CH_MODE_UNUSED:
 227                 default:
 228                         switch (st->channel_offstate[i]) {
 229                         case CH_OFFSTATE_OUT_TRISTATE:
 230                                 tristate |= BIT(i);
 231                                 break;
 232
 233                         case CH_OFFSTATE_OUT_LOW:
 234                                 st->gpio_out |= BIT(i);
 235                                 break;
 236
 237                         case CH_OFFSTATE_OUT_HIGH:
 238                                 st->gpio_out |= BIT(i);
 239                                 st->gpio_val |= BIT(i);
 240                                 break;
 241
 242                         case CH_OFFSTATE_PULLDOWN:
 243                         default:
 244                                 pulldown |= BIT(i);
 245                                 break;
 246                         }
 247                 }
 248         }
 249
 250         mutex_lock(&st->lock);
 251
 252         /* Pull down unused pins to GND */
 253         ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
 254         if (ret)
 255                 goto err_unlock;
 256
 257         ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
 258         if (ret)
 259                 goto err_unlock;
 260
 261         /* Configure pins that we use */
 262         ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
 263         if (ret)
 264                 goto err_unlock;
 265
 266         ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
 267         if (ret)
 268                 goto err_unlock;
 269
 270         ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
 271         if (ret)
 272                 goto err_unlock;
 273
 274         ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
 275         if (ret)
 276                 goto err_unlock;
 277
 278         ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
 279         if (ret)
 280                 goto err_unlock;
 281
 282         /* Verify that we can read back at least one register */
 283         ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
 284         if (!ret && (read_back & 0xff) != adc)
 285                 ret = -EIO;
 286
 287 err_unlock:
 288         mutex_unlock(&st->lock);
 289         return ret;
 290 }
 291
 292 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
 293 {
 294         int i;
 295
 296         for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
 297                 st->channel_modes[i] = CH_MODE_UNUSED;
 298
 299         return ad5592r_set_channel_modes(st);
 300 }
 301
 302 static int ad5592r_write_raw(struct iio_dev *iio_dev,
 303         struct iio_chan_spec const *chan, int val, int val2, long mask)
 304 {
 305         struct ad5592r_state *st = iio_priv(iio_dev);
 306         int ret;
 307
 308         switch (mask) {
 309         case IIO_CHAN_INFO_RAW:
 310
 311                 if (val >= (1 << chan->scan_type.realbits) || val < 0)
 312                         return -EINVAL;
 313
 314                 if (!chan->output)
 315                         return -EINVAL;
 316
 317                 mutex_lock(&st->lock);
 318                 ret = st->ops->write_dac(st, chan->channel, val);
 319                 if (!ret)
 320                         st->cached_dac[chan->channel] = val;
 321                 mutex_unlock(&st->lock);
 322                 return ret;
 323         case IIO_CHAN_INFO_SCALE:
 324                 if (chan->type == IIO_VOLTAGE) {
 325                         bool gain;
 326
 327                         if (val == st->scale_avail[0][0] &&
 328                                 val2 == st->scale_avail[0][1])
 329                                 gain = false;
 330                         else if (val == st->scale_avail[1][0] &&
 331                                  val2 == st->scale_avail[1][1])
 332                                 gain = true;
 333                         else
 334                                 return -EINVAL;
 335
 336                         mutex_lock(&st->lock);
 337
 338                         ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
 339                                                 &st->cached_gp_ctrl);
 340                         if (ret < 0) {
 341                                 mutex_unlock(&st->lock);
 342                                 return ret;
 343                         }
 344
 345                         if (chan->output) {
 346                                 if (gain)
 347                                         st->cached_gp_ctrl |=
 348                                                 AD5592R_REG_CTRL_DAC_RANGE;
 349                                 else
 350                                         st->cached_gp_ctrl &=
 351                                                 ~AD5592R_REG_CTRL_DAC_RANGE;
 352                         } else {
 353                                 if (gain)
 354                                         st->cached_gp_ctrl |=
 355                                                 AD5592R_REG_CTRL_ADC_RANGE;
 356                                 else
 357                                         st->cached_gp_ctrl &=
 358                                                 ~AD5592R_REG_CTRL_ADC_RANGE;
 359                         }
 360
 361                         ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
 362                                                  st->cached_gp_ctrl);
 363                         mutex_unlock(&st->lock);
 364
 365                         return ret;
 366                 }
 367                 break;
 368         default:
 369                 return -EINVAL;
 370         }
 371
 372         return 0;
 373 }
 374
 375 static int ad5592r_read_raw(struct iio_dev *iio_dev,
 376                            struct iio_chan_spec const *chan,
 377                            int *val, int *val2, long m)
 378 {
 379         struct ad5592r_state *st = iio_priv(iio_dev);
 380         u16 read_val;
 381         int ret, mult;
 382
 383         switch (m) {
 384         case IIO_CHAN_INFO_RAW:
 385                 if (!chan->output) {
 386                         mutex_lock(&st->lock);
 387                         ret = st->ops->read_adc(st, chan->channel, &read_val);
 388                         mutex_unlock(&st->lock);
 389                         if (ret)
 390                                 return ret;
 391
 392                         if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
 393                                 dev_err(st->dev, "Error while reading channel %u\n",
 394                                                 chan->channel);
 395                                 return -EIO;
 396                         }
 397
 398                         read_val &= GENMASK(11, 0);
 399
 400                 } else {
 401                         mutex_lock(&st->lock);
 402                         read_val = st->cached_dac[chan->channel];
 403                         mutex_unlock(&st->lock);
 404                 }
 405
 406                 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
 407                                 chan->channel, read_val);
 408
 409                 *val = (int) read_val;
 410                 return IIO_VAL_INT;
 411         case IIO_CHAN_INFO_SCALE:
 412                 *val = ad5592r_get_vref(st);
 413
 414                 if (chan->type == IIO_TEMP) {
 415                         s64 tmp = *val * (3767897513LL / 25LL);
 416                         *val = div_s64_rem(tmp, 1000000000LL, val2);
 417
 418                         return IIO_VAL_INT_PLUS_NANO;
 419                 }
 420
 421                 mutex_lock(&st->lock);
 422
 423                 if (chan->output)
 424                         mult = !!(st->cached_gp_ctrl &
 425                                 AD5592R_REG_CTRL_DAC_RANGE);
 426                 else
 427                         mult = !!(st->cached_gp_ctrl &
 428                                 AD5592R_REG_CTRL_ADC_RANGE);
 429
 430                 mutex_unlock(&st->lock);
 431
 432                 *val *= ++mult;
 433
 434                 *val2 = chan->scan_type.realbits;
 435
 436                 return IIO_VAL_FRACTIONAL_LOG2;
 437         case IIO_CHAN_INFO_OFFSET:
 438                 ret = ad5592r_get_vref(st);
 439
 440                 mutex_lock(&st->lock);
 441
 442                 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
 443                         *val = (-34365 * 25) / ret;
 444                 else
 445                         *val = (-75365 * 25) / ret;
 446
 447                 mutex_unlock(&st->lock);
 448
 449                 return IIO_VAL_INT;
 450         default:
 451                 return -EINVAL;
 452         }
 453 }
 454
 455 static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
 456                                  struct iio_chan_spec const *chan, long mask)
 457 {
 458         switch (mask) {
 459         case IIO_CHAN_INFO_SCALE:
 460                 return IIO_VAL_INT_PLUS_NANO;
 461
 462         default:
 463                 return IIO_VAL_INT_PLUS_MICRO;
 464         }
 465
 466         return -EINVAL;
 467 }
 468
 469 static const struct iio_info ad5592r_info = {
 470         .read_raw = ad5592r_read_raw,
 471         .write_raw = ad5592r_write_raw,
 472         .write_raw_get_fmt = ad5592r_write_raw_get_fmt,
 473 };
 474
 475 static ssize_t ad5592r_show_scale_available(struct iio_dev *iio_dev,
 476                                            uintptr_t private,
 477                                            const struct iio_chan_spec *chan,
 478                                            char *buf)
 479 {
 480         struct ad5592r_state *st = iio_priv(iio_dev);
 481
 482         return sprintf(buf, "%d.%09u %d.%09u\n",
 483                 st->scale_avail[0][0], st->scale_avail[0][1],
 484                 st->scale_avail[1][0], st->scale_avail[1][1]);
 485 }
 486
 487 static const struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
 488         {
 489          .name = "scale_available",
 490          .read = ad5592r_show_scale_available,
 491          .shared = IIO_SHARED_BY_TYPE,
 492          },
 493         {},
 494 };
 495
 496 static void ad5592r_setup_channel(struct iio_dev *iio_dev,
 497                 struct iio_chan_spec *chan, bool output, unsigned id)
 498 {
 499         chan->type = IIO_VOLTAGE;
 500         chan->indexed = 1;
 501         chan->output = output;
 502         chan->channel = id;
 503         chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 504         chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 505         chan->scan_type.sign = 'u';
 506         chan->scan_type.realbits = 12;
 507         chan->scan_type.storagebits = 16;
 508         chan->ext_info = ad5592r_ext_info;
 509 }
 510
 511 static int ad5592r_alloc_channels(struct iio_dev *iio_dev)
 512 {
 513         struct ad5592r_state *st = iio_priv(iio_dev);
 514         unsigned i, curr_channel = 0,
 515                  num_channels = st->num_channels;
 516         struct iio_chan_spec *channels;
 517         struct fwnode_handle *child;
 518         u32 reg, tmp;
 519         int ret;
 520
 521         device_for_each_child_node(st->dev, child) {
 522                 ret = fwnode_property_read_u32(child, "reg", &reg);
 523                 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
 524                         continue;
 525
 526                 ret = fwnode_property_read_u32(child, "adi,mode", &tmp);
 527                 if (!ret)
 528                         st->channel_modes[reg] = tmp;
 529
 530                 ret = fwnode_property_read_u32(child, "adi,off-state", &tmp);
 531                 if (!ret)
 532                         st->channel_offstate[reg] = tmp;
 533         }
 534
 535         channels = devm_kcalloc(st->dev,
 536                         1 + 2 * num_channels, sizeof(*channels),
 537                         GFP_KERNEL);
 538         if (!channels)
 539                 return -ENOMEM;
 540
 541         for (i = 0; i < num_channels; i++) {
 542                 switch (st->channel_modes[i]) {
 543                 case CH_MODE_DAC:
 544                         ad5592r_setup_channel(iio_dev, &channels[curr_channel],
 545                                         true, i);
 546                         curr_channel++;
 547                         break;
 548
 549                 case CH_MODE_ADC:
 550                         ad5592r_setup_channel(iio_dev, &channels[curr_channel],
 551                                         false, i);
 552                         curr_channel++;
 553                         break;
 554
 555                 case CH_MODE_DAC_AND_ADC:
 556                         ad5592r_setup_channel(iio_dev, &channels[curr_channel],
 557                                         true, i);
 558                         curr_channel++;
 559                         ad5592r_setup_channel(iio_dev, &channels[curr_channel],
 560                                         false, i);
 561                         curr_channel++;
 562                         break;
 563
 564                 default:
 565                         continue;
 566                 }
 567         }
 568
 569         channels[curr_channel].type = IIO_TEMP;
 570         channels[curr_channel].channel = 8;
 571         channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 572                                    BIT(IIO_CHAN_INFO_SCALE) |
 573                                    BIT(IIO_CHAN_INFO_OFFSET);
 574         curr_channel++;
 575
 576         iio_dev->num_channels = curr_channel;
 577         iio_dev->channels = channels;
 578
 579         return 0;
 580 }
 581
 582 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
 583 {
 584         s64 tmp = (s64)vref_mV * 1000000000LL >> 12;
 585
 586         st->scale_avail[0][0] =
 587                 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
 588         st->scale_avail[1][0] =
 589                 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
 590 }
 591
 592 int ad5592r_probe(struct device *dev, const char *name,
 593                 const struct ad5592r_rw_ops *ops)
 594 {
 595         struct iio_dev *iio_dev;
 596         struct ad5592r_state *st;
 597         int ret;
 598
 599         iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 600         if (!iio_dev)
 601                 return -ENOMEM;
 602
 603         st = iio_priv(iio_dev);
 604         st->dev = dev;
 605         st->ops = ops;
 606         st->num_channels = 8;
 607         dev_set_drvdata(dev, iio_dev);
 608
 609         st->reg = devm_regulator_get_optional(dev, "vref");
 610         if (IS_ERR(st->reg)) {
 611                 if ((PTR_ERR(st->reg) != -ENODEV) && dev_fwnode(dev))
 612                         return PTR_ERR(st->reg);
 613
 614                 st->reg = NULL;
 615         } else {
 616                 ret = regulator_enable(st->reg);
 617                 if (ret)
 618                         return ret;
 619         }
 620
 621         iio_dev->name = name;
 622         iio_dev->info = &ad5592r_info;
 623         iio_dev->modes = INDIO_DIRECT_MODE;
 624
 625         mutex_init(&st->lock);
 626
 627         ad5592r_init_scales(st, ad5592r_get_vref(st));
 628
 629         ret = ad5592r_reset(st);
 630         if (ret)
 631                 goto error_disable_reg;
 632
 633         ret = ops->reg_write(st, AD5592R_REG_PD,
 634                      (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
 635         if (ret)
 636                 goto error_disable_reg;
 637
 638         ret = ad5592r_alloc_channels(iio_dev);
 639         if (ret)
 640                 goto error_disable_reg;
 641
 642         ret = ad5592r_set_channel_modes(st);
 643         if (ret)
 644                 goto error_reset_ch_modes;
 645
 646         ret = iio_device_register(iio_dev);
 647         if (ret)
 648                 goto error_reset_ch_modes;
 649
 650         ret = ad5592r_gpio_init(st);
 651         if (ret)
 652                 goto error_dev_unregister;
 653
 654         return 0;
 655
 656 error_dev_unregister:
 657         iio_device_unregister(iio_dev);
 658
 659 error_reset_ch_modes:
 660         ad5592r_reset_channel_modes(st);
 661
 662 error_disable_reg:
 663         if (st->reg)
 664                 regulator_disable(st->reg);
 665
 666         return ret;
 667 }
 668 EXPORT_SYMBOL_NS_GPL(ad5592r_probe, "IIO_AD5592R");
 669
 670 void ad5592r_remove(struct device *dev)
 671 {
 672         struct iio_dev *iio_dev = dev_get_drvdata(dev);
 673         struct ad5592r_state *st = iio_priv(iio_dev);
 674
 675         iio_device_unregister(iio_dev);
 676         ad5592r_reset_channel_modes(st);
 677         ad5592r_gpio_cleanup(st);
 678
 679         if (st->reg)
 680                 regulator_disable(st->reg);
 681 }
 682 EXPORT_SYMBOL_NS_GPL(ad5592r_remove, "IIO_AD5592R");
 683
 684 MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
 685 MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
 686 MODULE_LICENSE("GPL v2");