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Merge tag 'uml-for-linus-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / drivers / net / phy / phylink.c
blob214b62fba991ed04063fa35061b57b5522bf86b4
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37
38 PCS_STATE_DOWN = 0,
39 PCS_STATE_STARTING,
40 PCS_STATE_STARTED,
41 };
42
43 /**
44 * struct phylink - internal data type for phylink
45 */
46 struct phylink {
47 /* private: */
48 struct net_device *netdev;
49 const struct phylink_mac_ops *mac_ops;
50 struct phylink_config *config;
51 struct phylink_pcs *pcs;
52 struct device *dev;
53 unsigned int old_link_state:1;
54
55 unsigned long phylink_disable_state; /* bitmask of disables */
56 struct phy_device *phydev;
57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
58 u8 cfg_link_an_mode; /* MLO_AN_xxx */
59 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */
60 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */
61 u8 link_port; /* The current non-phy ethtool port */
62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
64
65 /* The link configuration settings */
66 struct phylink_link_state link_config;
67
68 /* The current settings */
69 phy_interface_t cur_interface;
70
71 struct gpio_desc *link_gpio;
72 unsigned int link_irq;
73 struct timer_list link_poll;
74 void (*get_fixed_state)(struct net_device *dev,
75 struct phylink_link_state *s);
76
77 struct mutex state_mutex;
78 struct phylink_link_state phy_state;
79 unsigned int phy_ib_mode;
80 struct work_struct resolve;
81 unsigned int pcs_neg_mode;
82 unsigned int pcs_state;
83
84 bool link_failed;
85 bool mac_supports_eee_ops;
86 bool mac_supports_eee;
87 bool phy_enable_tx_lpi;
88 bool mac_enable_tx_lpi;
89 bool mac_tx_clk_stop;
90 u32 mac_tx_lpi_timer;
91
92 struct sfp_bus *sfp_bus;
93 bool sfp_may_have_phy;
94 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
95 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
96 u8 sfp_port;
97
98 struct eee_config eee_cfg;
99 };
100
101 #define phylink_printk(level, pl, fmt, ...) \
102 do { \
103 if ((pl)->config->type == PHYLINK_NETDEV) \
104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
105 else if ((pl)->config->type == PHYLINK_DEV) \
106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
107 } while (0)
108
109 #define phylink_err(pl, fmt, ...) \
110 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
111 #define phylink_warn(pl, fmt, ...) \
112 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
113 #define phylink_info(pl, fmt, ...) \
114 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
115 #if defined(CONFIG_DYNAMIC_DEBUG)
116 #define phylink_dbg(pl, fmt, ...) \
117 do { \
118 if ((pl)->config->type == PHYLINK_NETDEV) \
119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
120 else if ((pl)->config->type == PHYLINK_DEV) \
121 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
122 } while (0)
123 #elif defined(DEBUG)
124 #define phylink_dbg(pl, fmt, ...) \
125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
126 #else
127 #define phylink_dbg(pl, fmt, ...) \
128 ({ \
129 if (0) \
130 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
131 })
132 #endif
133
134 static const phy_interface_t phylink_sfp_interface_preference[] = {
135 PHY_INTERFACE_MODE_25GBASER,
136 PHY_INTERFACE_MODE_USXGMII,
137 PHY_INTERFACE_MODE_10GBASER,
138 PHY_INTERFACE_MODE_5GBASER,
139 PHY_INTERFACE_MODE_2500BASEX,
140 PHY_INTERFACE_MODE_SGMII,
141 PHY_INTERFACE_MODE_1000BASEX,
142 PHY_INTERFACE_MODE_100BASEX,
143 };
144
145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
146
147 /**
148 * phylink_set_port_modes() - set the port type modes in the ethtool mask
149 * @mask: ethtool link mode mask
150 *
151 * Sets all the port type modes in the ethtool mask. MAC drivers should
152 * use this in their 'validate' callback.
153 */
154 void phylink_set_port_modes(unsigned long *mask)
155 {
156 phylink_set(mask, TP);
157 phylink_set(mask, AUI);
158 phylink_set(mask, MII);
159 phylink_set(mask, FIBRE);
160 phylink_set(mask, BNC);
161 phylink_set(mask, Backplane);
162 }
163 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
164
165 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
166 {
167 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
168
169 phylink_set_port_modes(tmp);
170 phylink_set(tmp, Autoneg);
171 phylink_set(tmp, Pause);
172 phylink_set(tmp, Asym_Pause);
173
174 return linkmode_subset(linkmode, tmp);
175 }
176
177 static const char *phylink_an_mode_str(unsigned int mode)
178 {
179 static const char *modestr[] = {
180 [MLO_AN_PHY] = "phy",
181 [MLO_AN_FIXED] = "fixed",
182 [MLO_AN_INBAND] = "inband",
183 };
184
185 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
186 }
187
188 static const char *phylink_pcs_mode_str(unsigned int mode)
189 {
190 if (!mode)
191 return "none";
192
193 if (mode & PHYLINK_PCS_NEG_OUTBAND)
194 return "outband";
195
196 if (mode & PHYLINK_PCS_NEG_INBAND) {
197 if (mode & PHYLINK_PCS_NEG_ENABLED)
198 return "inband,an-enabled";
199 else
200 return "inband,an-disabled";
201 }
202
203 return "unknown";
204 }
205
206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
207 {
208 switch (interface) {
209 case PHY_INTERFACE_MODE_SGMII:
210 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
211 return 1250;
212 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
213 return 3125;
214 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
215 return 5156;
216 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
217 return 10313;
218 default:
219 return 0;
220 }
221 }
222
223 /**
224 * phylink_interface_max_speed() - get the maximum speed of a phy interface
225 * @interface: phy interface mode defined by &typedef phy_interface_t
226 *
227 * Determine the maximum speed of a phy interface. This is intended to help
228 * determine the correct speed to pass to the MAC when the phy is performing
229 * rate matching.
230 *
231 * Return: The maximum speed of @interface
232 */
233 static int phylink_interface_max_speed(phy_interface_t interface)
234 {
235 switch (interface) {
236 case PHY_INTERFACE_MODE_100BASEX:
237 case PHY_INTERFACE_MODE_REVRMII:
238 case PHY_INTERFACE_MODE_RMII:
239 case PHY_INTERFACE_MODE_SMII:
240 case PHY_INTERFACE_MODE_REVMII:
241 case PHY_INTERFACE_MODE_MII:
242 return SPEED_100;
243
244 case PHY_INTERFACE_MODE_TBI:
245 case PHY_INTERFACE_MODE_MOCA:
246 case PHY_INTERFACE_MODE_RTBI:
247 case PHY_INTERFACE_MODE_1000BASEX:
248 case PHY_INTERFACE_MODE_1000BASEKX:
249 case PHY_INTERFACE_MODE_TRGMII:
250 case PHY_INTERFACE_MODE_RGMII_TXID:
251 case PHY_INTERFACE_MODE_RGMII_RXID:
252 case PHY_INTERFACE_MODE_RGMII_ID:
253 case PHY_INTERFACE_MODE_RGMII:
254 case PHY_INTERFACE_MODE_PSGMII:
255 case PHY_INTERFACE_MODE_QSGMII:
256 case PHY_INTERFACE_MODE_QUSGMII:
257 case PHY_INTERFACE_MODE_SGMII:
258 case PHY_INTERFACE_MODE_GMII:
259 return SPEED_1000;
260
261 case PHY_INTERFACE_MODE_2500BASEX:
262 case PHY_INTERFACE_MODE_10G_QXGMII:
263 return SPEED_2500;
264
265 case PHY_INTERFACE_MODE_5GBASER:
266 return SPEED_5000;
267
268 case PHY_INTERFACE_MODE_XGMII:
269 case PHY_INTERFACE_MODE_RXAUI:
270 case PHY_INTERFACE_MODE_XAUI:
271 case PHY_INTERFACE_MODE_10GBASER:
272 case PHY_INTERFACE_MODE_10GKR:
273 case PHY_INTERFACE_MODE_USXGMII:
274 return SPEED_10000;
275
276 case PHY_INTERFACE_MODE_25GBASER:
277 return SPEED_25000;
278
279 case PHY_INTERFACE_MODE_XLGMII:
280 return SPEED_40000;
281
282 case PHY_INTERFACE_MODE_INTERNAL:
283 case PHY_INTERFACE_MODE_NA:
284 case PHY_INTERFACE_MODE_MAX:
285 /* No idea! Garbage in, unknown out */
286 return SPEED_UNKNOWN;
287 }
288
289 /* If we get here, someone forgot to add an interface mode above */
290 WARN_ON_ONCE(1);
291 return SPEED_UNKNOWN;
292 }
293
294 /**
295 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
296 * @linkmodes: ethtool linkmode mask (must be already initialised)
297 * @caps: bitmask of MAC capabilities
298 *
299 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
300 * supported by the @caps. @linkmodes must have been initialised previously.
301 */
302 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
303 unsigned long caps)
304 {
305 if (caps & MAC_SYM_PAUSE)
306 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
307
308 if (caps & MAC_ASYM_PAUSE)
309 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
310
311 if (caps & MAC_10HD) {
312 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
313 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
314 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
315 }
316
317 if (caps & MAC_10FD) {
318 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
319 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
320 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
321 }
322
323 if (caps & MAC_100HD) {
324 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
325 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
326 }
327
328 if (caps & MAC_100FD) {
329 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
330 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
332 }
333
334 if (caps & MAC_1000HD)
335 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
336
337 if (caps & MAC_1000FD) {
338 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
339 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
340 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
341 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
342 }
343
344 if (caps & MAC_2500FD) {
345 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
346 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
347 }
348
349 if (caps & MAC_5000FD)
350 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
351
352 if (caps & MAC_10000FD) {
353 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
355 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
356 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
358 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
359 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
360 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
361 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
362 }
363
364 if (caps & MAC_25000FD) {
365 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
366 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
367 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
368 }
369
370 if (caps & MAC_40000FD) {
371 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
372 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
373 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
374 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
375 }
376
377 if (caps & MAC_50000FD) {
378 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
379 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
380 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
381 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
382 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
383 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
384 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
385 linkmodes);
386 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
387 }
388
389 if (caps & MAC_56000FD) {
390 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
391 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
392 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
393 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
394 }
395
396 if (caps & MAC_100000FD) {
397 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
398 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
399 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
400 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
401 linkmodes);
402 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
403 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
404 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
405 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
406 linkmodes);
407 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
408 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
409 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
410 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
411 linkmodes);
412 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
413 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
414 }
415
416 if (caps & MAC_200000FD) {
417 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
418 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
419 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
420 linkmodes);
421 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
422 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
423 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
424 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
425 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
426 linkmodes);
427 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
428 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
429 }
430
431 if (caps & MAC_400000FD) {
432 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
433 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
434 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
435 linkmodes);
436 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
437 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
438 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
439 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
440 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
441 linkmodes);
442 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
443 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
444 }
445 }
446
447 static struct {
448 unsigned long mask;
449 int speed;
450 unsigned int duplex;
451 } phylink_caps_params[] = {
452 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
453 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
454 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
455 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
456 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
457 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
458 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
459 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
460 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
461 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
462 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
463 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
464 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
465 { MAC_100FD, SPEED_100, DUPLEX_FULL },
466 { MAC_100HD, SPEED_100, DUPLEX_HALF },
467 { MAC_10FD, SPEED_10, DUPLEX_FULL },
468 { MAC_10HD, SPEED_10, DUPLEX_HALF },
469 };
470
471 /**
472 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
473 * @config: pointer to a &struct phylink_config
474 * @max_speed: maximum speed
475 *
476 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
477 * Any further motifications of config.mac_capabilities will override this.
478 */
479 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
480 {
481 int i;
482
483 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
484 phylink_caps_params[i].speed > max_speed; i++)
485 config->mac_capabilities &= ~phylink_caps_params[i].mask;
486 }
487 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
488
489 /**
490 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
491 * @speed: the speed to search for
492 * @duplex: the duplex to search for
493 *
494 * Find the mac capability for a given speed and duplex.
495 *
496 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
497 * there were no matches.
498 */
499 static unsigned long phylink_cap_from_speed_duplex(int speed,
500 unsigned int duplex)
501 {
502 int i;
503
504 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
505 if (speed == phylink_caps_params[i].speed &&
506 duplex == phylink_caps_params[i].duplex)
507 return phylink_caps_params[i].mask;
508 }
509
510 return 0;
511 }
512
513 /**
514 * phylink_get_capabilities() - get capabilities for a given MAC
515 * @interface: phy interface mode defined by &typedef phy_interface_t
516 * @mac_capabilities: bitmask of MAC capabilities
517 * @rate_matching: type of rate matching being performed
518 *
519 * Get the MAC capabilities that are supported by the @interface mode and
520 * @mac_capabilities.
521 */
522 static unsigned long phylink_get_capabilities(phy_interface_t interface,
523 unsigned long mac_capabilities,
524 int rate_matching)
525 {
526 int max_speed = phylink_interface_max_speed(interface);
527 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
528 unsigned long matched_caps = 0;
529
530 switch (interface) {
531 case PHY_INTERFACE_MODE_USXGMII:
532 caps |= MAC_10000FD | MAC_5000FD;
533 fallthrough;
534
535 case PHY_INTERFACE_MODE_10G_QXGMII:
536 caps |= MAC_2500FD;
537 fallthrough;
538
539 case PHY_INTERFACE_MODE_RGMII_TXID:
540 case PHY_INTERFACE_MODE_RGMII_RXID:
541 case PHY_INTERFACE_MODE_RGMII_ID:
542 case PHY_INTERFACE_MODE_RGMII:
543 case PHY_INTERFACE_MODE_PSGMII:
544 case PHY_INTERFACE_MODE_QSGMII:
545 case PHY_INTERFACE_MODE_QUSGMII:
546 case PHY_INTERFACE_MODE_SGMII:
547 case PHY_INTERFACE_MODE_GMII:
548 caps |= MAC_1000HD | MAC_1000FD;
549 fallthrough;
550
551 case PHY_INTERFACE_MODE_REVRMII:
552 case PHY_INTERFACE_MODE_RMII:
553 case PHY_INTERFACE_MODE_SMII:
554 case PHY_INTERFACE_MODE_REVMII:
555 case PHY_INTERFACE_MODE_MII:
556 caps |= MAC_10HD | MAC_10FD;
557 fallthrough;
558
559 case PHY_INTERFACE_MODE_100BASEX:
560 caps |= MAC_100HD | MAC_100FD;
561 break;
562
563 case PHY_INTERFACE_MODE_TBI:
564 case PHY_INTERFACE_MODE_MOCA:
565 case PHY_INTERFACE_MODE_RTBI:
566 case PHY_INTERFACE_MODE_1000BASEX:
567 caps |= MAC_1000HD;
568 fallthrough;
569 case PHY_INTERFACE_MODE_1000BASEKX:
570 case PHY_INTERFACE_MODE_TRGMII:
571 caps |= MAC_1000FD;
572 break;
573
574 case PHY_INTERFACE_MODE_2500BASEX:
575 caps |= MAC_2500FD;
576 break;
577
578 case PHY_INTERFACE_MODE_5GBASER:
579 caps |= MAC_5000FD;
580 break;
581
582 case PHY_INTERFACE_MODE_XGMII:
583 case PHY_INTERFACE_MODE_RXAUI:
584 case PHY_INTERFACE_MODE_XAUI:
585 case PHY_INTERFACE_MODE_10GBASER:
586 case PHY_INTERFACE_MODE_10GKR:
587 caps |= MAC_10000FD;
588 break;
589
590 case PHY_INTERFACE_MODE_25GBASER:
591 caps |= MAC_25000FD;
592 break;
593
594 case PHY_INTERFACE_MODE_XLGMII:
595 caps |= MAC_40000FD;
596 break;
597
598 case PHY_INTERFACE_MODE_INTERNAL:
599 caps |= ~0;
600 break;
601
602 case PHY_INTERFACE_MODE_NA:
603 case PHY_INTERFACE_MODE_MAX:
604 break;
605 }
606
607 switch (rate_matching) {
608 case RATE_MATCH_OPEN_LOOP:
609 /* TODO */
610 fallthrough;
611 case RATE_MATCH_NONE:
612 matched_caps = 0;
613 break;
614 case RATE_MATCH_PAUSE: {
615 /* The MAC must support asymmetric pause towards the local
616 * device for this. We could allow just symmetric pause, but
617 * then we might have to renegotiate if the link partner
618 * doesn't support pause. This is because there's no way to
619 * accept pause frames without transmitting them if we only
620 * support symmetric pause.
621 */
622 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
623 !(mac_capabilities & MAC_ASYM_PAUSE))
624 break;
625
626 /* We can't adapt if the MAC doesn't support the interface's
627 * max speed at full duplex.
628 */
629 if (mac_capabilities &
630 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
631 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
632 break;
633 }
634 case RATE_MATCH_CRS:
635 /* The MAC must support half duplex at the interface's max
636 * speed.
637 */
638 if (mac_capabilities &
639 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
640 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
641 matched_caps &= mac_capabilities;
642 }
643 break;
644 }
645
646 return (caps & mac_capabilities) | matched_caps;
647 }
648
649 /**
650 * phylink_validate_mask_caps() - Restrict link modes based on caps
651 * @supported: ethtool bitmask for supported link modes.
652 * @state: pointer to a &struct phylink_link_state.
653 * @mac_capabilities: bitmask of MAC capabilities
654 *
655 * Calculate the supported link modes based on @mac_capabilities, and restrict
656 * @supported and @state based on that. Use this function if your capabiliies
657 * aren't constant, such as if they vary depending on the interface.
658 */
659 static void phylink_validate_mask_caps(unsigned long *supported,
660 struct phylink_link_state *state,
661 unsigned long mac_capabilities)
662 {
663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
664 unsigned long caps;
665
666 phylink_set_port_modes(mask);
667 phylink_set(mask, Autoneg);
668 caps = phylink_get_capabilities(state->interface, mac_capabilities,
669 state->rate_matching);
670 phylink_caps_to_linkmodes(mask, caps);
671
672 linkmode_and(supported, supported, mask);
673 linkmode_and(state->advertising, state->advertising, mask);
674 }
675
676 static int phylink_validate_mac_and_pcs(struct phylink *pl,
677 unsigned long *supported,
678 struct phylink_link_state *state)
679 {
680 struct phylink_pcs *pcs = NULL;
681 unsigned long capabilities;
682 int ret;
683
684 /* Get the PCS for this interface mode */
685 if (pl->mac_ops->mac_select_pcs) {
686 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
687 if (IS_ERR(pcs))
688 return PTR_ERR(pcs);
689 }
690
691 if (pcs) {
692 /* The PCS, if present, must be setup before phylink_create()
693 * has been called. If the ops is not initialised, print an
694 * error and backtrace rather than oopsing the kernel.
695 */
696 if (!pcs->ops) {
697 phylink_err(pl, "interface %s: uninitialised PCS\n",
698 phy_modes(state->interface));
699 dump_stack();
700 return -EINVAL;
701 }
702
703 /* Ensure that this PCS supports the interface which the MAC
704 * returned it for. It is an error for the MAC to return a PCS
705 * that does not support the interface mode.
706 */
707 if (!phy_interface_empty(pcs->supported_interfaces) &&
708 !test_bit(state->interface, pcs->supported_interfaces)) {
709 phylink_err(pl, "MAC returned PCS which does not support %s\n",
710 phy_modes(state->interface));
711 return -EINVAL;
712 }
713
714 /* Validate the link parameters with the PCS */
715 if (pcs->ops->pcs_validate) {
716 ret = pcs->ops->pcs_validate(pcs, supported, state);
717 if (ret < 0 || phylink_is_empty_linkmode(supported))
718 return -EINVAL;
719
720 /* Ensure the advertising mask is a subset of the
721 * supported mask.
722 */
723 linkmode_and(state->advertising, state->advertising,
724 supported);
725 }
726 }
727
728 /* Then validate the link parameters with the MAC */
729 if (pl->mac_ops->mac_get_caps)
730 capabilities = pl->mac_ops->mac_get_caps(pl->config,
731 state->interface);
732 else
733 capabilities = pl->config->mac_capabilities;
734
735 phylink_validate_mask_caps(supported, state, capabilities);
736
737 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
738 }
739
740 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
741 const unsigned long *supported,
742 const struct phylink_link_state *state,
743 phy_interface_t interface,
744 unsigned long *accum_supported,
745 unsigned long *accum_advertising)
746 {
747 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
748 struct phylink_link_state tmp_state;
749
750 linkmode_copy(tmp_supported, supported);
751
752 tmp_state = *state;
753 tmp_state.interface = interface;
754
755 if (phy)
756 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
757
758 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
759 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
760 interface, phy_modes(interface),
761 phy_rate_matching_to_str(tmp_state.rate_matching),
762 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
763
764 linkmode_or(accum_supported, accum_supported, tmp_supported);
765 linkmode_or(accum_advertising, accum_advertising,
766 tmp_state.advertising);
767 }
768 }
769
770 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
771 unsigned long *supported,
772 struct phylink_link_state *state,
773 const unsigned long *interfaces)
774 {
775 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
776 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
777 int interface;
778
779 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
780 phylink_validate_one(pl, phy, supported, state, interface,
781 all_s, all_adv);
782
783 linkmode_copy(supported, all_s);
784 linkmode_copy(state->advertising, all_adv);
785
786 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
787 }
788
789 static int phylink_validate(struct phylink *pl, unsigned long *supported,
790 struct phylink_link_state *state)
791 {
792 const unsigned long *interfaces = pl->config->supported_interfaces;
793
794 if (state->interface == PHY_INTERFACE_MODE_NA)
795 return phylink_validate_mask(pl, NULL, supported, state,
796 interfaces);
797
798 if (!test_bit(state->interface, interfaces))
799 return -EINVAL;
800
801 return phylink_validate_mac_and_pcs(pl, supported, state);
802 }
803
804 static int phylink_parse_fixedlink(struct phylink *pl,
805 const struct fwnode_handle *fwnode)
806 {
807 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
808 struct fwnode_handle *fixed_node;
809 const struct phy_setting *s;
810 struct gpio_desc *desc;
811 u32 speed;
812 int ret;
813
814 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
815 if (fixed_node) {
816 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
817
818 pl->link_config.speed = speed;
819 pl->link_config.duplex = DUPLEX_HALF;
820
821 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
822 pl->link_config.duplex = DUPLEX_FULL;
823
824 /* We treat the "pause" and "asym-pause" terminology as
825 * defining the link partner's ability.
826 */
827 if (fwnode_property_read_bool(fixed_node, "pause"))
828 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
829 pl->link_config.lp_advertising);
830 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
831 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
832 pl->link_config.lp_advertising);
833
834 if (ret == 0) {
835 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
836 GPIOD_IN, "?");
837
838 if (!IS_ERR(desc))
839 pl->link_gpio = desc;
840 else if (desc == ERR_PTR(-EPROBE_DEFER))
841 ret = -EPROBE_DEFER;
842 }
843 fwnode_handle_put(fixed_node);
844
845 if (ret)
846 return ret;
847 } else {
848 u32 prop[5];
849
850 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
851 NULL, 0);
852 if (ret != ARRAY_SIZE(prop)) {
853 phylink_err(pl, "broken fixed-link?\n");
854 return -EINVAL;
855 }
856
857 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
858 prop, ARRAY_SIZE(prop));
859 if (!ret) {
860 pl->link_config.duplex = prop[1] ?
861 DUPLEX_FULL : DUPLEX_HALF;
862 pl->link_config.speed = prop[2];
863 if (prop[3])
864 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
865 pl->link_config.lp_advertising);
866 if (prop[4])
867 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
868 pl->link_config.lp_advertising);
869 }
870 }
871
872 if (pl->link_config.speed > SPEED_1000 &&
873 pl->link_config.duplex != DUPLEX_FULL)
874 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
875 pl->link_config.speed);
876
877 linkmode_fill(pl->supported);
878 linkmode_copy(pl->link_config.advertising, pl->supported);
879 phylink_validate(pl, pl->supported, &pl->link_config);
880
881 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
882 pl->supported, true);
883
884 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
885 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
886 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
887 linkmode_and(pl->supported, pl->supported, mask);
888
889 phylink_set(pl->supported, MII);
890
891 if (s) {
892 __set_bit(s->bit, pl->supported);
893 __set_bit(s->bit, pl->link_config.lp_advertising);
894 } else {
895 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
896 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
897 pl->link_config.speed);
898 }
899
900 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
901 pl->supported);
902
903 pl->link_config.link = 1;
904 pl->link_config.an_complete = 1;
905
906 return 0;
907 }
908
909 static int phylink_parse_mode(struct phylink *pl,
910 const struct fwnode_handle *fwnode)
911 {
912 struct fwnode_handle *dn;
913 const char *managed;
914 unsigned long caps;
915
916 if (pl->config->default_an_inband)
917 pl->cfg_link_an_mode = MLO_AN_INBAND;
918
919 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
920 if (dn || fwnode_property_present(fwnode, "fixed-link"))
921 pl->cfg_link_an_mode = MLO_AN_FIXED;
922 fwnode_handle_put(dn);
923
924 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
925 strcmp(managed, "in-band-status") == 0)) {
926 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
927 phylink_err(pl,
928 "can't use both fixed-link and in-band-status\n");
929 return -EINVAL;
930 }
931
932 pl->cfg_link_an_mode = MLO_AN_INBAND;
933 }
934
935 if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
936 linkmode_zero(pl->supported);
937 phylink_set(pl->supported, MII);
938 phylink_set(pl->supported, Autoneg);
939 phylink_set(pl->supported, Asym_Pause);
940 phylink_set(pl->supported, Pause);
941
942 switch (pl->link_config.interface) {
943 case PHY_INTERFACE_MODE_SGMII:
944 case PHY_INTERFACE_MODE_PSGMII:
945 case PHY_INTERFACE_MODE_QSGMII:
946 case PHY_INTERFACE_MODE_QUSGMII:
947 case PHY_INTERFACE_MODE_RGMII:
948 case PHY_INTERFACE_MODE_RGMII_ID:
949 case PHY_INTERFACE_MODE_RGMII_RXID:
950 case PHY_INTERFACE_MODE_RGMII_TXID:
951 case PHY_INTERFACE_MODE_RTBI:
952 case PHY_INTERFACE_MODE_1000BASEX:
953 case PHY_INTERFACE_MODE_2500BASEX:
954 case PHY_INTERFACE_MODE_5GBASER:
955 case PHY_INTERFACE_MODE_25GBASER:
956 case PHY_INTERFACE_MODE_USXGMII:
957 case PHY_INTERFACE_MODE_10G_QXGMII:
958 case PHY_INTERFACE_MODE_10GKR:
959 case PHY_INTERFACE_MODE_10GBASER:
960 case PHY_INTERFACE_MODE_XLGMII:
961 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
962 caps = phylink_get_capabilities(pl->link_config.interface, caps,
963 RATE_MATCH_NONE);
964 phylink_caps_to_linkmodes(pl->supported, caps);
965 break;
966
967 default:
968 phylink_err(pl,
969 "incorrect link mode %s for in-band status\n",
970 phy_modes(pl->link_config.interface));
971 return -EINVAL;
972 }
973
974 linkmode_copy(pl->link_config.advertising, pl->supported);
975
976 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
977 phylink_err(pl,
978 "failed to validate link configuration for in-band status\n");
979 return -EINVAL;
980 }
981 }
982
983 return 0;
984 }
985
986 static void phylink_apply_manual_flow(struct phylink *pl,
987 struct phylink_link_state *state)
988 {
989 /* If autoneg is disabled, pause AN is also disabled */
990 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
991 state->advertising))
992 state->pause &= ~MLO_PAUSE_AN;
993
994 /* Manual configuration of pause modes */
995 if (!(pl->link_config.pause & MLO_PAUSE_AN))
996 state->pause = pl->link_config.pause;
997 }
998
999 static void phylink_resolve_an_pause(struct phylink_link_state *state)
1000 {
1001 bool tx_pause, rx_pause;
1002
1003 if (state->duplex == DUPLEX_FULL) {
1004 linkmode_resolve_pause(state->advertising,
1005 state->lp_advertising,
1006 &tx_pause, &rx_pause);
1007 if (tx_pause)
1008 state->pause |= MLO_PAUSE_TX;
1009 if (rx_pause)
1010 state->pause |= MLO_PAUSE_RX;
1011 }
1012 }
1013
1014 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
1015 phy_interface_t interface)
1016 {
1017 if (pcs && pcs->ops->pcs_inband_caps)
1018 return pcs->ops->pcs_inband_caps(pcs, interface);
1019
1020 return 0;
1021 }
1022
1023 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
1024 phy_interface_t interface)
1025 {
1026 if (pcs && pcs->ops->pcs_pre_config)
1027 pcs->ops->pcs_pre_config(pcs, interface);
1028 }
1029
1030 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
1031 phy_interface_t interface)
1032 {
1033 int err = 0;
1034
1035 if (pcs && pcs->ops->pcs_post_config)
1036 err = pcs->ops->pcs_post_config(pcs, interface);
1037
1038 return err;
1039 }
1040
1041 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1042 {
1043 if (pcs && pcs->ops->pcs_disable)
1044 pcs->ops->pcs_disable(pcs);
1045 }
1046
1047 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1048 {
1049 int err = 0;
1050
1051 if (pcs && pcs->ops->pcs_enable)
1052 err = pcs->ops->pcs_enable(pcs);
1053
1054 return err;
1055 }
1056
1057 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1058 const struct phylink_link_state *state,
1059 bool permit_pause_to_mac)
1060 {
1061 if (!pcs)
1062 return 0;
1063
1064 return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1065 state->advertising, permit_pause_to_mac);
1066 }
1067
1068 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1069 phy_interface_t interface, int speed,
1070 int duplex)
1071 {
1072 if (pcs && pcs->ops->pcs_link_up)
1073 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1074 }
1075
1076 /* Query inband for a specific interface mode, asking the MAC for the
1077 * PCS which will be used to handle the interface mode.
1078 */
1079 static unsigned int phylink_inband_caps(struct phylink *pl,
1080 phy_interface_t interface)
1081 {
1082 struct phylink_pcs *pcs;
1083
1084 if (!pl->mac_ops->mac_select_pcs)
1085 return 0;
1086
1087 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
1088 if (!pcs)
1089 return 0;
1090
1091 return phylink_pcs_inband_caps(pcs, interface);
1092 }
1093
1094 static void phylink_pcs_poll_stop(struct phylink *pl)
1095 {
1096 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1097 del_timer(&pl->link_poll);
1098 }
1099
1100 static void phylink_pcs_poll_start(struct phylink *pl)
1101 {
1102 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1103 mod_timer(&pl->link_poll, jiffies + HZ);
1104 }
1105
1106 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1107 {
1108 int ret = 0;
1109
1110 /* Signal to PCS driver that MAC requires RX clock for init */
1111 if (pl->config->mac_requires_rxc)
1112 pcs->rxc_always_on = true;
1113
1114 if (pcs->ops->pcs_pre_init)
1115 ret = pcs->ops->pcs_pre_init(pcs);
1116
1117 return ret;
1118 }
1119 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1120
1121 static void phylink_mac_config(struct phylink *pl,
1122 const struct phylink_link_state *state)
1123 {
1124 struct phylink_link_state st = *state;
1125
1126 /* Stop drivers incorrectly using these */
1127 linkmode_zero(st.lp_advertising);
1128 st.speed = SPEED_UNKNOWN;
1129 st.duplex = DUPLEX_UNKNOWN;
1130 st.an_complete = false;
1131 st.link = false;
1132
1133 phylink_dbg(pl,
1134 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1135 __func__, phylink_an_mode_str(pl->act_link_an_mode),
1136 phy_modes(st.interface),
1137 phy_rate_matching_to_str(st.rate_matching),
1138 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1139 st.pause);
1140
1141 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1142 }
1143
1144 static void phylink_pcs_an_restart(struct phylink *pl)
1145 {
1146 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1147 pl->link_config.advertising) &&
1148 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1149 phylink_autoneg_inband(pl->act_link_an_mode))
1150 pl->pcs->ops->pcs_an_restart(pl->pcs);
1151 }
1152
1153 /**
1154 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1155 * @pl: a pointer to a &struct phylink returned from phylink_create()
1156 * @pcs: a pointer to &struct phylink_pcs
1157 * @interface: interface mode to be used
1158 * @advertising: adertisement ethtool link mode mask
1159 *
1160 * Determines the negotiation mode to be used by the PCS, and returns
1161 * one of:
1162 *
1163 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1164 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1165 * will be used.
1166 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1167 * disabled
1168 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1169 *
1170 * Note: this is for cases where the PCS itself is involved in negotiation
1171 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1172 */
1173 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1174 phy_interface_t interface,
1175 const unsigned long *advertising)
1176 {
1177 unsigned int pcs_ib_caps = 0;
1178 unsigned int phy_ib_caps = 0;
1179 unsigned int neg_mode, mode;
1180 enum {
1181 INBAND_CISCO_SGMII,
1182 INBAND_BASEX,
1183 } type;
1184
1185 mode = pl->req_link_an_mode;
1186
1187 pl->phy_ib_mode = 0;
1188
1189 switch (interface) {
1190 case PHY_INTERFACE_MODE_SGMII:
1191 case PHY_INTERFACE_MODE_QSGMII:
1192 case PHY_INTERFACE_MODE_QUSGMII:
1193 case PHY_INTERFACE_MODE_USXGMII:
1194 case PHY_INTERFACE_MODE_10G_QXGMII:
1195 /* These protocols are designed for use with a PHY which
1196 * communicates its negotiation result back to the MAC via
1197 * inband communication. Note: there exist PHYs that run
1198 * with SGMII but do not send the inband data.
1199 */
1200 type = INBAND_CISCO_SGMII;
1201 break;
1202
1203 case PHY_INTERFACE_MODE_1000BASEX:
1204 case PHY_INTERFACE_MODE_2500BASEX:
1205 /* 1000base-X is designed for use media-side for Fibre
1206 * connections, and thus the Autoneg bit needs to be
1207 * taken into account. We also do this for 2500base-X
1208 * as well, but drivers may not support this, so may
1209 * need to override this.
1210 */
1211 type = INBAND_BASEX;
1212 break;
1213
1214 default:
1215 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1216 pl->act_link_an_mode = mode;
1217 return;
1218 }
1219
1220 if (pcs)
1221 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1222
1223 if (pl->phydev)
1224 phy_ib_caps = phy_inband_caps(pl->phydev, interface);
1225
1226 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1227 phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1228
1229 if (!phylink_autoneg_inband(mode)) {
1230 bool pcs_ib_only = false;
1231 bool phy_ib_only = false;
1232
1233 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1234 /* PCS supports reporting in-band capabilities, and
1235 * supports more than disable mode.
1236 */
1237 if (pcs_ib_caps & LINK_INBAND_DISABLE)
1238 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1239 else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1240 pcs_ib_only = true;
1241 }
1242
1243 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1244 /* PHY supports in-band capabilities, and supports
1245 * more than disable mode.
1246 */
1247 if (phy_ib_caps & LINK_INBAND_DISABLE)
1248 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1249 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1250 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1251 else if (phy_ib_caps & LINK_INBAND_ENABLE)
1252 phy_ib_only = true;
1253 }
1254
1255 /* If either the PCS or PHY requires inband to be enabled,
1256 * this is an invalid configuration. Provide a diagnostic
1257 * message for this case, but don't try to force the issue.
1258 */
1259 if (pcs_ib_only || phy_ib_only)
1260 phylink_warn(pl,
1261 "firmware wants %s mode, but %s%s%s requires inband\n",
1262 phylink_an_mode_str(mode),
1263 pcs_ib_only ? "PCS" : "",
1264 pcs_ib_only && phy_ib_only ? " and " : "",
1265 phy_ib_only ? "PHY" : "");
1266
1267 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1268 } else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1269 /* For SGMII modes which are designed to be used with PHYs, or
1270 * Base-X with a PHY, we try to use in-band mode where-ever
1271 * possible. However, there are some PHYs e.g. BCM84881 which
1272 * do not support in-band.
1273 */
1274 const unsigned int inband_ok = LINK_INBAND_ENABLE |
1275 LINK_INBAND_BYPASS;
1276 const unsigned int outband_ok = LINK_INBAND_DISABLE |
1277 LINK_INBAND_BYPASS;
1278 /* PCS PHY
1279 * D E D E
1280 * 0 0 0 0 no information inband enabled
1281 * 1 0 0 0 pcs doesn't support outband
1282 * 0 1 0 0 pcs required inband enabled
1283 * 1 1 0 0 pcs optional inband enabled
1284 * 0 0 1 0 phy doesn't support outband
1285 * 1 0 1 0 pcs+phy doesn't support outband
1286 * 0 1 1 0 pcs required, phy doesn't support, invalid
1287 * 1 1 1 0 pcs optional, phy doesn't support, outband
1288 * 0 0 0 1 phy required inband enabled
1289 * 1 0 0 1 pcs doesn't support, phy required, invalid
1290 * 0 1 0 1 pcs+phy required inband enabled
1291 * 1 1 0 1 pcs optional, phy required inband enabled
1292 * 0 0 1 1 phy optional inband enabled
1293 * 1 0 1 1 pcs doesn't support, phy optional, outband
1294 * 0 1 1 1 pcs required, phy optional inband enabled
1295 * 1 1 1 1 pcs+phy optional inband enabled
1296 */
1297 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1298 (!phy_ib_caps || phy_ib_caps & inband_ok)) {
1299 /* In-band supported or unknown at both ends. Enable
1300 * in-band mode with or without bypass at the PHY.
1301 */
1302 if (phy_ib_caps & LINK_INBAND_ENABLE)
1303 pl->phy_ib_mode = LINK_INBAND_ENABLE;
1304 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1305 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1306
1307 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1308 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1309 (!phy_ib_caps || phy_ib_caps & outband_ok)) {
1310 /* Either in-band not supported at at least one end.
1311 * In-band bypass at the other end is possible.
1312 */
1313 if (phy_ib_caps & LINK_INBAND_DISABLE)
1314 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1315 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1316 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1317
1318 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1319 if (pl->phydev)
1320 mode = MLO_AN_PHY;
1321 } else {
1322 /* invalid */
1323 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1324 phy_modes(interface));
1325 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1326 }
1327 } else {
1328 /* For Base-X without a PHY */
1329 if (pcs_ib_caps == LINK_INBAND_DISABLE)
1330 /* If the PCS doesn't support inband, then inband must
1331 * be disabled.
1332 */
1333 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1334 else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1335 /* If the PCS requires inband, then inband must always
1336 * be enabled.
1337 */
1338 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1339 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1340 advertising))
1341 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1342 else
1343 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1344 }
1345
1346 pl->pcs_neg_mode = neg_mode;
1347 pl->act_link_an_mode = mode;
1348 }
1349
1350 static void phylink_major_config(struct phylink *pl, bool restart,
1351 const struct phylink_link_state *state)
1352 {
1353 struct phylink_pcs *pcs = NULL;
1354 bool pcs_changed = false;
1355 unsigned int rate_kbd;
1356 unsigned int neg_mode;
1357 int err;
1358
1359 phylink_dbg(pl, "major config, requested %s/%s\n",
1360 phylink_an_mode_str(pl->req_link_an_mode),
1361 phy_modes(state->interface));
1362
1363 if (pl->mac_ops->mac_select_pcs) {
1364 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1365 if (IS_ERR(pcs)) {
1366 phylink_err(pl,
1367 "mac_select_pcs unexpectedly failed: %pe\n",
1368 pcs);
1369 return;
1370 }
1371
1372 pcs_changed = pl->pcs != pcs;
1373 }
1374
1375 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
1376
1377 phylink_dbg(pl, "major config, active %s/%s/%s\n",
1378 phylink_an_mode_str(pl->act_link_an_mode),
1379 phylink_pcs_mode_str(pl->pcs_neg_mode),
1380 phy_modes(state->interface));
1381
1382 phylink_pcs_poll_stop(pl);
1383
1384 if (pl->mac_ops->mac_prepare) {
1385 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1386 state->interface);
1387 if (err < 0) {
1388 phylink_err(pl, "mac_prepare failed: %pe\n",
1389 ERR_PTR(err));
1390 return;
1391 }
1392 }
1393
1394 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1395 * for the change.
1396 */
1397 if (pcs_changed) {
1398 phylink_pcs_disable(pl->pcs);
1399
1400 if (pl->pcs)
1401 pl->pcs->phylink = NULL;
1402
1403 pcs->phylink = pl;
1404
1405 pl->pcs = pcs;
1406 }
1407
1408 if (pl->pcs)
1409 phylink_pcs_pre_config(pl->pcs, state->interface);
1410
1411 phylink_mac_config(pl, state);
1412
1413 if (pl->pcs)
1414 phylink_pcs_post_config(pl->pcs, state->interface);
1415
1416 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1417 phylink_pcs_enable(pl->pcs);
1418
1419 neg_mode = pl->act_link_an_mode;
1420 if (pl->pcs && pl->pcs->neg_mode)
1421 neg_mode = pl->pcs_neg_mode;
1422
1423 err = phylink_pcs_config(pl->pcs, neg_mode, state,
1424 !!(pl->link_config.pause & MLO_PAUSE_AN));
1425 if (err < 0)
1426 phylink_err(pl, "pcs_config failed: %pe\n",
1427 ERR_PTR(err));
1428 else if (err > 0)
1429 restart = true;
1430
1431 if (restart)
1432 phylink_pcs_an_restart(pl);
1433
1434 if (pl->mac_ops->mac_finish) {
1435 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1436 state->interface);
1437 if (err < 0)
1438 phylink_err(pl, "mac_finish failed: %pe\n",
1439 ERR_PTR(err));
1440 }
1441
1442 if (pl->phydev && pl->phy_ib_mode) {
1443 err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
1444 if (err < 0)
1445 phylink_err(pl, "phy_config_inband: %pe\n",
1446 ERR_PTR(err));
1447 }
1448
1449 if (pl->sfp_bus) {
1450 rate_kbd = phylink_interface_signal_rate(state->interface);
1451 if (rate_kbd)
1452 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1453 }
1454
1455 phylink_pcs_poll_start(pl);
1456 }
1457
1458 /*
1459 * Reconfigure for a change of inband advertisement.
1460 * If we have a separate PCS, we only need to call its pcs_config() method,
1461 * and then restart AN if it indicates something changed. Otherwise, we do
1462 * the full MAC reconfiguration.
1463 */
1464 static int phylink_change_inband_advert(struct phylink *pl)
1465 {
1466 unsigned int neg_mode;
1467 int ret;
1468
1469 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1470 return 0;
1471
1472 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1473 phylink_an_mode_str(pl->req_link_an_mode),
1474 phy_modes(pl->link_config.interface),
1475 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1476 pl->link_config.pause);
1477
1478 /* Recompute the PCS neg mode */
1479 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
1480 pl->link_config.advertising);
1481
1482 neg_mode = pl->act_link_an_mode;
1483 if (pl->pcs->neg_mode)
1484 neg_mode = pl->pcs_neg_mode;
1485
1486 /* Modern PCS-based method; update the advert at the PCS, and
1487 * restart negotiation if the pcs_config() helper indicates that
1488 * the programmed advertisement has changed.
1489 */
1490 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1491 !!(pl->link_config.pause & MLO_PAUSE_AN));
1492 if (ret < 0)
1493 return ret;
1494
1495 if (ret > 0)
1496 phylink_pcs_an_restart(pl);
1497
1498 return 0;
1499 }
1500
1501 static void phylink_mac_pcs_get_state(struct phylink *pl,
1502 struct phylink_link_state *state)
1503 {
1504 struct phylink_pcs *pcs;
1505 bool autoneg;
1506
1507 linkmode_copy(state->advertising, pl->link_config.advertising);
1508 linkmode_zero(state->lp_advertising);
1509 state->interface = pl->link_config.interface;
1510 state->rate_matching = pl->link_config.rate_matching;
1511 state->an_complete = 0;
1512 state->link = 1;
1513
1514 pcs = pl->pcs;
1515 if (!pcs || pcs->neg_mode)
1516 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1517 else
1518 autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1519 state->advertising);
1520
1521 if (autoneg) {
1522 state->speed = SPEED_UNKNOWN;
1523 state->duplex = DUPLEX_UNKNOWN;
1524 state->pause = MLO_PAUSE_NONE;
1525 } else {
1526 state->speed = pl->link_config.speed;
1527 state->duplex = pl->link_config.duplex;
1528 state->pause = pl->link_config.pause;
1529 }
1530
1531 if (pcs)
1532 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1533 else
1534 state->link = 0;
1535 }
1536
1537 /* The fixed state is... fixed except for the link state,
1538 * which may be determined by a GPIO or a callback.
1539 */
1540 static void phylink_get_fixed_state(struct phylink *pl,
1541 struct phylink_link_state *state)
1542 {
1543 *state = pl->link_config;
1544 if (pl->config->get_fixed_state)
1545 pl->config->get_fixed_state(pl->config, state);
1546 else if (pl->link_gpio)
1547 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1548
1549 state->pause = MLO_PAUSE_NONE;
1550 phylink_resolve_an_pause(state);
1551 }
1552
1553 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1554 {
1555 struct phylink_link_state link_state;
1556
1557 switch (pl->req_link_an_mode) {
1558 case MLO_AN_PHY:
1559 link_state = pl->phy_state;
1560 break;
1561
1562 case MLO_AN_FIXED:
1563 phylink_get_fixed_state(pl, &link_state);
1564 break;
1565
1566 case MLO_AN_INBAND:
1567 link_state = pl->link_config;
1568 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1569 link_state.pause = MLO_PAUSE_NONE;
1570 break;
1571
1572 default: /* can't happen */
1573 return;
1574 }
1575
1576 link_state.link = false;
1577
1578 phylink_apply_manual_flow(pl, &link_state);
1579 phylink_major_config(pl, force_restart, &link_state);
1580 }
1581
1582 static const char *phylink_pause_to_str(int pause)
1583 {
1584 switch (pause & MLO_PAUSE_TXRX_MASK) {
1585 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1586 return "rx/tx";
1587 case MLO_PAUSE_TX:
1588 return "tx";
1589 case MLO_PAUSE_RX:
1590 return "rx";
1591 default:
1592 return "off";
1593 }
1594 }
1595
1596 static void phylink_deactivate_lpi(struct phylink *pl)
1597 {
1598 if (pl->mac_enable_tx_lpi) {
1599 pl->mac_enable_tx_lpi = false;
1600
1601 phylink_dbg(pl, "disabling LPI\n");
1602
1603 pl->mac_ops->mac_disable_tx_lpi(pl->config);
1604 }
1605 }
1606
1607 static void phylink_activate_lpi(struct phylink *pl)
1608 {
1609 int err;
1610
1611 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1612 phylink_dbg(pl, "MAC does not support LPI with %s\n",
1613 phy_modes(pl->cur_interface));
1614 return;
1615 }
1616
1617 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1618 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1619
1620 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1621 pl->mac_tx_clk_stop);
1622 if (!err)
1623 pl->mac_enable_tx_lpi = true;
1624 else
1625 phylink_err(pl, "%ps() failed: %pe\n",
1626 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1627 }
1628
1629 static void phylink_link_up(struct phylink *pl,
1630 struct phylink_link_state link_state)
1631 {
1632 struct net_device *ndev = pl->netdev;
1633 unsigned int neg_mode;
1634 int speed, duplex;
1635 bool rx_pause;
1636
1637 speed = link_state.speed;
1638 duplex = link_state.duplex;
1639 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1640
1641 switch (link_state.rate_matching) {
1642 case RATE_MATCH_PAUSE:
1643 /* The PHY is doing rate matchion from the media rate (in
1644 * the link_state) to the interface speed, and will send
1645 * pause frames to the MAC to limit its transmission speed.
1646 */
1647 speed = phylink_interface_max_speed(link_state.interface);
1648 duplex = DUPLEX_FULL;
1649 rx_pause = true;
1650 break;
1651
1652 case RATE_MATCH_CRS:
1653 /* The PHY is doing rate matchion from the media rate (in
1654 * the link_state) to the interface speed, and will cause
1655 * collisions to the MAC to limit its transmission speed.
1656 */
1657 speed = phylink_interface_max_speed(link_state.interface);
1658 duplex = DUPLEX_HALF;
1659 break;
1660 }
1661
1662 pl->cur_interface = link_state.interface;
1663
1664 neg_mode = pl->act_link_an_mode;
1665 if (pl->pcs && pl->pcs->neg_mode)
1666 neg_mode = pl->pcs_neg_mode;
1667
1668 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1669 duplex);
1670
1671 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1672 pl->cur_interface, speed, duplex,
1673 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1674
1675 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1676 phylink_activate_lpi(pl);
1677
1678 if (ndev)
1679 netif_carrier_on(ndev);
1680
1681 phylink_info(pl,
1682 "Link is Up - %s/%s - flow control %s\n",
1683 phy_speed_to_str(link_state.speed),
1684 phy_duplex_to_str(link_state.duplex),
1685 phylink_pause_to_str(link_state.pause));
1686 }
1687
1688 static void phylink_link_down(struct phylink *pl)
1689 {
1690 struct net_device *ndev = pl->netdev;
1691
1692 if (ndev)
1693 netif_carrier_off(ndev);
1694
1695 phylink_deactivate_lpi(pl);
1696
1697 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1698 pl->cur_interface);
1699 phylink_info(pl, "Link is Down\n");
1700 }
1701
1702 static bool phylink_link_is_up(struct phylink *pl)
1703 {
1704 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state;
1705 }
1706
1707 static void phylink_resolve(struct work_struct *w)
1708 {
1709 struct phylink *pl = container_of(w, struct phylink, resolve);
1710 struct phylink_link_state link_state;
1711 bool mac_config = false;
1712 bool retrigger = false;
1713 bool cur_link_state;
1714
1715 mutex_lock(&pl->state_mutex);
1716 cur_link_state = phylink_link_is_up(pl);
1717
1718 if (pl->phylink_disable_state) {
1719 pl->link_failed = false;
1720 link_state.link = false;
1721 } else if (pl->link_failed) {
1722 link_state.link = false;
1723 retrigger = true;
1724 } else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1725 phylink_get_fixed_state(pl, &link_state);
1726 mac_config = link_state.link;
1727 } else if (pl->act_link_an_mode == MLO_AN_PHY) {
1728 link_state = pl->phy_state;
1729 mac_config = link_state.link;
1730 } else {
1731 phylink_mac_pcs_get_state(pl, &link_state);
1732
1733 /* The PCS may have a latching link-fail indicator. If the link
1734 * was up, bring the link down and re-trigger the resolve.
1735 * Otherwise, re-read the PCS state to get the current status
1736 * of the link.
1737 */
1738 if (!link_state.link) {
1739 if (cur_link_state)
1740 retrigger = true;
1741 else
1742 phylink_mac_pcs_get_state(pl, &link_state);
1743 }
1744
1745 /* If we have a phy, the "up" state is the union of both the
1746 * PHY and the MAC
1747 */
1748 if (pl->phydev)
1749 link_state.link &= pl->phy_state.link;
1750
1751 /* Only update if the PHY link is up */
1752 if (pl->phydev && pl->phy_state.link) {
1753 /* If the interface has changed, force a link down
1754 * event if the link isn't already down, and re-resolve.
1755 */
1756 if (link_state.interface != pl->phy_state.interface) {
1757 retrigger = true;
1758 link_state.link = false;
1759 }
1760
1761 link_state.interface = pl->phy_state.interface;
1762
1763 /* If we are doing rate matching, then the link
1764 * speed/duplex comes from the PHY
1765 */
1766 if (pl->phy_state.rate_matching) {
1767 link_state.rate_matching =
1768 pl->phy_state.rate_matching;
1769 link_state.speed = pl->phy_state.speed;
1770 link_state.duplex = pl->phy_state.duplex;
1771 }
1772
1773 /* If we have a PHY, we need to update with the PHY
1774 * flow control bits.
1775 */
1776 link_state.pause = pl->phy_state.pause;
1777 mac_config = true;
1778 }
1779 }
1780
1781 if (pl->act_link_an_mode != MLO_AN_FIXED)
1782 phylink_apply_manual_flow(pl, &link_state);
1783
1784 if (mac_config) {
1785 if (link_state.interface != pl->link_config.interface) {
1786 /* The interface has changed, force the link down and
1787 * then reconfigure.
1788 */
1789 if (cur_link_state) {
1790 phylink_link_down(pl);
1791 cur_link_state = false;
1792 }
1793 phylink_major_config(pl, false, &link_state);
1794 pl->link_config.interface = link_state.interface;
1795 }
1796 }
1797
1798 if (link_state.link != cur_link_state) {
1799 pl->old_link_state = link_state.link;
1800 if (!link_state.link)
1801 phylink_link_down(pl);
1802 else
1803 phylink_link_up(pl, link_state);
1804 }
1805 if (!link_state.link && retrigger) {
1806 pl->link_failed = false;
1807 queue_work(system_power_efficient_wq, &pl->resolve);
1808 }
1809 mutex_unlock(&pl->state_mutex);
1810 }
1811
1812 static void phylink_run_resolve(struct phylink *pl)
1813 {
1814 if (!pl->phylink_disable_state)
1815 queue_work(system_power_efficient_wq, &pl->resolve);
1816 }
1817
1818 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1819 {
1820 unsigned long state = pl->phylink_disable_state;
1821
1822 set_bit(bit, &pl->phylink_disable_state);
1823 if (state == 0) {
1824 queue_work(system_power_efficient_wq, &pl->resolve);
1825 flush_work(&pl->resolve);
1826 }
1827 }
1828
1829 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1830 {
1831 clear_bit(bit, &pl->phylink_disable_state);
1832 phylink_run_resolve(pl);
1833 }
1834
1835 static void phylink_fixed_poll(struct timer_list *t)
1836 {
1837 struct phylink *pl = container_of(t, struct phylink, link_poll);
1838
1839 mod_timer(t, jiffies + HZ);
1840
1841 phylink_run_resolve(pl);
1842 }
1843
1844 static const struct sfp_upstream_ops sfp_phylink_ops;
1845
1846 static int phylink_register_sfp(struct phylink *pl,
1847 const struct fwnode_handle *fwnode)
1848 {
1849 struct sfp_bus *bus;
1850 int ret;
1851
1852 if (!fwnode)
1853 return 0;
1854
1855 bus = sfp_bus_find_fwnode(fwnode);
1856 if (IS_ERR(bus)) {
1857 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1858 return PTR_ERR(bus);
1859 }
1860
1861 pl->sfp_bus = bus;
1862
1863 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1864 sfp_bus_put(bus);
1865
1866 return ret;
1867 }
1868
1869 /**
1870 * phylink_set_fixed_link() - set the fixed link
1871 * @pl: a pointer to a &struct phylink returned from phylink_create()
1872 * @state: a pointer to a struct phylink_link_state.
1873 *
1874 * This function is used when the link parameters are known and do not change,
1875 * making it suitable for certain types of network connections.
1876 *
1877 * Returns: zero on success or negative error code.
1878 */
1879 int phylink_set_fixed_link(struct phylink *pl,
1880 const struct phylink_link_state *state)
1881 {
1882 const struct phy_setting *s;
1883 unsigned long *adv;
1884
1885 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1886 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1887 return -EINVAL;
1888
1889 s = phy_lookup_setting(state->speed, state->duplex,
1890 pl->supported, true);
1891 if (!s)
1892 return -EINVAL;
1893
1894 adv = pl->link_config.advertising;
1895 linkmode_zero(adv);
1896 linkmode_set_bit(s->bit, adv);
1897 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1898
1899 pl->link_config.speed = state->speed;
1900 pl->link_config.duplex = state->duplex;
1901 pl->link_config.link = 1;
1902 pl->link_config.an_complete = 1;
1903
1904 pl->cfg_link_an_mode = MLO_AN_FIXED;
1905 pl->req_link_an_mode = pl->cfg_link_an_mode;
1906
1907 return 0;
1908 }
1909 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1910
1911 /**
1912 * phylink_create() - create a phylink instance
1913 * @config: a pointer to the target &struct phylink_config
1914 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1915 * interface
1916 * @iface: the desired link mode defined by &typedef phy_interface_t
1917 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1918 *
1919 * Create a new phylink instance, and parse the link parameters found in @np.
1920 * This will parse in-band modes, fixed-link or SFP configuration.
1921 *
1922 * Note: the rtnl lock must not be held when calling this function.
1923 *
1924 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1925 * must use IS_ERR() to check for errors from this function.
1926 */
1927 struct phylink *phylink_create(struct phylink_config *config,
1928 const struct fwnode_handle *fwnode,
1929 phy_interface_t iface,
1930 const struct phylink_mac_ops *mac_ops)
1931 {
1932 struct phylink *pl;
1933 int ret;
1934
1935 /* Validate the supplied configuration */
1936 if (phy_interface_empty(config->supported_interfaces)) {
1937 dev_err(config->dev,
1938 "phylink: error: empty supported_interfaces\n");
1939 return ERR_PTR(-EINVAL);
1940 }
1941
1942 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1943 if (!pl)
1944 return ERR_PTR(-ENOMEM);
1945
1946 mutex_init(&pl->state_mutex);
1947 INIT_WORK(&pl->resolve, phylink_resolve);
1948
1949 pl->config = config;
1950 if (config->type == PHYLINK_NETDEV) {
1951 pl->netdev = to_net_dev(config->dev);
1952 netif_carrier_off(pl->netdev);
1953 } else if (config->type == PHYLINK_DEV) {
1954 pl->dev = config->dev;
1955 } else {
1956 kfree(pl);
1957 return ERR_PTR(-EINVAL);
1958 }
1959
1960 pl->mac_supports_eee_ops = mac_ops->mac_disable_tx_lpi &&
1961 mac_ops->mac_enable_tx_lpi;
1962 pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1963 pl->config->lpi_capabilities &&
1964 !phy_interface_empty(pl->config->lpi_interfaces);
1965
1966 /* Set the default EEE configuration */
1967 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1968 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1969 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1970
1971 pl->phy_state.interface = iface;
1972 pl->link_interface = iface;
1973 if (iface == PHY_INTERFACE_MODE_MOCA)
1974 pl->link_port = PORT_BNC;
1975 else
1976 pl->link_port = PORT_MII;
1977 pl->link_config.interface = iface;
1978 pl->link_config.pause = MLO_PAUSE_AN;
1979 pl->link_config.speed = SPEED_UNKNOWN;
1980 pl->link_config.duplex = DUPLEX_UNKNOWN;
1981 pl->pcs_state = PCS_STATE_DOWN;
1982 pl->mac_ops = mac_ops;
1983 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1984 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1985
1986 linkmode_fill(pl->supported);
1987 linkmode_copy(pl->link_config.advertising, pl->supported);
1988 phylink_validate(pl, pl->supported, &pl->link_config);
1989
1990 ret = phylink_parse_mode(pl, fwnode);
1991 if (ret < 0) {
1992 kfree(pl);
1993 return ERR_PTR(ret);
1994 }
1995
1996 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1997 ret = phylink_parse_fixedlink(pl, fwnode);
1998 if (ret < 0) {
1999 kfree(pl);
2000 return ERR_PTR(ret);
2001 }
2002 }
2003
2004 pl->req_link_an_mode = pl->cfg_link_an_mode;
2005
2006 ret = phylink_register_sfp(pl, fwnode);
2007 if (ret < 0) {
2008 kfree(pl);
2009 return ERR_PTR(ret);
2010 }
2011
2012 return pl;
2013 }
2014 EXPORT_SYMBOL_GPL(phylink_create);
2015
2016 /**
2017 * phylink_destroy() - cleanup and destroy the phylink instance
2018 * @pl: a pointer to a &struct phylink returned from phylink_create()
2019 *
2020 * Destroy a phylink instance. Any PHY that has been attached must have been
2021 * cleaned up via phylink_disconnect_phy() prior to calling this function.
2022 *
2023 * Note: the rtnl lock must not be held when calling this function.
2024 */
2025 void phylink_destroy(struct phylink *pl)
2026 {
2027 sfp_bus_del_upstream(pl->sfp_bus);
2028 if (pl->link_gpio)
2029 gpiod_put(pl->link_gpio);
2030
2031 cancel_work_sync(&pl->resolve);
2032 kfree(pl);
2033 }
2034 EXPORT_SYMBOL_GPL(phylink_destroy);
2035
2036 /**
2037 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
2038 * @pl: a pointer to a &struct phylink returned from phylink_create()
2039 *
2040 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
2041 * no PHY is needed.
2042 *
2043 * Returns true if phylink will be expecting a PHY.
2044 */
2045 bool phylink_expects_phy(struct phylink *pl)
2046 {
2047 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2048 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2049 phy_interface_mode_is_8023z(pl->link_config.interface)))
2050 return false;
2051 return true;
2052 }
2053 EXPORT_SYMBOL_GPL(phylink_expects_phy);
2054
2055 static void phylink_phy_change(struct phy_device *phydev, bool up)
2056 {
2057 struct phylink *pl = phydev->phylink;
2058 bool tx_pause, rx_pause;
2059
2060 phy_get_pause(phydev, &tx_pause, &rx_pause);
2061
2062 mutex_lock(&pl->state_mutex);
2063 pl->phy_state.speed = phydev->speed;
2064 pl->phy_state.duplex = phydev->duplex;
2065 pl->phy_state.rate_matching = phydev->rate_matching;
2066 pl->phy_state.pause = MLO_PAUSE_NONE;
2067 if (tx_pause)
2068 pl->phy_state.pause |= MLO_PAUSE_TX;
2069 if (rx_pause)
2070 pl->phy_state.pause |= MLO_PAUSE_RX;
2071 pl->phy_state.interface = phydev->interface;
2072 pl->phy_state.link = up;
2073 if (!up)
2074 pl->link_failed = true;
2075
2076 /* Get the LPI state from phylib */
2077 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
2078 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
2079 mutex_unlock(&pl->state_mutex);
2080
2081 phylink_run_resolve(pl);
2082
2083 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
2084 up ? "up" : "down",
2085 phy_modes(phydev->interface),
2086 phy_speed_to_str(phydev->speed),
2087 phy_duplex_to_str(phydev->duplex),
2088 phy_rate_matching_to_str(phydev->rate_matching),
2089 phylink_pause_to_str(pl->phy_state.pause),
2090 phydev->enable_tx_lpi ? "" : "no");
2091 }
2092
2093 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
2094 unsigned long *supported,
2095 struct phylink_link_state *state)
2096 {
2097 DECLARE_PHY_INTERFACE_MASK(interfaces);
2098
2099 /* If the PHY provides a bitmap of the interfaces it will be using
2100 * depending on the negotiated media speeds, use this to validate
2101 * which ethtool link modes can be used.
2102 */
2103 if (!phy_interface_empty(phy->possible_interfaces)) {
2104 /* We only care about the union of the PHY's interfaces and
2105 * those which the host supports.
2106 */
2107 phy_interface_and(interfaces, phy->possible_interfaces,
2108 pl->config->supported_interfaces);
2109
2110 if (phy_interface_empty(interfaces)) {
2111 phylink_err(pl, "PHY has no common interfaces\n");
2112 return -EINVAL;
2113 }
2114
2115 if (phy_on_sfp(phy)) {
2116 /* If the PHY is on a SFP, limit the interfaces to
2117 * those that can be used with a SFP module.
2118 */
2119 phy_interface_and(interfaces, interfaces,
2120 phylink_sfp_interfaces);
2121
2122 if (phy_interface_empty(interfaces)) {
2123 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
2124 return -EINVAL;
2125 }
2126 }
2127
2128 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
2129 phydev_name(phy),
2130 (int)PHY_INTERFACE_MODE_MAX,
2131 phy->possible_interfaces,
2132 (int)PHY_INTERFACE_MODE_MAX, interfaces);
2133
2134 return phylink_validate_mask(pl, phy, supported, state,
2135 interfaces);
2136 }
2137
2138 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2139 phydev_name(phy));
2140
2141 /* Check whether we would use rate matching for the proposed interface
2142 * mode.
2143 */
2144 state->rate_matching = phy_get_rate_matching(phy, state->interface);
2145
2146 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2147 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2148 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2149 * their Serdes is either unnecessary or not reasonable.
2150 *
2151 * For these which switch interface modes, we really need to know which
2152 * interface modes the PHY supports to properly work out which ethtool
2153 * linkmodes can be supported. For now, as a work-around, we validate
2154 * against all interface modes, which may lead to more ethtool link
2155 * modes being advertised than are actually supported.
2156 */
2157 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2158 state->interface != PHY_INTERFACE_MODE_RXAUI &&
2159 state->interface != PHY_INTERFACE_MODE_XAUI &&
2160 state->interface != PHY_INTERFACE_MODE_USXGMII)
2161 state->interface = PHY_INTERFACE_MODE_NA;
2162
2163 return phylink_validate(pl, supported, state);
2164 }
2165
2166 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2167 phy_interface_t interface)
2168 {
2169 struct phylink_link_state config;
2170 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2171 char *irq_str;
2172 int ret;
2173
2174 /*
2175 * This is the new way of dealing with flow control for PHYs,
2176 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2177 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2178 * using our validate call to the MAC, we rely upon the MAC
2179 * clearing the bits from both supported and advertising fields.
2180 */
2181 phy_support_asym_pause(phy);
2182
2183 memset(&config, 0, sizeof(config));
2184 linkmode_copy(supported, phy->supported);
2185 linkmode_copy(config.advertising, phy->advertising);
2186 config.interface = interface;
2187
2188 ret = phylink_validate_phy(pl, phy, supported, &config);
2189 if (ret) {
2190 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2191 phy_modes(config.interface),
2192 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2193 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2194 ERR_PTR(ret));
2195 return ret;
2196 }
2197
2198 phy->phylink = pl;
2199 phy->phy_link_change = phylink_phy_change;
2200
2201 irq_str = phy_attached_info_irq(phy);
2202 phylink_info(pl,
2203 "PHY [%s] driver [%s] (irq=%s)\n",
2204 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2205 kfree(irq_str);
2206
2207 mutex_lock(&phy->lock);
2208 mutex_lock(&pl->state_mutex);
2209 pl->phydev = phy;
2210 pl->phy_state.interface = interface;
2211 pl->phy_state.pause = MLO_PAUSE_NONE;
2212 pl->phy_state.speed = SPEED_UNKNOWN;
2213 pl->phy_state.duplex = DUPLEX_UNKNOWN;
2214 pl->phy_state.rate_matching = RATE_MATCH_NONE;
2215 linkmode_copy(pl->supported, supported);
2216 linkmode_copy(pl->link_config.advertising, config.advertising);
2217
2218 /* Restrict the phy advertisement according to the MAC support. */
2219 linkmode_copy(phy->advertising, config.advertising);
2220
2221 /* If the MAC supports phylink managed EEE, restrict the EEE
2222 * advertisement according to the MAC's LPI capabilities.
2223 */
2224 if (pl->mac_supports_eee) {
2225 /* If EEE is enabled, then we need to call phy_support_eee()
2226 * to ensure that the advertising mask is appropriately set.
2227 * This also enables EEE at the PHY.
2228 */
2229 if (pl->eee_cfg.eee_enabled)
2230 phy_support_eee(phy);
2231
2232 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2233 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2234
2235 /* Convert the MAC's LPI capabilities to linkmodes */
2236 linkmode_zero(pl->supported_lpi);
2237 phylink_caps_to_linkmodes(pl->supported_lpi,
2238 pl->config->lpi_capabilities);
2239
2240 /* Restrict the PHYs EEE support/advertisement to the modes
2241 * that the MAC supports.
2242 */
2243 linkmode_and(phy->advertising_eee, phy->advertising_eee,
2244 pl->supported_lpi);
2245 } else if (pl->mac_supports_eee_ops) {
2246 /* MAC supports phylink EEE, but wants EEE always disabled. */
2247 phy_disable_eee(phy);
2248 }
2249
2250 mutex_unlock(&pl->state_mutex);
2251 mutex_unlock(&phy->lock);
2252
2253 phylink_dbg(pl,
2254 "phy: %s setting supported %*pb advertising %*pb\n",
2255 phy_modes(interface),
2256 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2257 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2258
2259 if (phy_interrupt_is_valid(phy))
2260 phy_request_interrupt(phy);
2261
2262 if (pl->config->mac_managed_pm)
2263 phy->mac_managed_pm = true;
2264
2265 /* Allow the MAC to stop its clock if the PHY has the capability */
2266 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
2267
2268 /* Explicitly configure whether the PHY is allowed to stop it's
2269 * receive clock.
2270 */
2271 ret = phy_eee_rx_clock_stop(phy, pl->config->eee_rx_clk_stop_enable);
2272 if (ret == -EOPNOTSUPP)
2273 ret = 0;
2274
2275 return ret;
2276 }
2277
2278 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2279 phy_interface_t interface)
2280 {
2281 u32 flags = 0;
2282
2283 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2284 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2285 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2286 return -EINVAL;
2287
2288 if (pl->phydev)
2289 return -EBUSY;
2290
2291 if (pl->config->mac_requires_rxc)
2292 flags |= PHY_F_RXC_ALWAYS_ON;
2293
2294 return phy_attach_direct(pl->netdev, phy, flags, interface);
2295 }
2296
2297 /**
2298 * phylink_connect_phy() - connect a PHY to the phylink instance
2299 * @pl: a pointer to a &struct phylink returned from phylink_create()
2300 * @phy: a pointer to a &struct phy_device.
2301 *
2302 * Connect @phy to the phylink instance specified by @pl by calling
2303 * phy_attach_direct(). Configure the @phy according to the MAC driver's
2304 * capabilities, start the PHYLIB state machine and enable any interrupts
2305 * that the PHY supports.
2306 *
2307 * This updates the phylink's ethtool supported and advertising link mode
2308 * masks.
2309 *
2310 * Returns 0 on success or a negative errno.
2311 */
2312 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2313 {
2314 int ret;
2315
2316 /* Use PHY device/driver interface */
2317 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2318 pl->link_interface = phy->interface;
2319 pl->link_config.interface = pl->link_interface;
2320 }
2321
2322 ret = phylink_attach_phy(pl, phy, pl->link_interface);
2323 if (ret < 0)
2324 return ret;
2325
2326 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2327 if (ret)
2328 phy_detach(phy);
2329
2330 return ret;
2331 }
2332 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2333
2334 /**
2335 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2336 * @pl: a pointer to a &struct phylink returned from phylink_create()
2337 * @dn: a pointer to a &struct device_node.
2338 * @flags: PHY-specific flags to communicate to the PHY device driver
2339 *
2340 * Connect the phy specified in the device node @dn to the phylink instance
2341 * specified by @pl. Actions specified in phylink_connect_phy() will be
2342 * performed.
2343 *
2344 * Returns 0 on success or a negative errno.
2345 */
2346 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2347 u32 flags)
2348 {
2349 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2350 }
2351 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2352
2353 /**
2354 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2355 * @pl: a pointer to a &struct phylink returned from phylink_create()
2356 * @fwnode: a pointer to a &struct fwnode_handle.
2357 * @flags: PHY-specific flags to communicate to the PHY device driver
2358 *
2359 * Connect the phy specified @fwnode to the phylink instance specified
2360 * by @pl.
2361 *
2362 * Returns 0 on success or a negative errno.
2363 */
2364 int phylink_fwnode_phy_connect(struct phylink *pl,
2365 const struct fwnode_handle *fwnode,
2366 u32 flags)
2367 {
2368 struct fwnode_handle *phy_fwnode;
2369 struct phy_device *phy_dev;
2370 int ret;
2371
2372 /* Fixed links and 802.3z are handled without needing a PHY */
2373 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2374 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2375 phy_interface_mode_is_8023z(pl->link_interface)))
2376 return 0;
2377
2378 phy_fwnode = fwnode_get_phy_node(fwnode);
2379 if (IS_ERR(phy_fwnode)) {
2380 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2381 return -ENODEV;
2382 return 0;
2383 }
2384
2385 phy_dev = fwnode_phy_find_device(phy_fwnode);
2386 /* We're done with the phy_node handle */
2387 fwnode_handle_put(phy_fwnode);
2388 if (!phy_dev)
2389 return -ENODEV;
2390
2391 /* Use PHY device/driver interface */
2392 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2393 pl->link_interface = phy_dev->interface;
2394 pl->link_config.interface = pl->link_interface;
2395 }
2396
2397 if (pl->config->mac_requires_rxc)
2398 flags |= PHY_F_RXC_ALWAYS_ON;
2399
2400 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2401 pl->link_interface);
2402 phy_device_free(phy_dev);
2403 if (ret)
2404 return ret;
2405
2406 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2407 if (ret)
2408 phy_detach(phy_dev);
2409
2410 return ret;
2411 }
2412 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2413
2414 /**
2415 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2416 * instance.
2417 * @pl: a pointer to a &struct phylink returned from phylink_create()
2418 *
2419 * Disconnect any current PHY from the phylink instance described by @pl.
2420 */
2421 void phylink_disconnect_phy(struct phylink *pl)
2422 {
2423 struct phy_device *phy;
2424
2425 ASSERT_RTNL();
2426
2427 phy = pl->phydev;
2428 if (phy) {
2429 mutex_lock(&phy->lock);
2430 mutex_lock(&pl->state_mutex);
2431 pl->phydev = NULL;
2432 pl->phy_enable_tx_lpi = false;
2433 pl->mac_tx_clk_stop = false;
2434 mutex_unlock(&pl->state_mutex);
2435 mutex_unlock(&phy->lock);
2436 flush_work(&pl->resolve);
2437
2438 phy_disconnect(phy);
2439 }
2440 }
2441 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2442
2443 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2444 {
2445 if (!up)
2446 pl->link_failed = true;
2447 phylink_run_resolve(pl);
2448 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2449 }
2450
2451 /**
2452 * phylink_mac_change() - notify phylink of a change in MAC state
2453 * @pl: a pointer to a &struct phylink returned from phylink_create()
2454 * @up: indicates whether the link is currently up.
2455 *
2456 * The MAC driver should call this driver when the state of its link
2457 * changes (eg, link failure, new negotiation results, etc.)
2458 */
2459 void phylink_mac_change(struct phylink *pl, bool up)
2460 {
2461 phylink_link_changed(pl, up, "mac");
2462 }
2463 EXPORT_SYMBOL_GPL(phylink_mac_change);
2464
2465 /**
2466 * phylink_pcs_change() - notify phylink of a change to PCS link state
2467 * @pcs: pointer to &struct phylink_pcs
2468 * @up: indicates whether the link is currently up.
2469 *
2470 * The PCS driver should call this when the state of its link changes
2471 * (e.g. link failure, new negotiation results, etc.) Note: it should
2472 * not determine "up" by reading the BMSR. If in doubt about the link
2473 * state at interrupt time, then pass true if pcs_get_state() returns
2474 * the latched link-down state, otherwise pass false.
2475 */
2476 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2477 {
2478 struct phylink *pl = pcs->phylink;
2479
2480 if (pl)
2481 phylink_link_changed(pl, up, "pcs");
2482 }
2483 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2484
2485 static irqreturn_t phylink_link_handler(int irq, void *data)
2486 {
2487 struct phylink *pl = data;
2488
2489 phylink_run_resolve(pl);
2490
2491 return IRQ_HANDLED;
2492 }
2493
2494 /**
2495 * phylink_start() - start a phylink instance
2496 * @pl: a pointer to a &struct phylink returned from phylink_create()
2497 *
2498 * Start the phylink instance specified by @pl, configuring the MAC for the
2499 * desired link mode(s) and negotiation style. This should be called from the
2500 * network device driver's &struct net_device_ops ndo_open() method.
2501 */
2502 void phylink_start(struct phylink *pl)
2503 {
2504 bool poll = false;
2505
2506 ASSERT_RTNL();
2507
2508 phylink_info(pl, "configuring for %s/%s link mode\n",
2509 phylink_an_mode_str(pl->req_link_an_mode),
2510 phy_modes(pl->link_config.interface));
2511
2512 /* Always set the carrier off */
2513 if (pl->netdev)
2514 netif_carrier_off(pl->netdev);
2515
2516 pl->pcs_state = PCS_STATE_STARTING;
2517
2518 /* Apply the link configuration to the MAC when starting. This allows
2519 * a fixed-link to start with the correct parameters, and also
2520 * ensures that we set the appropriate advertisement for Serdes links.
2521 *
2522 * Restart autonegotiation if using 802.3z to ensure that the link
2523 * parameters are properly negotiated. This is necessary for DSA
2524 * switches using 802.3z negotiation to ensure they see our modes.
2525 */
2526 phylink_mac_initial_config(pl, true);
2527
2528 pl->pcs_state = PCS_STATE_STARTED;
2529
2530 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2531
2532 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2533 int irq = gpiod_to_irq(pl->link_gpio);
2534
2535 if (irq > 0) {
2536 if (!request_irq(irq, phylink_link_handler,
2537 IRQF_TRIGGER_RISING |
2538 IRQF_TRIGGER_FALLING,
2539 "netdev link", pl))
2540 pl->link_irq = irq;
2541 else
2542 irq = 0;
2543 }
2544 if (irq <= 0)
2545 poll = true;
2546 }
2547
2548 if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2549 poll |= pl->config->poll_fixed_state;
2550
2551 if (poll)
2552 mod_timer(&pl->link_poll, jiffies + HZ);
2553 if (pl->phydev)
2554 phy_start(pl->phydev);
2555 if (pl->sfp_bus)
2556 sfp_upstream_start(pl->sfp_bus);
2557 }
2558 EXPORT_SYMBOL_GPL(phylink_start);
2559
2560 /**
2561 * phylink_stop() - stop a phylink instance
2562 * @pl: a pointer to a &struct phylink returned from phylink_create()
2563 *
2564 * Stop the phylink instance specified by @pl. This should be called from the
2565 * network device driver's &struct net_device_ops ndo_stop() method. The
2566 * network device's carrier state should not be changed prior to calling this
2567 * function.
2568 *
2569 * This will synchronously bring down the link if the link is not already
2570 * down (in other words, it will trigger a mac_link_down() method call.)
2571 */
2572 void phylink_stop(struct phylink *pl)
2573 {
2574 ASSERT_RTNL();
2575
2576 if (pl->sfp_bus)
2577 sfp_upstream_stop(pl->sfp_bus);
2578 if (pl->phydev)
2579 phy_stop(pl->phydev);
2580 del_timer_sync(&pl->link_poll);
2581 if (pl->link_irq) {
2582 free_irq(pl->link_irq, pl);
2583 pl->link_irq = 0;
2584 }
2585
2586 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2587
2588 pl->pcs_state = PCS_STATE_DOWN;
2589
2590 phylink_pcs_disable(pl->pcs);
2591 }
2592 EXPORT_SYMBOL_GPL(phylink_stop);
2593
2594 /**
2595 * phylink_suspend() - handle a network device suspend event
2596 * @pl: a pointer to a &struct phylink returned from phylink_create()
2597 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2598 *
2599 * Handle a network device suspend event. There are several cases:
2600 *
2601 * - If Wake-on-Lan is not active, we can bring down the link between
2602 * the MAC and PHY by calling phylink_stop().
2603 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2604 * can also bring down the link between the MAC and PHY.
2605 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2606 * still needs to receive packets, so we can not bring the link down.
2607 */
2608 void phylink_suspend(struct phylink *pl, bool mac_wol)
2609 {
2610 ASSERT_RTNL();
2611
2612 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2613 /* Wake-on-Lan enabled, MAC handling */
2614 mutex_lock(&pl->state_mutex);
2615
2616 /* Stop the resolver bringing the link up */
2617 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2618
2619 /* Disable the carrier, to prevent transmit timeouts,
2620 * but one would hope all packets have been sent. This
2621 * also means phylink_resolve() will do nothing.
2622 */
2623 if (pl->netdev)
2624 netif_carrier_off(pl->netdev);
2625 else
2626 pl->old_link_state = false;
2627
2628 /* We do not call mac_link_down() here as we want the
2629 * link to remain up to receive the WoL packets.
2630 */
2631 mutex_unlock(&pl->state_mutex);
2632 } else {
2633 phylink_stop(pl);
2634 }
2635 }
2636 EXPORT_SYMBOL_GPL(phylink_suspend);
2637
2638 /**
2639 * phylink_resume() - handle a network device resume event
2640 * @pl: a pointer to a &struct phylink returned from phylink_create()
2641 *
2642 * Undo the effects of phylink_suspend(), returning the link to an
2643 * operational state.
2644 */
2645 void phylink_resume(struct phylink *pl)
2646 {
2647 ASSERT_RTNL();
2648
2649 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2650 /* Wake-on-Lan enabled, MAC handling */
2651
2652 /* Call mac_link_down() so we keep the overall state balanced.
2653 * Do this under the state_mutex lock for consistency. This
2654 * will cause a "Link Down" message to be printed during
2655 * resume, which is harmless - the true link state will be
2656 * printed when we run a resolve.
2657 */
2658 mutex_lock(&pl->state_mutex);
2659 phylink_link_down(pl);
2660 mutex_unlock(&pl->state_mutex);
2661
2662 /* Re-apply the link parameters so that all the settings get
2663 * restored to the MAC.
2664 */
2665 phylink_mac_initial_config(pl, true);
2666
2667 /* Re-enable and re-resolve the link parameters */
2668 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2669 } else {
2670 phylink_start(pl);
2671 }
2672 }
2673 EXPORT_SYMBOL_GPL(phylink_resume);
2674
2675 /**
2676 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2677 * @pl: a pointer to a &struct phylink returned from phylink_create()
2678 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2679 *
2680 * Read the wake on lan parameters from the PHY attached to the phylink
2681 * instance specified by @pl. If no PHY is currently attached, report no
2682 * support for wake on lan.
2683 */
2684 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2685 {
2686 ASSERT_RTNL();
2687
2688 wol->supported = 0;
2689 wol->wolopts = 0;
2690
2691 if (pl->phydev)
2692 phy_ethtool_get_wol(pl->phydev, wol);
2693 }
2694 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2695
2696 /**
2697 * phylink_ethtool_set_wol() - set wake on lan parameters
2698 * @pl: a pointer to a &struct phylink returned from phylink_create()
2699 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2700 *
2701 * Set the wake on lan parameters for the PHY attached to the phylink
2702 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2703 * error.
2704 *
2705 * Returns zero on success or negative errno code.
2706 */
2707 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2708 {
2709 int ret = -EOPNOTSUPP;
2710
2711 ASSERT_RTNL();
2712
2713 if (pl->phydev)
2714 ret = phy_ethtool_set_wol(pl->phydev, wol);
2715
2716 return ret;
2717 }
2718 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2719
2720 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2721 const unsigned long *link_modes)
2722 {
2723 phy_interface_t interface;
2724
2725 interface = sfp_select_interface(pl->sfp_bus, link_modes);
2726 if (interface == PHY_INTERFACE_MODE_NA) {
2727 phylink_err(pl,
2728 "selection of interface failed, advertisement %*pb\n",
2729 __ETHTOOL_LINK_MODE_MASK_NBITS,
2730 link_modes);
2731 return interface;
2732 }
2733
2734 if (!test_bit(interface, pl->config->supported_interfaces)) {
2735 phylink_err(pl,
2736 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2737 phy_modes(interface), interface,
2738 (int)PHY_INTERFACE_MODE_MAX,
2739 pl->config->supported_interfaces);
2740 return PHY_INTERFACE_MODE_NA;
2741 }
2742
2743 return interface;
2744 }
2745
2746 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2747 {
2748 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2749
2750 linkmode_zero(mask);
2751 phylink_set_port_modes(mask);
2752
2753 linkmode_and(dst, dst, mask);
2754 linkmode_or(dst, dst, b);
2755 }
2756
2757 static void phylink_get_ksettings(const struct phylink_link_state *state,
2758 struct ethtool_link_ksettings *kset)
2759 {
2760 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2761 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2762 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2763 kset->base.speed = state->speed;
2764 kset->base.duplex = state->duplex;
2765 }
2766 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2767 state->advertising) ?
2768 AUTONEG_ENABLE : AUTONEG_DISABLE;
2769 }
2770
2771 /**
2772 * phylink_ethtool_ksettings_get() - get the current link settings
2773 * @pl: a pointer to a &struct phylink returned from phylink_create()
2774 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2775 *
2776 * Read the current link settings for the phylink instance specified by @pl.
2777 * This will be the link settings read from the MAC, PHY or fixed link
2778 * settings depending on the current negotiation mode.
2779 */
2780 int phylink_ethtool_ksettings_get(struct phylink *pl,
2781 struct ethtool_link_ksettings *kset)
2782 {
2783 struct phylink_link_state link_state;
2784
2785 ASSERT_RTNL();
2786
2787 if (pl->phydev)
2788 phy_ethtool_ksettings_get(pl->phydev, kset);
2789 else
2790 kset->base.port = pl->link_port;
2791
2792 linkmode_copy(kset->link_modes.supported, pl->supported);
2793
2794 switch (pl->act_link_an_mode) {
2795 case MLO_AN_FIXED:
2796 /* We are using fixed settings. Report these as the
2797 * current link settings - and note that these also
2798 * represent the supported speeds/duplex/pause modes.
2799 */
2800 phylink_get_fixed_state(pl, &link_state);
2801 phylink_get_ksettings(&link_state, kset);
2802 break;
2803
2804 case MLO_AN_INBAND:
2805 /* If there is a phy attached, then use the reported
2806 * settings from the phy with no modification.
2807 */
2808 if (pl->phydev)
2809 break;
2810
2811 phylink_mac_pcs_get_state(pl, &link_state);
2812
2813 /* The MAC is reporting the link results from its own PCS
2814 * layer via in-band status. Report these as the current
2815 * link settings.
2816 */
2817 phylink_get_ksettings(&link_state, kset);
2818 break;
2819 }
2820
2821 return 0;
2822 }
2823 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2824
2825 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2826 phy_interface_t interface,
2827 unsigned long *adv)
2828 {
2829 unsigned int inband = phylink_inband_caps(pl, interface);
2830 unsigned int mask;
2831
2832 /* If the PCS doesn't implement inband support, be permissive. */
2833 if (!inband)
2834 return true;
2835
2836 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2837 mask = LINK_INBAND_ENABLE;
2838 else
2839 mask = LINK_INBAND_DISABLE;
2840
2841 /* Check whether the PCS implements the required mode */
2842 return !!(inband & mask);
2843 }
2844
2845 /**
2846 * phylink_ethtool_ksettings_set() - set the link settings
2847 * @pl: a pointer to a &struct phylink returned from phylink_create()
2848 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2849 */
2850 int phylink_ethtool_ksettings_set(struct phylink *pl,
2851 const struct ethtool_link_ksettings *kset)
2852 {
2853 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2854 struct phylink_link_state config;
2855 const struct phy_setting *s;
2856
2857 ASSERT_RTNL();
2858
2859 if (pl->phydev) {
2860 struct ethtool_link_ksettings phy_kset = *kset;
2861
2862 linkmode_and(phy_kset.link_modes.advertising,
2863 phy_kset.link_modes.advertising,
2864 pl->supported);
2865
2866 /* We can rely on phylib for this update; we also do not need
2867 * to update the pl->link_config settings:
2868 * - the configuration returned via ksettings_get() will come
2869 * from phylib whenever a PHY is present.
2870 * - link_config.interface will be updated by the PHY calling
2871 * back via phylink_phy_change() and a subsequent resolve.
2872 * - initial link configuration for PHY mode comes from the
2873 * last phy state updated via phylink_phy_change().
2874 * - other configuration changes (e.g. pause modes) are
2875 * performed directly via phylib.
2876 * - if in in-band mode with a PHY, the link configuration
2877 * is passed on the link from the PHY, and all of
2878 * link_config.{speed,duplex,an_enabled,pause} are not used.
2879 * - the only possible use would be link_config.advertising
2880 * pause modes when in 1000base-X mode with a PHY, but in
2881 * the presence of a PHY, this should not be changed as that
2882 * should be determined from the media side advertisement.
2883 */
2884 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2885 }
2886
2887 config = pl->link_config;
2888 /* Mask out unsupported advertisements */
2889 linkmode_and(config.advertising, kset->link_modes.advertising,
2890 pl->supported);
2891
2892 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2893 switch (kset->base.autoneg) {
2894 case AUTONEG_DISABLE:
2895 /* Autonegotiation disabled, select a suitable speed and
2896 * duplex.
2897 */
2898 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2899 pl->supported, false);
2900 if (!s)
2901 return -EINVAL;
2902
2903 /* If we have a fixed link, refuse to change link parameters.
2904 * If the link parameters match, accept them but do nothing.
2905 */
2906 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2907 if (s->speed != pl->link_config.speed ||
2908 s->duplex != pl->link_config.duplex)
2909 return -EINVAL;
2910 return 0;
2911 }
2912
2913 config.speed = s->speed;
2914 config.duplex = s->duplex;
2915 break;
2916
2917 case AUTONEG_ENABLE:
2918 /* If we have a fixed link, allow autonegotiation (since that
2919 * is our default case) but do not allow the advertisement to
2920 * be changed. If the advertisement matches, simply return.
2921 */
2922 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2923 if (!linkmode_equal(config.advertising,
2924 pl->link_config.advertising))
2925 return -EINVAL;
2926 return 0;
2927 }
2928
2929 config.speed = SPEED_UNKNOWN;
2930 config.duplex = DUPLEX_UNKNOWN;
2931 break;
2932
2933 default:
2934 return -EINVAL;
2935 }
2936
2937 /* We have ruled out the case with a PHY attached, and the
2938 * fixed-link cases. All that is left are in-band links.
2939 */
2940 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2941 kset->base.autoneg == AUTONEG_ENABLE);
2942
2943 /* If this link is with an SFP, ensure that changes to advertised modes
2944 * also cause the associated interface to be selected such that the
2945 * link can be configured correctly.
2946 */
2947 if (pl->sfp_bus) {
2948 config.interface = phylink_sfp_select_interface(pl,
2949 config.advertising);
2950 if (config.interface == PHY_INTERFACE_MODE_NA)
2951 return -EINVAL;
2952
2953 /* Revalidate with the selected interface */
2954 linkmode_copy(support, pl->supported);
2955 if (phylink_validate(pl, support, &config)) {
2956 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2957 phylink_an_mode_str(pl->req_link_an_mode),
2958 phy_modes(config.interface),
2959 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2960 return -EINVAL;
2961 }
2962 } else {
2963 /* Validate without changing the current supported mask. */
2964 linkmode_copy(support, pl->supported);
2965 if (phylink_validate(pl, support, &config))
2966 return -EINVAL;
2967 }
2968
2969 /* If autonegotiation is enabled, we must have an advertisement */
2970 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2971 config.advertising) &&
2972 phylink_is_empty_linkmode(config.advertising))
2973 return -EINVAL;
2974
2975 /* Validate the autonegotiation state. We don't have a PHY in this
2976 * situation, so the PCS is the media-facing entity.
2977 */
2978 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
2979 config.advertising))
2980 return -EINVAL;
2981
2982 mutex_lock(&pl->state_mutex);
2983 pl->link_config.speed = config.speed;
2984 pl->link_config.duplex = config.duplex;
2985
2986 if (pl->link_config.interface != config.interface) {
2987 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2988 /* We need to force the link down, then change the interface */
2989 if (pl->old_link_state) {
2990 phylink_link_down(pl);
2991 pl->old_link_state = false;
2992 }
2993 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2994 &pl->phylink_disable_state))
2995 phylink_major_config(pl, false, &config);
2996 pl->link_config.interface = config.interface;
2997 linkmode_copy(pl->link_config.advertising, config.advertising);
2998 } else if (!linkmode_equal(pl->link_config.advertising,
2999 config.advertising)) {
3000 linkmode_copy(pl->link_config.advertising, config.advertising);
3001 phylink_change_inband_advert(pl);
3002 }
3003 mutex_unlock(&pl->state_mutex);
3004
3005 return 0;
3006 }
3007 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
3008
3009 /**
3010 * phylink_ethtool_nway_reset() - restart negotiation
3011 * @pl: a pointer to a &struct phylink returned from phylink_create()
3012 *
3013 * Restart negotiation for the phylink instance specified by @pl. This will
3014 * cause any attached phy to restart negotiation with the link partner, and
3015 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
3016 * negotiation.
3017 *
3018 * Returns zero on success, or negative error code.
3019 */
3020 int phylink_ethtool_nway_reset(struct phylink *pl)
3021 {
3022 int ret = 0;
3023
3024 ASSERT_RTNL();
3025
3026 if (pl->phydev)
3027 ret = phy_restart_aneg(pl->phydev);
3028 phylink_pcs_an_restart(pl);
3029
3030 return ret;
3031 }
3032 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
3033
3034 /**
3035 * phylink_ethtool_get_pauseparam() - get the current pause parameters
3036 * @pl: a pointer to a &struct phylink returned from phylink_create()
3037 * @pause: a pointer to a &struct ethtool_pauseparam
3038 */
3039 void phylink_ethtool_get_pauseparam(struct phylink *pl,
3040 struct ethtool_pauseparam *pause)
3041 {
3042 ASSERT_RTNL();
3043
3044 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3045 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3046 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3047 }
3048 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3049
3050 /**
3051 * phylink_ethtool_set_pauseparam() - set the current pause parameters
3052 * @pl: a pointer to a &struct phylink returned from phylink_create()
3053 * @pause: a pointer to a &struct ethtool_pauseparam
3054 */
3055 int phylink_ethtool_set_pauseparam(struct phylink *pl,
3056 struct ethtool_pauseparam *pause)
3057 {
3058 struct phylink_link_state *config = &pl->link_config;
3059 bool manual_changed;
3060 int pause_state;
3061
3062 ASSERT_RTNL();
3063
3064 if (pl->req_link_an_mode == MLO_AN_FIXED)
3065 return -EOPNOTSUPP;
3066
3067 if (!phylink_test(pl->supported, Pause) &&
3068 !phylink_test(pl->supported, Asym_Pause))
3069 return -EOPNOTSUPP;
3070
3071 if (!phylink_test(pl->supported, Asym_Pause) &&
3072 pause->rx_pause != pause->tx_pause)
3073 return -EINVAL;
3074
3075 pause_state = 0;
3076 if (pause->autoneg)
3077 pause_state |= MLO_PAUSE_AN;
3078 if (pause->rx_pause)
3079 pause_state |= MLO_PAUSE_RX;
3080 if (pause->tx_pause)
3081 pause_state |= MLO_PAUSE_TX;
3082
3083 mutex_lock(&pl->state_mutex);
3084 /*
3085 * See the comments for linkmode_set_pause(), wrt the deficiencies
3086 * with the current implementation. A solution to this issue would
3087 * be:
3088 * ethtool Local device
3089 * rx tx Pause AsymDir
3090 * 0 0 0 0
3091 * 1 0 1 1
3092 * 0 1 0 1
3093 * 1 1 1 1
3094 * and then use the ethtool rx/tx enablement status to mask the
3095 * rx/tx pause resolution.
3096 */
3097 linkmode_set_pause(config->advertising, pause->tx_pause,
3098 pause->rx_pause);
3099
3100 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3101 (!(pause_state & MLO_PAUSE_AN) &&
3102 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3103
3104 config->pause = pause_state;
3105
3106 /* Update our in-band advertisement, triggering a renegotiation if
3107 * the advertisement changed.
3108 */
3109 if (!pl->phydev)
3110 phylink_change_inband_advert(pl);
3111
3112 mutex_unlock(&pl->state_mutex);
3113
3114 /* If we have a PHY, a change of the pause frame advertisement will
3115 * cause phylib to renegotiate (if AN is enabled) which will in turn
3116 * call our phylink_phy_change() and trigger a resolve. Note that
3117 * we can't hold our state mutex while calling phy_set_asym_pause().
3118 */
3119 if (pl->phydev)
3120 phy_set_asym_pause(pl->phydev, pause->rx_pause,
3121 pause->tx_pause);
3122
3123 /* If the manual pause settings changed, make sure we trigger a
3124 * resolve to update their state; we can not guarantee that the
3125 * link will cycle.
3126 */
3127 if (manual_changed) {
3128 pl->link_failed = true;
3129 phylink_run_resolve(pl);
3130 }
3131
3132 return 0;
3133 }
3134 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3135
3136 /**
3137 * phylink_get_eee_err() - read the energy efficient ethernet error
3138 * counter
3139 * @pl: a pointer to a &struct phylink returned from phylink_create().
3140 *
3141 * Read the Energy Efficient Ethernet error counter from the PHY associated
3142 * with the phylink instance specified by @pl.
3143 *
3144 * Returns positive error counter value, or negative error code.
3145 */
3146 int phylink_get_eee_err(struct phylink *pl)
3147 {
3148 int ret = 0;
3149
3150 ASSERT_RTNL();
3151
3152 if (pl->phydev)
3153 ret = phy_get_eee_err(pl->phydev);
3154
3155 return ret;
3156 }
3157 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3158
3159 /**
3160 * phylink_init_eee() - init and check the EEE features
3161 * @pl: a pointer to a &struct phylink returned from phylink_create()
3162 * @clk_stop_enable: allow PHY to stop receive clock
3163 *
3164 * Must be called either with RTNL held or within mac_link_up()
3165 */
3166 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
3167 {
3168 int ret = -EOPNOTSUPP;
3169
3170 if (pl->phydev)
3171 ret = phy_init_eee(pl->phydev, clk_stop_enable);
3172
3173 return ret;
3174 }
3175 EXPORT_SYMBOL_GPL(phylink_init_eee);
3176
3177 /**
3178 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3179 * @pl: a pointer to a &struct phylink returned from phylink_create()
3180 * @eee: a pointer to a &struct ethtool_keee for the read parameters
3181 */
3182 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3183 {
3184 int ret = -EOPNOTSUPP;
3185
3186 ASSERT_RTNL();
3187
3188 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3189 return ret;
3190
3191 if (pl->phydev) {
3192 ret = phy_ethtool_get_eee(pl->phydev, eee);
3193 /* Restrict supported linkmode mask */
3194 if (ret == 0 && pl->mac_supports_eee_ops)
3195 linkmode_and(eee->supported, eee->supported,
3196 pl->supported_lpi);
3197 }
3198
3199 return ret;
3200 }
3201 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3202
3203 /**
3204 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3205 * @pl: a pointer to a &struct phylink returned from phylink_create()
3206 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
3207 */
3208 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3209 {
3210 bool mac_eee = pl->mac_supports_eee;
3211 int ret = -EOPNOTSUPP;
3212
3213 ASSERT_RTNL();
3214
3215 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3216 mac_eee ? "supports" : "does not support",
3217 eee->eee_enabled ? ", enabled" : "",
3218 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3219 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3220
3221 if (pl->mac_supports_eee_ops && !mac_eee)
3222 return ret;
3223
3224 if (pl->phydev) {
3225 /* Restrict advertisement mask */
3226 if (pl->mac_supports_eee_ops)
3227 linkmode_and(eee->advertised, eee->advertised,
3228 pl->supported_lpi);
3229 ret = phy_ethtool_set_eee(pl->phydev, eee);
3230 if (ret == 0)
3231 eee_to_eeecfg(&pl->eee_cfg, eee);
3232 }
3233
3234 return ret;
3235 }
3236 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3237
3238 /* This emulates MII registers for a fixed-mode phy operating as per the
3239 * passed in state. "aneg" defines if we report negotiation is possible.
3240 *
3241 * FIXME: should deal with negotiation state too.
3242 */
3243 static int phylink_mii_emul_read(unsigned int reg,
3244 struct phylink_link_state *state)
3245 {
3246 struct fixed_phy_status fs;
3247 unsigned long *lpa = state->lp_advertising;
3248 int val;
3249
3250 fs.link = state->link;
3251 fs.speed = state->speed;
3252 fs.duplex = state->duplex;
3253 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3254 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3255
3256 val = swphy_read_reg(reg, &fs);
3257 if (reg == MII_BMSR) {
3258 if (!state->an_complete)
3259 val &= ~BMSR_ANEGCOMPLETE;
3260 }
3261 return val;
3262 }
3263
3264 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3265 unsigned int reg)
3266 {
3267 struct phy_device *phydev = pl->phydev;
3268 int prtad, devad;
3269
3270 if (mdio_phy_id_is_c45(phy_id)) {
3271 prtad = mdio_phy_id_prtad(phy_id);
3272 devad = mdio_phy_id_devad(phy_id);
3273 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3274 reg);
3275 }
3276
3277 if (phydev->is_c45) {
3278 switch (reg) {
3279 case MII_BMCR:
3280 case MII_BMSR:
3281 case MII_PHYSID1:
3282 case MII_PHYSID2:
3283 devad = __ffs(phydev->c45_ids.mmds_present);
3284 break;
3285 case MII_ADVERTISE:
3286 case MII_LPA:
3287 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3288 return -EINVAL;
3289 devad = MDIO_MMD_AN;
3290 if (reg == MII_ADVERTISE)
3291 reg = MDIO_AN_ADVERTISE;
3292 else
3293 reg = MDIO_AN_LPA;
3294 break;
3295 default:
3296 return -EINVAL;
3297 }
3298 prtad = phy_id;
3299 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3300 reg);
3301 }
3302
3303 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
3304 }
3305
3306 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3307 unsigned int reg, unsigned int val)
3308 {
3309 struct phy_device *phydev = pl->phydev;
3310 int prtad, devad;
3311
3312 if (mdio_phy_id_is_c45(phy_id)) {
3313 prtad = mdio_phy_id_prtad(phy_id);
3314 devad = mdio_phy_id_devad(phy_id);
3315 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
3316 reg, val);
3317 }
3318
3319 if (phydev->is_c45) {
3320 switch (reg) {
3321 case MII_BMCR:
3322 case MII_BMSR:
3323 case MII_PHYSID1:
3324 case MII_PHYSID2:
3325 devad = __ffs(phydev->c45_ids.mmds_present);
3326 break;
3327 case MII_ADVERTISE:
3328 case MII_LPA:
3329 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3330 return -EINVAL;
3331 devad = MDIO_MMD_AN;
3332 if (reg == MII_ADVERTISE)
3333 reg = MDIO_AN_ADVERTISE;
3334 else
3335 reg = MDIO_AN_LPA;
3336 break;
3337 default:
3338 return -EINVAL;
3339 }
3340 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
3341 reg, val);
3342 }
3343
3344 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
3345 }
3346
3347 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3348 unsigned int reg)
3349 {
3350 struct phylink_link_state state;
3351 int val = 0xffff;
3352
3353 switch (pl->act_link_an_mode) {
3354 case MLO_AN_FIXED:
3355 if (phy_id == 0) {
3356 phylink_get_fixed_state(pl, &state);
3357 val = phylink_mii_emul_read(reg, &state);
3358 }
3359 break;
3360
3361 case MLO_AN_PHY:
3362 return -EOPNOTSUPP;
3363
3364 case MLO_AN_INBAND:
3365 if (phy_id == 0) {
3366 phylink_mac_pcs_get_state(pl, &state);
3367 val = phylink_mii_emul_read(reg, &state);
3368 }
3369 break;
3370 }
3371
3372 return val & 0xffff;
3373 }
3374
3375 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3376 unsigned int reg, unsigned int val)
3377 {
3378 switch (pl->act_link_an_mode) {
3379 case MLO_AN_FIXED:
3380 break;
3381
3382 case MLO_AN_PHY:
3383 return -EOPNOTSUPP;
3384
3385 case MLO_AN_INBAND:
3386 break;
3387 }
3388
3389 return 0;
3390 }
3391
3392 /**
3393 * phylink_mii_ioctl() - generic mii ioctl interface
3394 * @pl: a pointer to a &struct phylink returned from phylink_create()
3395 * @ifr: a pointer to a &struct ifreq for socket ioctls
3396 * @cmd: ioctl cmd to execute
3397 *
3398 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3399 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3400 *
3401 * Returns: zero on success or negative error code.
3402 *
3403 * %SIOCGMIIPHY:
3404 * read register from the current PHY.
3405 * %SIOCGMIIREG:
3406 * read register from the specified PHY.
3407 * %SIOCSMIIREG:
3408 * set a register on the specified PHY.
3409 */
3410 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3411 {
3412 struct mii_ioctl_data *mii = if_mii(ifr);
3413 int ret;
3414
3415 ASSERT_RTNL();
3416
3417 if (pl->phydev) {
3418 /* PHYs only exist for MLO_AN_PHY and SGMII */
3419 switch (cmd) {
3420 case SIOCGMIIPHY:
3421 mii->phy_id = pl->phydev->mdio.addr;
3422 fallthrough;
3423
3424 case SIOCGMIIREG:
3425 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3426 if (ret >= 0) {
3427 mii->val_out = ret;
3428 ret = 0;
3429 }
3430 break;
3431
3432 case SIOCSMIIREG:
3433 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3434 mii->val_in);
3435 break;
3436
3437 default:
3438 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3439 break;
3440 }
3441 } else {
3442 switch (cmd) {
3443 case SIOCGMIIPHY:
3444 mii->phy_id = 0;
3445 fallthrough;
3446
3447 case SIOCGMIIREG:
3448 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3449 if (ret >= 0) {
3450 mii->val_out = ret;
3451 ret = 0;
3452 }
3453 break;
3454
3455 case SIOCSMIIREG:
3456 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3457 mii->val_in);
3458 break;
3459
3460 default:
3461 ret = -EOPNOTSUPP;
3462 break;
3463 }
3464 }
3465
3466 return ret;
3467 }
3468 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3469
3470 /**
3471 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3472 * link partners
3473 * @pl: a pointer to a &struct phylink returned from phylink_create()
3474 * @sync: perform action synchronously
3475 *
3476 * If we have a PHY that is not part of a SFP module, then set the speed
3477 * as described in the phy_speed_down() function. Please see this function
3478 * for a description of the @sync parameter.
3479 *
3480 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3481 */
3482 int phylink_speed_down(struct phylink *pl, bool sync)
3483 {
3484 int ret = 0;
3485
3486 ASSERT_RTNL();
3487
3488 if (!pl->sfp_bus && pl->phydev)
3489 ret = phy_speed_down(pl->phydev, sync);
3490
3491 return ret;
3492 }
3493 EXPORT_SYMBOL_GPL(phylink_speed_down);
3494
3495 /**
3496 * phylink_speed_up() - restore the advertised speeds prior to the call to
3497 * phylink_speed_down()
3498 * @pl: a pointer to a &struct phylink returned from phylink_create()
3499 *
3500 * If we have a PHY that is not part of a SFP module, then restore the
3501 * PHY speeds as per phy_speed_up().
3502 *
3503 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3504 */
3505 int phylink_speed_up(struct phylink *pl)
3506 {
3507 int ret = 0;
3508
3509 ASSERT_RTNL();
3510
3511 if (!pl->sfp_bus && pl->phydev)
3512 ret = phy_speed_up(pl->phydev);
3513
3514 return ret;
3515 }
3516 EXPORT_SYMBOL_GPL(phylink_speed_up);
3517
3518 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3519 {
3520 struct phylink *pl = upstream;
3521
3522 pl->netdev->sfp_bus = bus;
3523 }
3524
3525 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3526 {
3527 struct phylink *pl = upstream;
3528
3529 pl->netdev->sfp_bus = NULL;
3530 }
3531
3532 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3533 const unsigned long *intf)
3534 {
3535 phy_interface_t interface;
3536 size_t i;
3537
3538 interface = PHY_INTERFACE_MODE_NA;
3539 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3540 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3541 interface = phylink_sfp_interface_preference[i];
3542 break;
3543 }
3544
3545 return interface;
3546 }
3547
3548 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3549 struct phylink_link_state *state,
3550 bool changed)
3551 {
3552 u8 mode = MLO_AN_INBAND;
3553
3554 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3555 phylink_an_mode_str(mode), phy_modes(state->interface),
3556 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3557
3558 if (!linkmode_equal(pl->supported, supported)) {
3559 linkmode_copy(pl->supported, supported);
3560 changed = true;
3561 }
3562
3563 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3564 linkmode_copy(pl->link_config.advertising, state->advertising);
3565 changed = true;
3566 }
3567
3568 if (pl->req_link_an_mode != mode ||
3569 pl->link_config.interface != state->interface) {
3570 pl->req_link_an_mode = mode;
3571 pl->link_config.interface = state->interface;
3572
3573 changed = true;
3574
3575 phylink_info(pl, "switched to %s/%s link mode\n",
3576 phylink_an_mode_str(mode),
3577 phy_modes(state->interface));
3578 }
3579
3580 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3581 &pl->phylink_disable_state))
3582 phylink_mac_initial_config(pl, false);
3583 }
3584
3585 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3586 {
3587 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3588 struct phylink_link_state config;
3589 int ret;
3590
3591 linkmode_copy(support, phy->supported);
3592
3593 memset(&config, 0, sizeof(config));
3594 linkmode_copy(config.advertising, phy->advertising);
3595 config.interface = PHY_INTERFACE_MODE_NA;
3596 config.speed = SPEED_UNKNOWN;
3597 config.duplex = DUPLEX_UNKNOWN;
3598 config.pause = MLO_PAUSE_AN;
3599
3600 /* Ignore errors if we're expecting a PHY to attach later */
3601 ret = phylink_validate(pl, support, &config);
3602 if (ret) {
3603 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3604 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3605 ERR_PTR(ret));
3606 return ret;
3607 }
3608
3609 config.interface = phylink_sfp_select_interface(pl, config.advertising);
3610 if (config.interface == PHY_INTERFACE_MODE_NA)
3611 return -EINVAL;
3612
3613 /* Attach the PHY so that the PHY is present when we do the major
3614 * configuration step.
3615 */
3616 ret = phylink_attach_phy(pl, phy, config.interface);
3617 if (ret < 0)
3618 return ret;
3619
3620 /* This will validate the configuration for us. */
3621 ret = phylink_bringup_phy(pl, phy, config.interface);
3622 if (ret < 0) {
3623 phy_detach(phy);
3624 return ret;
3625 }
3626
3627 pl->link_port = pl->sfp_port;
3628
3629 phylink_sfp_set_config(pl, support, &config, true);
3630
3631 return 0;
3632 }
3633
3634 static int phylink_sfp_config_optical(struct phylink *pl)
3635 {
3636 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3637 DECLARE_PHY_INTERFACE_MASK(interfaces);
3638 struct phylink_link_state config;
3639 phy_interface_t interface;
3640 int ret;
3641
3642 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3643 (int)PHY_INTERFACE_MODE_MAX,
3644 pl->config->supported_interfaces,
3645 (int)PHY_INTERFACE_MODE_MAX,
3646 pl->sfp_interfaces);
3647
3648 /* Find the union of the supported interfaces by the PCS/MAC and
3649 * the SFP module.
3650 */
3651 phy_interface_and(interfaces, pl->config->supported_interfaces,
3652 pl->sfp_interfaces);
3653 if (phy_interface_empty(interfaces)) {
3654 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3655 return -EINVAL;
3656 }
3657
3658 memset(&config, 0, sizeof(config));
3659 linkmode_copy(support, pl->sfp_support);
3660 linkmode_copy(config.advertising, pl->sfp_support);
3661 config.speed = SPEED_UNKNOWN;
3662 config.duplex = DUPLEX_UNKNOWN;
3663 config.pause = MLO_PAUSE_AN;
3664
3665 /* For all the interfaces that are supported, reduce the sfp_support
3666 * mask to only those link modes that can be supported.
3667 */
3668 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3669 interfaces);
3670 if (ret) {
3671 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3672 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3673 return ret;
3674 }
3675
3676 interface = phylink_choose_sfp_interface(pl, interfaces);
3677 if (interface == PHY_INTERFACE_MODE_NA) {
3678 phylink_err(pl, "failed to select SFP interface\n");
3679 return -EINVAL;
3680 }
3681
3682 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3683 phy_modes(interface));
3684
3685 if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3686 config.advertising)) {
3687 phylink_err(pl, "autoneg setting not compatible with PCS");
3688 return -EINVAL;
3689 }
3690
3691 config.interface = interface;
3692
3693 /* Ignore errors if we're expecting a PHY to attach later */
3694 ret = phylink_validate(pl, support, &config);
3695 if (ret) {
3696 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3697 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3698 ERR_PTR(ret));
3699 return ret;
3700 }
3701
3702 pl->link_port = pl->sfp_port;
3703
3704 phylink_sfp_set_config(pl, pl->sfp_support, &config, false);
3705
3706 return 0;
3707 }
3708
3709 static int phylink_sfp_module_insert(void *upstream,
3710 const struct sfp_eeprom_id *id)
3711 {
3712 struct phylink *pl = upstream;
3713
3714 ASSERT_RTNL();
3715
3716 linkmode_zero(pl->sfp_support);
3717 phy_interface_zero(pl->sfp_interfaces);
3718 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3719 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3720
3721 /* If this module may have a PHY connecting later, defer until later */
3722 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3723 if (pl->sfp_may_have_phy)
3724 return 0;
3725
3726 return phylink_sfp_config_optical(pl);
3727 }
3728
3729 static int phylink_sfp_module_start(void *upstream)
3730 {
3731 struct phylink *pl = upstream;
3732
3733 /* If this SFP module has a PHY, start the PHY now. */
3734 if (pl->phydev) {
3735 phy_start(pl->phydev);
3736 return 0;
3737 }
3738
3739 /* If the module may have a PHY but we didn't detect one we
3740 * need to configure the MAC here.
3741 */
3742 if (!pl->sfp_may_have_phy)
3743 return 0;
3744
3745 return phylink_sfp_config_optical(pl);
3746 }
3747
3748 static void phylink_sfp_module_stop(void *upstream)
3749 {
3750 struct phylink *pl = upstream;
3751
3752 /* If this SFP module has a PHY, stop it. */
3753 if (pl->phydev)
3754 phy_stop(pl->phydev);
3755 }
3756
3757 static void phylink_sfp_link_down(void *upstream)
3758 {
3759 struct phylink *pl = upstream;
3760
3761 ASSERT_RTNL();
3762
3763 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3764 }
3765
3766 static void phylink_sfp_link_up(void *upstream)
3767 {
3768 struct phylink *pl = upstream;
3769
3770 ASSERT_RTNL();
3771
3772 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3773 }
3774
3775 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3776 {
3777 struct phylink *pl = upstream;
3778
3779 if (!phy->drv) {
3780 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3781 phydev_name(phy), (unsigned long)phy->phy_id);
3782 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3783 return -EINVAL;
3784 }
3785
3786 /*
3787 * This is the new way of dealing with flow control for PHYs,
3788 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3789 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3790 * using our validate call to the MAC, we rely upon the MAC
3791 * clearing the bits from both supported and advertising fields.
3792 */
3793 phy_support_asym_pause(phy);
3794
3795 /* Set the PHY's host supported interfaces */
3796 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3797 pl->config->supported_interfaces);
3798
3799 /* Do the initial configuration */
3800 return phylink_sfp_config_phy(pl, phy);
3801 }
3802
3803 static void phylink_sfp_disconnect_phy(void *upstream,
3804 struct phy_device *phydev)
3805 {
3806 phylink_disconnect_phy(upstream);
3807 }
3808
3809 static const struct sfp_upstream_ops sfp_phylink_ops = {
3810 .attach = phylink_sfp_attach,
3811 .detach = phylink_sfp_detach,
3812 .module_insert = phylink_sfp_module_insert,
3813 .module_start = phylink_sfp_module_start,
3814 .module_stop = phylink_sfp_module_stop,
3815 .link_up = phylink_sfp_link_up,
3816 .link_down = phylink_sfp_link_down,
3817 .connect_phy = phylink_sfp_connect_phy,
3818 .disconnect_phy = phylink_sfp_disconnect_phy,
3819 };
3820
3821 /* Helpers for MAC drivers */
3822
3823 static struct {
3824 int bit;
3825 int speed;
3826 } phylink_c73_priority_resolution[] = {
3827 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3828 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3829 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3830 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3831 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3832 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3833 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3834 /* 5GBASE-KR not supported */
3835 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3836 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3837 };
3838
3839 void phylink_resolve_c73(struct phylink_link_state *state)
3840 {
3841 int i;
3842
3843 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3844 int bit = phylink_c73_priority_resolution[i].bit;
3845 if (linkmode_test_bit(bit, state->advertising) &&
3846 linkmode_test_bit(bit, state->lp_advertising))
3847 break;
3848 }
3849
3850 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3851 state->speed = phylink_c73_priority_resolution[i].speed;
3852 state->duplex = DUPLEX_FULL;
3853 } else {
3854 /* negotiation failure */
3855 state->link = false;
3856 }
3857
3858 phylink_resolve_an_pause(state);
3859 }
3860 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3861
3862 static void phylink_decode_c37_word(struct phylink_link_state *state,
3863 uint16_t config_reg, int speed)
3864 {
3865 int fd_bit;
3866
3867 if (speed == SPEED_2500)
3868 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3869 else
3870 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3871
3872 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3873
3874 if (linkmode_test_bit(fd_bit, state->advertising) &&
3875 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3876 state->speed = speed;
3877 state->duplex = DUPLEX_FULL;
3878 } else {
3879 /* negotiation failure */
3880 state->link = false;
3881 }
3882
3883 phylink_resolve_an_pause(state);
3884 }
3885
3886 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3887 uint16_t config_reg)
3888 {
3889 if (!(config_reg & LPA_SGMII_LINK)) {
3890 state->link = false;
3891 return;
3892 }
3893
3894 switch (config_reg & LPA_SGMII_SPD_MASK) {
3895 case LPA_SGMII_10:
3896 state->speed = SPEED_10;
3897 break;
3898 case LPA_SGMII_100:
3899 state->speed = SPEED_100;
3900 break;
3901 case LPA_SGMII_1000:
3902 state->speed = SPEED_1000;
3903 break;
3904 default:
3905 state->link = false;
3906 return;
3907 }
3908 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3909 state->duplex = DUPLEX_FULL;
3910 else
3911 state->duplex = DUPLEX_HALF;
3912 }
3913
3914 /**
3915 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3916 * @state: a pointer to a struct phylink_link_state.
3917 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3918 *
3919 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3920 * code word. Decode the USXGMII code word and populate the corresponding fields
3921 * (speed, duplex) into the phylink_link_state structure.
3922 */
3923 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3924 uint16_t lpa)
3925 {
3926 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3927 case MDIO_USXGMII_10:
3928 state->speed = SPEED_10;
3929 break;
3930 case MDIO_USXGMII_100:
3931 state->speed = SPEED_100;
3932 break;
3933 case MDIO_USXGMII_1000:
3934 state->speed = SPEED_1000;
3935 break;
3936 case MDIO_USXGMII_2500:
3937 state->speed = SPEED_2500;
3938 break;
3939 case MDIO_USXGMII_5000:
3940 state->speed = SPEED_5000;
3941 break;
3942 case MDIO_USXGMII_10G:
3943 state->speed = SPEED_10000;
3944 break;
3945 default:
3946 state->link = false;
3947 return;
3948 }
3949
3950 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3951 state->duplex = DUPLEX_FULL;
3952 else
3953 state->duplex = DUPLEX_HALF;
3954 }
3955 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3956
3957 /**
3958 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3959 * @state: a pointer to a struct phylink_link_state.
3960 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3961 *
3962 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3963 * code word. Decode the USGMII code word and populate the corresponding fields
3964 * (speed, duplex) into the phylink_link_state structure. The structure for this
3965 * word is the same as the USXGMII word, except it only supports speeds up to
3966 * 1Gbps.
3967 */
3968 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3969 uint16_t lpa)
3970 {
3971 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3972 case MDIO_USXGMII_10:
3973 state->speed = SPEED_10;
3974 break;
3975 case MDIO_USXGMII_100:
3976 state->speed = SPEED_100;
3977 break;
3978 case MDIO_USXGMII_1000:
3979 state->speed = SPEED_1000;
3980 break;
3981 default:
3982 state->link = false;
3983 return;
3984 }
3985
3986 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3987 state->duplex = DUPLEX_FULL;
3988 else
3989 state->duplex = DUPLEX_HALF;
3990 }
3991
3992 /**
3993 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3994 * @state: a pointer to a &struct phylink_link_state.
3995 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
3996 * @bmsr: The value of the %MII_BMSR register
3997 * @lpa: The value of the %MII_LPA register
3998 *
3999 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4000 * clause 37 negotiation and/or SGMII control.
4001 *
4002 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
4003 * the phylink @state structure. This is suitable to be used for implementing
4004 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
4005 * accessing @bmsr and @lpa cannot be done with MDIO directly.
4006 */
4007 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
4008 unsigned int neg_mode, u16 bmsr, u16 lpa)
4009 {
4010 state->link = !!(bmsr & BMSR_LSTATUS);
4011 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
4012
4013 /* If the link is down, the advertisement data is undefined. */
4014 if (!state->link)
4015 return;
4016
4017 switch (state->interface) {
4018 case PHY_INTERFACE_MODE_1000BASEX:
4019 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4020 phylink_decode_c37_word(state, lpa, SPEED_1000);
4021 } else {
4022 state->speed = SPEED_1000;
4023 state->duplex = DUPLEX_FULL;
4024 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4025 }
4026 break;
4027
4028 case PHY_INTERFACE_MODE_2500BASEX:
4029 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4030 phylink_decode_c37_word(state, lpa, SPEED_2500);
4031 } else {
4032 state->speed = SPEED_2500;
4033 state->duplex = DUPLEX_FULL;
4034 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4035 }
4036 break;
4037
4038 case PHY_INTERFACE_MODE_SGMII:
4039 case PHY_INTERFACE_MODE_QSGMII:
4040 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4041 phylink_decode_sgmii_word(state, lpa);
4042 break;
4043
4044 case PHY_INTERFACE_MODE_QUSGMII:
4045 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4046 phylink_decode_usgmii_word(state, lpa);
4047 break;
4048
4049 default:
4050 state->link = false;
4051 break;
4052 }
4053 }
4054 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
4055
4056 /**
4057 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4058 * @pcs: a pointer to a &struct mdio_device.
4059 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4060 * @state: a pointer to a &struct phylink_link_state.
4061 *
4062 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4063 * clause 37 negotiation and/or SGMII control.
4064 *
4065 * Read the MAC PCS state from the MII device configured in @config and
4066 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
4067 * the phylink @state structure. This is suitable to be directly plugged
4068 * into the pcs_get_state() member of the struct phylink_pcs_ops
4069 * structure.
4070 */
4071 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4072 unsigned int neg_mode,
4073 struct phylink_link_state *state)
4074 {
4075 int bmsr, lpa;
4076
4077 bmsr = mdiodev_read(pcs, MII_BMSR);
4078 lpa = mdiodev_read(pcs, MII_LPA);
4079 if (bmsr < 0 || lpa < 0) {
4080 state->link = false;
4081 return;
4082 }
4083
4084 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4085 }
4086 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4087
4088 /**
4089 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4090 * advertisement
4091 * @interface: the PHY interface mode being configured
4092 * @advertising: the ethtool advertisement mask
4093 *
4094 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4095 * clause 37 negotiation and/or SGMII control.
4096 *
4097 * Encode the clause 37 PCS advertisement as specified by @interface and
4098 * @advertising.
4099 *
4100 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4101 */
4102 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4103 const unsigned long *advertising)
4104 {
4105 u16 adv;
4106
4107 switch (interface) {
4108 case PHY_INTERFACE_MODE_1000BASEX:
4109 case PHY_INTERFACE_MODE_2500BASEX:
4110 adv = ADVERTISE_1000XFULL;
4111 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4112 advertising))
4113 adv |= ADVERTISE_1000XPAUSE;
4114 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4115 advertising))
4116 adv |= ADVERTISE_1000XPSE_ASYM;
4117 return adv;
4118 case PHY_INTERFACE_MODE_SGMII:
4119 case PHY_INTERFACE_MODE_QSGMII:
4120 return 0x0001;
4121 default:
4122 /* Nothing to do for other modes */
4123 return -EINVAL;
4124 }
4125 }
4126 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4127
4128 /**
4129 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
4130 * @pcs: a pointer to a &struct mdio_device.
4131 * @interface: the PHY interface mode being configured
4132 * @advertising: the ethtool advertisement mask
4133 * @neg_mode: PCS negotiation mode
4134 *
4135 * Configure a Clause 22 PCS PHY with the appropriate negotiation
4136 * parameters for the @mode, @interface and @advertising parameters.
4137 * Returns negative error number on failure, zero if the advertisement
4138 * has not changed, or positive if there is a change.
4139 */
4140 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4141 phy_interface_t interface,
4142 const unsigned long *advertising,
4143 unsigned int neg_mode)
4144 {
4145 bool changed = 0;
4146 u16 bmcr;
4147 int ret, adv;
4148
4149 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4150 if (adv >= 0) {
4151 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
4152 MII_ADVERTISE, 0xffff, adv);
4153 if (ret < 0)
4154 return ret;
4155 changed = ret;
4156 }
4157
4158 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4159 bmcr = BMCR_ANENABLE;
4160 else
4161 bmcr = 0;
4162
4163 /* Configure the inband state. Ensure ISOLATE bit is disabled */
4164 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
4165 if (ret < 0)
4166 return ret;
4167
4168 return changed;
4169 }
4170 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4171
4172 /**
4173 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4174 * @pcs: a pointer to a &struct mdio_device.
4175 *
4176 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4177 * clause 37 negotiation.
4178 *
4179 * Restart the clause 37 negotiation with the link partner. This is
4180 * suitable to be directly plugged into the pcs_get_state() member
4181 * of the struct phylink_pcs_ops structure.
4182 */
4183 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4184 {
4185 int val = mdiodev_read(pcs, MII_BMCR);
4186
4187 if (val >= 0) {
4188 val |= BMCR_ANRESTART;
4189
4190 mdiodev_write(pcs, MII_BMCR, val);
4191 }
4192 }
4193 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4194
4195 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4196 struct phylink_link_state *state)
4197 {
4198 struct mii_bus *bus = pcs->bus;
4199 int addr = pcs->addr;
4200 int stat;
4201
4202 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4203 if (stat < 0) {
4204 state->link = false;
4205 return;
4206 }
4207
4208 state->link = !!(stat & MDIO_STAT1_LSTATUS);
4209 if (!state->link)
4210 return;
4211
4212 switch (state->interface) {
4213 case PHY_INTERFACE_MODE_10GBASER:
4214 state->speed = SPEED_10000;
4215 state->duplex = DUPLEX_FULL;
4216 break;
4217
4218 default:
4219 break;
4220 }
4221 }
4222 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4223
4224 static int __init phylink_init(void)
4225 {
4226 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4227 __set_bit(phylink_sfp_interface_preference[i],
4228 phylink_sfp_interfaces);
4229
4230 return 0;
4231 }
4232
4233 module_init(phylink_init);
4234
4235 MODULE_LICENSE("GPL v2");
4236 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
Linux Kernel