drivers/pinctrl/intel/pinctrl-meteorlake.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel Meteor Lake PCH pinctrl/GPIO driver
   4  *
   5  * Copyright (C) 2022, Intel Corporation
   6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
   7  */
   8
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/module.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/pm.h>
  13
  14 #include <linux/pinctrl/pinctrl.h>
  15
  16 #include "pinctrl-intel.h"
  17
  18 #define MTL_P_PAD_OWN           0x0b0
  19 #define MTL_P_PADCFGLOCK        0x110
  20 #define MTL_P_HOSTSW_OWN        0x140
  21 #define MTL_P_GPI_IS            0x200
  22 #define MTL_P_GPI_IE            0x210
  23
  24 #define MTL_S_PAD_OWN           0x0b0
  25 #define MTL_S_PADCFGLOCK        0x0f0
  26 #define MTL_S_HOSTSW_OWN        0x110
  27 #define MTL_S_GPI_IS            0x200
  28 #define MTL_S_GPI_IE            0x210
  29
  30 #define MTL_GPP(r, s, e, g)                             \
  31         {                                               \
  32                 .reg_num = (r),                         \
  33                 .base = (s),                            \
  34                 .size = ((e) - (s) + 1),                \
  35                 .gpio_base = (g),                       \
  36         }
  37
  38 #define MTL_P_COMMUNITY(b, s, e, g)                     \
  39         INTEL_COMMUNITY_GPPS(b, s, e, g, MTL_P)
  40
  41 #define MTL_S_COMMUNITY(b, s, e, g)                     \
  42         INTEL_COMMUNITY_GPPS(b, s, e, g, MTL_S)
  43
  44 /* Meteor Lake-P */
  45 static const struct pinctrl_pin_desc mtlp_pins[] = {
  46         /* CPU */
  47         PINCTRL_PIN(0, "PECI"),
  48         PINCTRL_PIN(1, "UFS_RESET_B"),
  49         PINCTRL_PIN(2, "VIDSOUT"),
  50         PINCTRL_PIN(3, "VIDSCK"),
  51         PINCTRL_PIN(4, "VIDALERT_B"),
  52         /* GPP_V */
  53         PINCTRL_PIN(5, "BATLOW_B"),
  54         PINCTRL_PIN(6, "AC_PRESENT"),
  55         PINCTRL_PIN(7, "SOC_WAKE_B"),
  56         PINCTRL_PIN(8, "PWRBTN_B"),
  57         PINCTRL_PIN(9, "SLP_S3_B"),
  58         PINCTRL_PIN(10, "SLP_S4_B"),
  59         PINCTRL_PIN(11, "SLP_A_B"),
  60         PINCTRL_PIN(12, "GPP_V_7"),
  61         PINCTRL_PIN(13, "SUSCLK"),
  62         PINCTRL_PIN(14, "SLP_WLAN_B"),
  63         PINCTRL_PIN(15, "SLP_S5_B"),
  64         PINCTRL_PIN(16, "LANPHYPC"),
  65         PINCTRL_PIN(17, "SLP_LAN_B"),
  66         PINCTRL_PIN(18, "GPP_V_13"),
  67         PINCTRL_PIN(19, "WAKE_B"),
  68         PINCTRL_PIN(20, "GPP_V_15"),
  69         PINCTRL_PIN(21, "GPP_V_16"),
  70         PINCTRL_PIN(22, "GPP_V_17"),
  71         PINCTRL_PIN(23, "GPP_V_18"),
  72         PINCTRL_PIN(24, "CATERR_B"),
  73         PINCTRL_PIN(25, "PROCHOT_B"),
  74         PINCTRL_PIN(26, "THERMTRIP_B"),
  75         PINCTRL_PIN(27, "DSI_DE_TE_2_GENLOCK_REF"),
  76         PINCTRL_PIN(28, "DSI_DE_TE_1_DISP_UTILS"),
  77         /* GPP_C */
  78         PINCTRL_PIN(29, "SMBCLK"),
  79         PINCTRL_PIN(30, "SMBDATA"),
  80         PINCTRL_PIN(31, "SMBALERT_B"),
  81         PINCTRL_PIN(32, "SML0CLK"),
  82         PINCTRL_PIN(33, "SML0DATA"),
  83         PINCTRL_PIN(34, "GPP_C_5"),
  84         PINCTRL_PIN(35, "GPP_C_6"),
  85         PINCTRL_PIN(36, "GPP_C_7"),
  86         PINCTRL_PIN(37, "GPP_C_8"),
  87         PINCTRL_PIN(38, "GPP_C_9"),
  88         PINCTRL_PIN(39, "GPP_C_10"),
  89         PINCTRL_PIN(40, "GPP_C_11"),
  90         PINCTRL_PIN(41, "GPP_C_12"),
  91         PINCTRL_PIN(42, "GPP_C_13"),
  92         PINCTRL_PIN(43, "GPP_C_14"),
  93         PINCTRL_PIN(44, "GPP_C_15"),
  94         PINCTRL_PIN(45, "GPP_C_16"),
  95         PINCTRL_PIN(46, "GPP_C_17"),
  96         PINCTRL_PIN(47, "GPP_C_18"),
  97         PINCTRL_PIN(48, "GPP_C_19"),
  98         PINCTRL_PIN(49, "GPP_C_20"),
  99         PINCTRL_PIN(50, "GPP_C_21"),
 100         PINCTRL_PIN(51, "GPP_C_22"),
 101         PINCTRL_PIN(52, "GPP_C_23"),
 102         /* GPP_A */
 103         PINCTRL_PIN(53, "ESPI_IO_0"),
 104         PINCTRL_PIN(54, "ESPI_IO_1"),
 105         PINCTRL_PIN(55, "ESPI_IO_2"),
 106         PINCTRL_PIN(56, "ESPI_IO_3"),
 107         PINCTRL_PIN(57, "ESPI_CS0_B"),
 108         PINCTRL_PIN(58, "ESPI_CLK"),
 109         PINCTRL_PIN(59, "ESPI_RESET_B"),
 110         PINCTRL_PIN(60, "GPP_A_7"),
 111         PINCTRL_PIN(61, "GPP_A_8"),
 112         PINCTRL_PIN(62, "GPP_A_9"),
 113         PINCTRL_PIN(63, "GPP_A_10"),
 114         PINCTRL_PIN(64, "GPP_A_11"),
 115         PINCTRL_PIN(65, "GPP_A_12"),
 116         PINCTRL_PIN(66, "ESPI_CS1_B"),
 117         PINCTRL_PIN(67, "ESPI_CS2_B"),
 118         PINCTRL_PIN(68, "ESPI_CS3_B"),
 119         PINCTRL_PIN(69, "ESPI_ALERT0_B"),
 120         PINCTRL_PIN(70, "ESPI_ALERT1_B"),
 121         PINCTRL_PIN(71, "ESPI_ALERT2_B"),
 122         PINCTRL_PIN(72, "ESPI_ALERT3_B"),
 123         PINCTRL_PIN(73, "GPP_A_20"),
 124         PINCTRL_PIN(74, "GPP_A_21"),
 125         PINCTRL_PIN(75, "GPP_A_22"),
 126         PINCTRL_PIN(76, "GPP_A_23"),
 127         PINCTRL_PIN(77, "ESPI_CLK_LOOPBK"),
 128         /* GPP_E */
 129         PINCTRL_PIN(78, "GPP_E_0"),
 130         PINCTRL_PIN(79, "GPP_E_1"),
 131         PINCTRL_PIN(80, "GPP_E_2"),
 132         PINCTRL_PIN(81, "GPP_E_3"),
 133         PINCTRL_PIN(82, "GPP_E_4"),
 134         PINCTRL_PIN(83, "GPP_E_5"),
 135         PINCTRL_PIN(84, "GPP_E_6"),
 136         PINCTRL_PIN(85, "GPP_E_7"),
 137         PINCTRL_PIN(86, "GPP_E_8"),
 138         PINCTRL_PIN(87, "GPP_E_9"),
 139         PINCTRL_PIN(88, "GPP_E_10"),
 140         PINCTRL_PIN(89, "GPP_E_11"),
 141         PINCTRL_PIN(90, "GPP_E_12"),
 142         PINCTRL_PIN(91, "GPP_E_13"),
 143         PINCTRL_PIN(92, "GPP_E_14"),
 144         PINCTRL_PIN(93, "SLP_DRAM_B"),
 145         PINCTRL_PIN(94, "GPP_E_16"),
 146         PINCTRL_PIN(95, "GPP_E_17"),
 147         PINCTRL_PIN(96, "GPP_E_18"),
 148         PINCTRL_PIN(97, "GPP_E_19"),
 149         PINCTRL_PIN(98, "GPP_E_20"),
 150         PINCTRL_PIN(99, "GPP_E_21"),
 151         PINCTRL_PIN(100, "DNX_FORCE_RELOAD"),
 152         PINCTRL_PIN(101, "GPP_E_23"),
 153         PINCTRL_PIN(102, "THC0_GSPI0_CLK_LOOPBK"),
 154         /* GPP_H */
 155         PINCTRL_PIN(103, "GPP_H_0"),
 156         PINCTRL_PIN(104, "GPP_H_1"),
 157         PINCTRL_PIN(105, "GPP_H_2"),
 158         PINCTRL_PIN(106, "GPP_H_3"),
 159         PINCTRL_PIN(107, "GPP_H_4"),
 160         PINCTRL_PIN(108, "GPP_H_5"),
 161         PINCTRL_PIN(109, "GPP_H_6"),
 162         PINCTRL_PIN(110, "GPP_H_7"),
 163         PINCTRL_PIN(111, "GPP_H_8"),
 164         PINCTRL_PIN(112, "GPP_H_9"),
 165         PINCTRL_PIN(113, "GPP_H_10"),
 166         PINCTRL_PIN(114, "GPP_H_11"),
 167         PINCTRL_PIN(115, "GPP_H_12"),
 168         PINCTRL_PIN(116, "CPU_C10_GATE_B"),
 169         PINCTRL_PIN(117, "GPP_H_14"),
 170         PINCTRL_PIN(118, "GPP_H_15"),
 171         PINCTRL_PIN(119, "GPP_H_16"),
 172         PINCTRL_PIN(120, "GPP_H_17"),
 173         PINCTRL_PIN(121, "GPP_H_18"),
 174         PINCTRL_PIN(122, "GPP_H_19"),
 175         PINCTRL_PIN(123, "GPP_H_20"),
 176         PINCTRL_PIN(124, "GPP_H_21"),
 177         PINCTRL_PIN(125, "GPP_H_22"),
 178         PINCTRL_PIN(126, "GPP_H_23"),
 179         PINCTRL_PIN(127, "LPI3C1_CLK_LOOPBK"),
 180         PINCTRL_PIN(128, "I3C0_CLK_LOOPBK"),
 181         /* GPP_F */
 182         PINCTRL_PIN(129, "CNV_BRI_DT"),
 183         PINCTRL_PIN(130, "CNV_BRI_RSP"),
 184         PINCTRL_PIN(131, "CNV_RGI_DT"),
 185         PINCTRL_PIN(132, "CNV_RGI_RSP"),
 186         PINCTRL_PIN(133, "CNV_RF_RESET_B"),
 187         PINCTRL_PIN(134, "CRF_CLKREQ"),
 188         PINCTRL_PIN(135, "GPP_F_6"),
 189         PINCTRL_PIN(136, "FUSA_DIAGTEST_EN"),
 190         PINCTRL_PIN(137, "FUSA_DIAGTEST_MODE"),
 191         PINCTRL_PIN(138, "BOOTMPC"),
 192         PINCTRL_PIN(139, "GPP_F_10"),
 193         PINCTRL_PIN(140, "GPP_F_11"),
 194         PINCTRL_PIN(141, "GSXDOUT"),
 195         PINCTRL_PIN(142, "GSXSLOAD"),
 196         PINCTRL_PIN(143, "GSXDIN"),
 197         PINCTRL_PIN(144, "GSXSRESETB"),
 198         PINCTRL_PIN(145, "GSXCLK"),
 199         PINCTRL_PIN(146, "GMII_MDC_0"),
 200         PINCTRL_PIN(147, "GMII_MDIO_0"),
 201         PINCTRL_PIN(148, "GPP_F_19"),
 202         PINCTRL_PIN(149, "GPP_F_20"),
 203         PINCTRL_PIN(150, "GPP_F_21"),
 204         PINCTRL_PIN(151, "GPP_F_22"),
 205         PINCTRL_PIN(152, "GPP_F_23"),
 206         PINCTRL_PIN(153, "THC1_GSPI1_CLK_LOOPBK"),
 207         PINCTRL_PIN(154, "GSPI0A_CLK_LOOPBK"),
 208         /* SPI0 */
 209         PINCTRL_PIN(155, "SPI0_IO_2"),
 210         PINCTRL_PIN(156, "SPI0_IO_3"),
 211         PINCTRL_PIN(157, "SPI0_MOSI_IO_0"),
 212         PINCTRL_PIN(158, "SPI0_MISO_IO_1"),
 213         PINCTRL_PIN(159, "SPI0_TPM_CS_B"),
 214         PINCTRL_PIN(160, "SPI0_FLASH_0_CS_B"),
 215         PINCTRL_PIN(161, "SPI0_FLASH_1_CS_B"),
 216         PINCTRL_PIN(162, "SPI0_CLK"),
 217         PINCTRL_PIN(163, "L_BKLTEN"),
 218         PINCTRL_PIN(164, "L_BKLTCTL"),
 219         PINCTRL_PIN(165, "L_VDDEN"),
 220         PINCTRL_PIN(166, "SYS_PWROK"),
 221         PINCTRL_PIN(167, "SYS_RESET_B"),
 222         PINCTRL_PIN(168, "MLK_RST_B"),
 223         PINCTRL_PIN(169, "SPI0_CLK_LOOPBK"),
 224         /* vGPIO_3 */
 225         PINCTRL_PIN(170, "ESPI_USB_OCB_0"),
 226         PINCTRL_PIN(171, "ESPI_USB_OCB_1"),
 227         PINCTRL_PIN(172, "ESPI_USB_OCB_2"),
 228         PINCTRL_PIN(173, "ESPI_USB_OCB_3"),
 229         PINCTRL_PIN(174, "USB_CPU_OCB_0"),
 230         PINCTRL_PIN(175, "USB_CPU_OCB_1"),
 231         PINCTRL_PIN(176, "USB_CPU_OCB_2"),
 232         PINCTRL_PIN(177, "USB_CPU_OCB_3"),
 233         PINCTRL_PIN(178, "TS0_IN_INT"),
 234         PINCTRL_PIN(179, "TS1_IN_INT"),
 235         PINCTRL_PIN(180, "THC0_WOT_INT"),
 236         PINCTRL_PIN(181, "THC1_WOT_INT"),
 237         PINCTRL_PIN(182, "THC0_WHC_INT"),
 238         PINCTRL_PIN(183, "THC1_WHC_INT"),
 239         /* GPP_S */
 240         PINCTRL_PIN(184, "GPP_S_0"),
 241         PINCTRL_PIN(185, "GPP_S_1"),
 242         PINCTRL_PIN(186, "GPP_S_2"),
 243         PINCTRL_PIN(187, "GPP_S_3"),
 244         PINCTRL_PIN(188, "GPP_S_4"),
 245         PINCTRL_PIN(189, "GPP_S_5"),
 246         PINCTRL_PIN(190, "GPP_S_6"),
 247         PINCTRL_PIN(191, "GPP_S_7"),
 248         /* JTAG */
 249         PINCTRL_PIN(192, "JTAG_MBPB0"),
 250         PINCTRL_PIN(193, "JTAG_MBPB1"),
 251         PINCTRL_PIN(194, "JTAG_MBPB2"),
 252         PINCTRL_PIN(195, "JTAG_MBPB3"),
 253         PINCTRL_PIN(196, "JTAG_TDO"),
 254         PINCTRL_PIN(197, "PRDY_B"),
 255         PINCTRL_PIN(198, "PREQ_B"),
 256         PINCTRL_PIN(199, "JTAG_TDI"),
 257         PINCTRL_PIN(200, "JTAG_TMS"),
 258         PINCTRL_PIN(201, "JTAG_TCK"),
 259         PINCTRL_PIN(202, "DBG_PMODE"),
 260         PINCTRL_PIN(203, "JTAG_TRST_B"),
 261         /* GPP_B */
 262         PINCTRL_PIN(204, "ADM_VID_0"),
 263         PINCTRL_PIN(205, "ADM_VID_1"),
 264         PINCTRL_PIN(206, "GPP_B_2"),
 265         PINCTRL_PIN(207, "GPP_B_3"),
 266         PINCTRL_PIN(208, "GPP_B_4"),
 267         PINCTRL_PIN(209, "GPP_B_5"),
 268         PINCTRL_PIN(210, "GPP_B_6"),
 269         PINCTRL_PIN(211, "GPP_B_7"),
 270         PINCTRL_PIN(212, "GPP_B_8"),
 271         PINCTRL_PIN(213, "GPP_B_9"),
 272         PINCTRL_PIN(214, "GPP_B_10"),
 273         PINCTRL_PIN(215, "GPP_B_11"),
 274         PINCTRL_PIN(216, "SLP_S0_B"),
 275         PINCTRL_PIN(217, "PLTRST_B"),
 276         PINCTRL_PIN(218, "GPP_B_14"),
 277         PINCTRL_PIN(219, "GPP_B_15"),
 278         PINCTRL_PIN(220, "GPP_B_16"),
 279         PINCTRL_PIN(221, "GPP_B_17"),
 280         PINCTRL_PIN(222, "GPP_B_18"),
 281         PINCTRL_PIN(223, "GPP_B_19"),
 282         PINCTRL_PIN(224, "GPP_B_20"),
 283         PINCTRL_PIN(225, "GPP_B_21"),
 284         PINCTRL_PIN(226, "GPP_B_22"),
 285         PINCTRL_PIN(227, "GPP_B_23"),
 286         PINCTRL_PIN(228, "ISH_I3C0_CLK_LOOPBK"),
 287         /* GPP_D */
 288         PINCTRL_PIN(229, "GPP_D_0"),
 289         PINCTRL_PIN(230, "GPP_D_1"),
 290         PINCTRL_PIN(231, "GPP_D_2"),
 291         PINCTRL_PIN(232, "GPP_D_3"),
 292         PINCTRL_PIN(233, "GPP_D_4"),
 293         PINCTRL_PIN(234, "GPP_D_5"),
 294         PINCTRL_PIN(235, "GPP_D_6"),
 295         PINCTRL_PIN(236, "GPP_D_7"),
 296         PINCTRL_PIN(237, "GPP_D_8"),
 297         PINCTRL_PIN(238, "GPP_D_9"),
 298         PINCTRL_PIN(239, "HDA_BCLK"),
 299         PINCTRL_PIN(240, "HDA_SYNC"),
 300         PINCTRL_PIN(241, "HDA_SDO"),
 301         PINCTRL_PIN(242, "HDA_SDI_0"),
 302         PINCTRL_PIN(243, "GPP_D_14"),
 303         PINCTRL_PIN(244, "GPP_D_15"),
 304         PINCTRL_PIN(245, "GPP_D_16"),
 305         PINCTRL_PIN(246, "HDA_RST_B"),
 306         PINCTRL_PIN(247, "GPP_D_18"),
 307         PINCTRL_PIN(248, "GPP_D_19"),
 308         PINCTRL_PIN(249, "GPP_D_20"),
 309         PINCTRL_PIN(250, "UFS_REFCLK"),
 310         PINCTRL_PIN(251, "BPKI3C_SDA"),
 311         PINCTRL_PIN(252, "BPKI3C_SCL"),
 312         PINCTRL_PIN(253, "BOOTHALT_B"),
 313         /* vGPIO */
 314         PINCTRL_PIN(254, "CNV_BTEN"),
 315         PINCTRL_PIN(255, "CNV_BT_HOST_WAKEB"),
 316         PINCTRL_PIN(256, "CNV_BT_IF_SELECT"),
 317         PINCTRL_PIN(257, "vCNV_BT_UART_TXD"),
 318         PINCTRL_PIN(258, "vCNV_BT_UART_RXD"),
 319         PINCTRL_PIN(259, "vCNV_BT_UART_CTS_B"),
 320         PINCTRL_PIN(260, "vCNV_BT_UART_RTS_B"),
 321         PINCTRL_PIN(261, "vCNV_MFUART1_TXD"),
 322         PINCTRL_PIN(262, "vCNV_MFUART1_RXD"),
 323         PINCTRL_PIN(263, "vCNV_MFUART1_CTS_B"),
 324         PINCTRL_PIN(264, "vCNV_MFUART1_RTS_B"),
 325         PINCTRL_PIN(265, "vUART0_TXD"),
 326         PINCTRL_PIN(266, "vUART0_RXD"),
 327         PINCTRL_PIN(267, "vUART0_CTS_B"),
 328         PINCTRL_PIN(268, "vUART0_RTS_B"),
 329         PINCTRL_PIN(269, "vISH_UART0_TXD"),
 330         PINCTRL_PIN(270, "vISH_UART0_RXD"),
 331         PINCTRL_PIN(271, "vISH_UART0_CTS_B"),
 332         PINCTRL_PIN(272, "vISH_UART0_RTS_B"),
 333         PINCTRL_PIN(273, "vCNV_BT_I2S_BCLK"),
 334         PINCTRL_PIN(274, "vCNV_BT_I2S_WS_SYNC"),
 335         PINCTRL_PIN(275, "vCNV_BT_I2S_SDO"),
 336         PINCTRL_PIN(276, "vCNV_BT_I2S_SDI"),
 337         PINCTRL_PIN(277, "vI2S2_SCLK"),
 338         PINCTRL_PIN(278, "vI2S2_SFRM"),
 339         PINCTRL_PIN(279, "vI2S2_TXD"),
 340         PINCTRL_PIN(280, "vI2S2_RXD"),
 341         PINCTRL_PIN(281, "vCNV_BT_I2S_BCLK_2"),
 342         PINCTRL_PIN(282, "vCNV_BT_I2S_WS_SYNC_2"),
 343         PINCTRL_PIN(283, "vCNV_BT_I2S_SDO_2"),
 344         PINCTRL_PIN(284, "vCNV_BT_I2S_SDI_2"),
 345         PINCTRL_PIN(285, "vI2S2_SCLK_2"),
 346         PINCTRL_PIN(286, "vI2S2_SFRM_2"),
 347         PINCTRL_PIN(287, "vI2S2_TXD_2"),
 348         PINCTRL_PIN(288, "vI2S2_RXD_2"),
 349 };
 350
 351 static const struct intel_padgroup mtlp_community0_gpps[] = {
 352         MTL_GPP(0, 0, 4, 0),            /* CPU */
 353         MTL_GPP(1, 5, 28, 32),          /* GPP_V */
 354         MTL_GPP(2, 29, 52, 64),         /* GPP_C */
 355 };
 356
 357 static const struct intel_padgroup mtlp_community1_gpps[] = {
 358         MTL_GPP(0, 53, 77, 96),         /* GPP_A */
 359         MTL_GPP(1, 78, 102, 128),       /* GPP_E */
 360 };
 361
 362 static const struct intel_padgroup mtlp_community3_gpps[] = {
 363         MTL_GPP(0, 103, 128, 160),      /* GPP_H */
 364         MTL_GPP(1, 129, 154, 192),      /* GPP_F */
 365         MTL_GPP(2, 155, 169, 224),      /* SPI0 */
 366         MTL_GPP(3, 170, 183, 256),      /* vGPIO_3 */
 367 };
 368
 369 static const struct intel_padgroup mtlp_community4_gpps[] = {
 370         MTL_GPP(0, 184, 191, 288),      /* GPP_S */
 371         MTL_GPP(1, 192, 203, 320),      /* JTAG */
 372 };
 373
 374 static const struct intel_padgroup mtlp_community5_gpps[] = {
 375         MTL_GPP(0, 204, 228, 352),      /* GPP_B */
 376         MTL_GPP(1, 229, 253, 384),      /* GPP_D */
 377         MTL_GPP(2, 254, 285, 416),      /* vGPIO_0 */
 378         MTL_GPP(3, 286, 288, 448),      /* vGPIO_1 */
 379 };
 380
 381 static const struct intel_community mtlp_communities[] = {
 382         MTL_P_COMMUNITY(0, 0, 52, mtlp_community0_gpps),
 383         MTL_P_COMMUNITY(1, 53, 102, mtlp_community1_gpps),
 384         MTL_P_COMMUNITY(2, 103, 183, mtlp_community3_gpps),
 385         MTL_P_COMMUNITY(3, 184, 203, mtlp_community4_gpps),
 386         MTL_P_COMMUNITY(4, 204, 288, mtlp_community5_gpps),
 387 };
 388
 389 static const struct intel_pinctrl_soc_data mtlp_soc_data = {
 390         .pins = mtlp_pins,
 391         .npins = ARRAY_SIZE(mtlp_pins),
 392         .communities = mtlp_communities,
 393         .ncommunities = ARRAY_SIZE(mtlp_communities),
 394 };
 395
 396 /* Meteor Lake-S */
 397 static const struct pinctrl_pin_desc mtls_pins[] = {
 398         /* GPP_A */
 399         PINCTRL_PIN(0, "DIR_ESPI_IO_0"),
 400         PINCTRL_PIN(1, "DIR_ESPI_IO_1"),
 401         PINCTRL_PIN(2, "DIR_ESPI_IO_2"),
 402         PINCTRL_PIN(3, "DIR_ESPI_IO_3"),
 403         PINCTRL_PIN(4, "DIR_ESPI_CS0_B"),
 404         PINCTRL_PIN(5, "DIR_ESPI_CLK"),
 405         PINCTRL_PIN(6, "DIR_ESPI_RCLK"),
 406         PINCTRL_PIN(7, "DIR_ESPI_RESET_B"),
 407         PINCTRL_PIN(8, "SLP_S0_B"),
 408         PINCTRL_PIN(9, "DMI_PERSTB"),
 409         PINCTRL_PIN(10, "CATERR_B"),
 410         PINCTRL_PIN(11, "THERMTRIP_B"),
 411         PINCTRL_PIN(12, "CPU_C10_GATE_B"),
 412         PINCTRL_PIN(13, "PS_ONB"),
 413         PINCTRL_PIN(14, "GPP_SA_14"),
 414         PINCTRL_PIN(15, "GPP_SA_15"),
 415         PINCTRL_PIN(16, "GPP_SA_16"),
 416         PINCTRL_PIN(17, "GPP_SA_17"),
 417         PINCTRL_PIN(18, "GPP_SA_18"),
 418         PINCTRL_PIN(19, "GPP_SA_19"),
 419         PINCTRL_PIN(20, "GPP_SA_20"),
 420         PINCTRL_PIN(21, "GPP_SA_21"),
 421         PINCTRL_PIN(22, "FUSA_DIAGTEST_EN"),
 422         PINCTRL_PIN(23, "FUSA_DIAGTEST_MODE"),
 423         PINCTRL_PIN(24, "RTCCLKIN"),
 424         PINCTRL_PIN(25, "RESET_SYNC_B"),
 425         PINCTRL_PIN(26, "PCH_PWROK"),
 426         PINCTRL_PIN(27, "DIR_ESPI_CLK_LOOPBACK"),
 427         /* vGPIO_0 */
 428         PINCTRL_PIN(28, "LPC_ME_FTPM_ENABLE"),
 429         PINCTRL_PIN(29, "LPC_DTFUS_CORE_SPITPM_DIS"),
 430         PINCTRL_PIN(30, "LPC_SPI_STRAP_TOS"),
 431         PINCTRL_PIN(31, "ITSS_KU1_SHTDWN"),
 432         PINCTRL_PIN(32, "LPC_PRR_TS_OVR"),
 433         PINCTRL_PIN(33, "ESPI_PMC_EC_SCI"),
 434         PINCTRL_PIN(34, "ESPI_PMC_EC_SCI1"),
 435         PINCTRL_PIN(35, "vGPIO_SPARE0"),
 436         PINCTRL_PIN(36, "vGPIO_SPARE1"),
 437         PINCTRL_PIN(37, "vGPIO_SPARE2"),
 438         PINCTRL_PIN(38, "vGPIO_SPARE3"),
 439         PINCTRL_PIN(39, "vGPIO_SPARE8"),
 440         PINCTRL_PIN(40, "vGPIO_SPARE9"),
 441         PINCTRL_PIN(41, "vGPIO_SPARE10"),
 442         PINCTRL_PIN(42, "vGPIO_SPARE11"),
 443         PINCTRL_PIN(43, "vGPIO_SPARE12"),
 444         PINCTRL_PIN(44, "vGPIO_SPARE13"),
 445         PINCTRL_PIN(45, "vGPIO_SPARE14"),
 446         PINCTRL_PIN(46, "vGPIO_SPARE15"),
 447         /* GPP_C */
 448         PINCTRL_PIN(47, "GPP_SC_0"),
 449         PINCTRL_PIN(48, "GPP_SC_1"),
 450         PINCTRL_PIN(49, "GPP_SC_2"),
 451         PINCTRL_PIN(50, "GPP_SC_3"),
 452         PINCTRL_PIN(51, "GPP_SC_4"),
 453         PINCTRL_PIN(52, "GPP_SC_5"),
 454         PINCTRL_PIN(53, "GPP_SC_6"),
 455         PINCTRL_PIN(54, "GPP_SC_7"),
 456         PINCTRL_PIN(55, "GPP_SC_8"),
 457         PINCTRL_PIN(56, "GPP_SC_9"),
 458         PINCTRL_PIN(57, "GPP_SC_10"),
 459         PINCTRL_PIN(58, "GPP_SC_11"),
 460         PINCTRL_PIN(59, "GPP_SC_12"),
 461         PINCTRL_PIN(60, "GPP_SC_13"),
 462         PINCTRL_PIN(61, "GPP_SC_14"),
 463         PINCTRL_PIN(62, "GPP_SC_15"),
 464         PINCTRL_PIN(63, "GPP_SC_16"),
 465         PINCTRL_PIN(64, "GPP_SC_17"),
 466         PINCTRL_PIN(65, "GPP_SC_18"),
 467         PINCTRL_PIN(66, "GPP_SC_19"),
 468         PINCTRL_PIN(67, "GPP_SC_20"),
 469         PINCTRL_PIN(68, "GPP_SC_21"),
 470         PINCTRL_PIN(69, "GPP_SC_22"),
 471         PINCTRL_PIN(70, "GPP_SC_23"),
 472         PINCTRL_PIN(71, "GPP_SC_24"),
 473         PINCTRL_PIN(72, "GPP_SC_25"),
 474         PINCTRL_PIN(73, "GPP_SC_26"),
 475         /* GPP_B */
 476         PINCTRL_PIN(74, "GPP_SB_0"),
 477         PINCTRL_PIN(75, "GPP_SB_1"),
 478         PINCTRL_PIN(76, "GPP_SB_2"),
 479         PINCTRL_PIN(77, "GPP_SB_3"),
 480         PINCTRL_PIN(78, "GPP_SB_4"),
 481         PINCTRL_PIN(79, "GPP_SB_5"),
 482         PINCTRL_PIN(80, "GPP_SB_6"),
 483         PINCTRL_PIN(81, "GPP_SB_7"),
 484         PINCTRL_PIN(82, "GPP_SB_8"),
 485         PINCTRL_PIN(83, "GPP_SB_9"),
 486         PINCTRL_PIN(84, "GPP_SB_10"),
 487         PINCTRL_PIN(85, "GPP_SB_11"),
 488         PINCTRL_PIN(86, "GPP_SB_12"),
 489         PINCTRL_PIN(87, "GPP_SB_13"),
 490         PINCTRL_PIN(88, "GPP_SB_14"),
 491         PINCTRL_PIN(89, "GPP_SB_15"),
 492         PINCTRL_PIN(90, "GPP_SB_16"),
 493         PINCTRL_PIN(91, "PROCHOT_B"),
 494         PINCTRL_PIN(92, "BPKI3C_SDA"),
 495         PINCTRL_PIN(93, "BPKI3C_SCL"),
 496         /* vGPIO_3 */
 497         PINCTRL_PIN(94, "TS0_IN_INT"),
 498         PINCTRL_PIN(95, "TS1_IN_INT"),
 499         /* GPP_D */
 500         PINCTRL_PIN(96, "TIME_SYNC_0"),
 501         PINCTRL_PIN(97, "TIME_SYNC_1"),
 502         PINCTRL_PIN(98, "DSI_DE_TE_2_GENLOCK_REF"),
 503         PINCTRL_PIN(99, "DSI_DE_TE_1_DISP_UTILS"),
 504         PINCTRL_PIN(100, "DSI_GENLOCK_2"),
 505         PINCTRL_PIN(101, "DSI_GENLOCK_3"),
 506         PINCTRL_PIN(102, "SRCCLKREQ2_B"),
 507         PINCTRL_PIN(103, "SRCCLKREQ3_B"),
 508         PINCTRL_PIN(104, "GPP_SD_8"),
 509         PINCTRL_PIN(105, "GPP_SD_9"),
 510         PINCTRL_PIN(106, "GPP_SD_10"),
 511         PINCTRL_PIN(107, "GPP_SD_11"),
 512         PINCTRL_PIN(108, "GPP_SD_12"),
 513         PINCTRL_PIN(109, "GPP_SD_13"),
 514         PINCTRL_PIN(110, "GPP_SD_14"),
 515         PINCTRL_PIN(111, "GPP_SD_15"),
 516         PINCTRL_PIN(112, "GPP_SD_16"),
 517         PINCTRL_PIN(113, "GPP_SD_17"),
 518         PINCTRL_PIN(114, "BOOTHALT_B"),
 519         PINCTRL_PIN(115, "GPP_SD_19"),
 520         PINCTRL_PIN(116, "GPP_SD_20"),
 521         PINCTRL_PIN(117, "AUDCLK"),
 522         PINCTRL_PIN(118, "AUDIN"),
 523         PINCTRL_PIN(119, "AUDOUT"),
 524         /* JTAG_CPU */
 525         PINCTRL_PIN(120, "PECI"),
 526         PINCTRL_PIN(121, "VIDSOUT"),
 527         PINCTRL_PIN(122, "VIDSCK"),
 528         PINCTRL_PIN(123, "VIDALERT_B"),
 529         PINCTRL_PIN(124, "JTAG_MBPB0"),
 530         PINCTRL_PIN(125, "JTAG_MBPB1"),
 531         PINCTRL_PIN(126, "JTAG_MBPB2"),
 532         PINCTRL_PIN(127, "JTAG_MBPB3"),
 533         PINCTRL_PIN(128, "JTAG_TDO"),
 534         PINCTRL_PIN(129, "PRDY_B"),
 535         PINCTRL_PIN(130, "PREQ_B"),
 536         PINCTRL_PIN(131, "JTAG_TDI"),
 537         PINCTRL_PIN(132, "JTAG_TMS"),
 538         PINCTRL_PIN(133, "JTAG_TCK"),
 539         PINCTRL_PIN(134, "DBG_PMODE"),
 540         PINCTRL_PIN(135, "JTAG_TRST_B"),
 541         /* vGPIO_4 */
 542         PINCTRL_PIN(136, "ISCLK_ESPI_XTAL_CLKREQ"),
 543         PINCTRL_PIN(137, "ESPI_ISCLK_XTAL_CLKACK"),
 544         PINCTRL_PIN(138, "vGPIO_SPARE4"),
 545         PINCTRL_PIN(139, "vGPIO_SPARE5"),
 546         PINCTRL_PIN(140, "vGPIO_SPARE6"),
 547         PINCTRL_PIN(141, "vGPIO_SPARE7"),
 548         PINCTRL_PIN(142, "vGPIO_SPARE16"),
 549         PINCTRL_PIN(143, "vGPIO_SPARE17"),
 550         PINCTRL_PIN(144, "vGPIO_SPARE18"),
 551         PINCTRL_PIN(145, "vGPIO_SPARE19"),
 552         PINCTRL_PIN(146, "vGPIO_SPARE20"),
 553         PINCTRL_PIN(147, "vGPIO_SPARE21"),
 554 };
 555
 556 static const struct intel_padgroup mtls_community0_gpps[] = {
 557         MTL_GPP(0, 0, 27, 0),           /* GPP_A */
 558         MTL_GPP(1, 28, 46, 32),         /* vGPIO_0 */
 559         MTL_GPP(2, 47, 73, 64),         /* GPP_C */
 560 };
 561
 562 static const struct intel_padgroup mtls_community1_gpps[] = {
 563         MTL_GPP(0, 74, 93, 96),         /* GPP_B */
 564         MTL_GPP(1, 94, 95, 128),        /* vGPIO_3 */
 565         MTL_GPP(2, 96, 119, 160),       /* GPP_D */
 566 };
 567
 568 static const struct intel_padgroup mtls_community3_gpps[] = {
 569         MTL_GPP(0, 120, 135, 192),      /* JTAG_CPU */
 570         MTL_GPP(1, 136, 147, 224),      /* vGPIO_4 */
 571 };
 572
 573 static const struct intel_community mtls_communities[] = {
 574         MTL_S_COMMUNITY(0, 0, 73, mtls_community0_gpps),
 575         MTL_S_COMMUNITY(1, 74, 119, mtls_community1_gpps),
 576         MTL_S_COMMUNITY(2, 120, 147, mtls_community3_gpps),
 577 };
 578
 579 static const struct intel_pinctrl_soc_data mtls_soc_data = {
 580         .pins = mtls_pins,
 581         .npins = ARRAY_SIZE(mtls_pins),
 582         .communities = mtls_communities,
 583         .ncommunities = ARRAY_SIZE(mtls_communities),
 584 };
 585
 586 static const struct acpi_device_id mtl_pinctrl_acpi_match[] = {
 587         { "INTC105E", (kernel_ulong_t)&mtlp_soc_data },
 588         { "INTC1083", (kernel_ulong_t)&mtlp_soc_data },
 589         { "INTC1082", (kernel_ulong_t)&mtls_soc_data },
 590         { }
 591 };
 592 MODULE_DEVICE_TABLE(acpi, mtl_pinctrl_acpi_match);
 593
 594 static struct platform_driver mtl_pinctrl_driver = {
 595         .probe = intel_pinctrl_probe_by_hid,
 596         .driver = {
 597                 .name = "meteorlake-pinctrl",
 598                 .acpi_match_table = mtl_pinctrl_acpi_match,
 599                 .pm = pm_sleep_ptr(&intel_pinctrl_pm_ops),
 600         },
 601 };
 602 module_platform_driver(mtl_pinctrl_driver);
 603
 604 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
 605 MODULE_DESCRIPTION("Intel Meteor Lake PCH pinctrl/GPIO driver");
 606 MODULE_LICENSE("GPL v2");
 607 MODULE_IMPORT_NS("PINCTRL_INTEL");