1 // SPDX-License-Identifier: GPL-2.0
3 * RTC driver for tps6594 PMIC
5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/limits.h>
14 #include <linux/math64.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/mod_devicetable.h>
18 #include <linux/property.h>
19 #include <linux/rtc.h>
20 #include <linux/types.h>
21 #include <linux/units.h>
23 #include <linux/mfd/tps6594.h>
25 // Total number of RTC registers needed to set time
26 #define NUM_TIME_REGS (TPS6594_REG_RTC_WEEKS - TPS6594_REG_RTC_SECONDS + 1)
28 // Total number of RTC alarm registers
29 #define NUM_TIME_ALARM_REGS (NUM_TIME_REGS - 1)
32 * Min and max values supported by 'offset' interface (swapped sign).
33 * After conversion, the values do not exceed the range [-32767, 33767]
34 * which COMP_REG must conform to.
36 #define MIN_OFFSET (-277774)
37 #define MAX_OFFSET (277774)
39 // Number of ticks per hour
40 #define TICKS_PER_HOUR (32768 * 3600)
42 // Multiplier for ppb conversions
46 struct rtc_device
*rtc_dev
;
50 static int tps6594_rtc_alarm_irq_enable(struct device
*dev
,
53 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
56 val
= enabled
? TPS6594_BIT_IT_ALARM
: 0;
58 return regmap_update_bits(tps
->regmap
, TPS6594_REG_RTC_INTERRUPTS
,
59 TPS6594_BIT_IT_ALARM
, val
);
62 /* Pulse GET_TIME field of RTC_CTRL_1 to store a timestamp in shadow registers. */
63 static int tps6594_rtc_shadow_timestamp(struct device
*dev
, struct tps6594
*tps
)
68 * Set GET_TIME to 0. Next time we set GET_TIME to 1 we will be sure to store
69 * an up-to-date timestamp.
71 ret
= regmap_clear_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
72 TPS6594_BIT_GET_TIME
);
77 * Copy content of RTC registers to shadow registers or latches to read
78 * a coherent timestamp.
80 return regmap_set_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
81 TPS6594_BIT_GET_TIME
);
84 static int tps6594_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
86 unsigned char rtc_data
[NUM_TIME_REGS
];
87 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
90 // Check if RTC is running.
91 ret
= regmap_test_bits(tps
->regmap
, TPS6594_REG_RTC_STATUS
,
98 ret
= tps6594_rtc_shadow_timestamp(dev
, tps
);
102 // Read shadowed RTC registers.
103 ret
= regmap_bulk_read(tps
->regmap
, TPS6594_REG_RTC_SECONDS
, rtc_data
,
108 tm
->tm_sec
= bcd2bin(rtc_data
[0]);
109 tm
->tm_min
= bcd2bin(rtc_data
[1]);
110 tm
->tm_hour
= bcd2bin(rtc_data
[2]);
111 tm
->tm_mday
= bcd2bin(rtc_data
[3]);
112 tm
->tm_mon
= bcd2bin(rtc_data
[4]) - 1;
113 tm
->tm_year
= bcd2bin(rtc_data
[5]) + 100;
114 tm
->tm_wday
= bcd2bin(rtc_data
[6]);
119 static int tps6594_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
121 unsigned char rtc_data
[NUM_TIME_REGS
];
122 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
125 rtc_data
[0] = bin2bcd(tm
->tm_sec
);
126 rtc_data
[1] = bin2bcd(tm
->tm_min
);
127 rtc_data
[2] = bin2bcd(tm
->tm_hour
);
128 rtc_data
[3] = bin2bcd(tm
->tm_mday
);
129 rtc_data
[4] = bin2bcd(tm
->tm_mon
+ 1);
130 rtc_data
[5] = bin2bcd(tm
->tm_year
- 100);
131 rtc_data
[6] = bin2bcd(tm
->tm_wday
);
133 // Stop RTC while updating the RTC time registers.
134 ret
= regmap_clear_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
135 TPS6594_BIT_STOP_RTC
);
139 // Update all the time registers in one shot.
140 ret
= regmap_bulk_write(tps
->regmap
, TPS6594_REG_RTC_SECONDS
, rtc_data
,
146 return regmap_set_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
147 TPS6594_BIT_STOP_RTC
);
150 static int tps6594_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
152 unsigned char alarm_data
[NUM_TIME_ALARM_REGS
];
154 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
157 ret
= regmap_bulk_read(tps
->regmap
, TPS6594_REG_ALARM_SECONDS
,
158 alarm_data
, NUM_TIME_ALARM_REGS
);
162 alm
->time
.tm_sec
= bcd2bin(alarm_data
[0]);
163 alm
->time
.tm_min
= bcd2bin(alarm_data
[1]);
164 alm
->time
.tm_hour
= bcd2bin(alarm_data
[2]);
165 alm
->time
.tm_mday
= bcd2bin(alarm_data
[3]);
166 alm
->time
.tm_mon
= bcd2bin(alarm_data
[4]) - 1;
167 alm
->time
.tm_year
= bcd2bin(alarm_data
[5]) + 100;
169 ret
= regmap_read(tps
->regmap
, TPS6594_REG_RTC_INTERRUPTS
, &int_val
);
173 alm
->enabled
= int_val
& TPS6594_BIT_IT_ALARM
;
178 static int tps6594_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
180 unsigned char alarm_data
[NUM_TIME_ALARM_REGS
];
181 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
184 // Disable alarm irq before changing the alarm timestamp.
185 ret
= tps6594_rtc_alarm_irq_enable(dev
, 0);
189 alarm_data
[0] = bin2bcd(alm
->time
.tm_sec
);
190 alarm_data
[1] = bin2bcd(alm
->time
.tm_min
);
191 alarm_data
[2] = bin2bcd(alm
->time
.tm_hour
);
192 alarm_data
[3] = bin2bcd(alm
->time
.tm_mday
);
193 alarm_data
[4] = bin2bcd(alm
->time
.tm_mon
+ 1);
194 alarm_data
[5] = bin2bcd(alm
->time
.tm_year
- 100);
196 // Update all the alarm registers in one shot.
197 ret
= regmap_bulk_write(tps
->regmap
, TPS6594_REG_ALARM_SECONDS
,
198 alarm_data
, NUM_TIME_ALARM_REGS
);
203 ret
= tps6594_rtc_alarm_irq_enable(dev
, 1);
208 static int tps6594_rtc_set_calibration(struct device
*dev
, int calibration
)
210 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
215 * TPS6594 uses two's complement 16 bit value for compensation of RTC
216 * crystal inaccuracies. One time every hour when seconds counter
217 * increments from 0 to 1 compensation value will be added to internal
220 * Valid range for compensation value: [-32767 .. 32767].
222 if (calibration
< S16_MIN
+ 1 || calibration
> S16_MAX
)
225 value
= cpu_to_le16(calibration
);
227 // Update all the compensation registers in one shot.
228 ret
= regmap_bulk_write(tps
->regmap
, TPS6594_REG_RTC_COMP_LSB
, &value
,
233 // Enable automatic compensation.
234 return regmap_set_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
235 TPS6594_BIT_AUTO_COMP
);
238 static int tps6594_rtc_get_calibration(struct device
*dev
, int *calibration
)
240 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
245 ret
= regmap_read(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
, &ctrl
);
249 // If automatic compensation is not enabled report back zero.
250 if (!(ctrl
& TPS6594_BIT_AUTO_COMP
)) {
255 ret
= regmap_bulk_read(tps
->regmap
, TPS6594_REG_RTC_COMP_LSB
, &value
,
260 *calibration
= le16_to_cpu(value
);
265 static int tps6594_rtc_read_offset(struct device
*dev
, long *offset
)
271 ret
= tps6594_rtc_get_calibration(dev
, &calibration
);
275 // Convert from RTC calibration register format to ppb format.
276 tmp
= calibration
* PPB_MULT
;
279 tmp
-= TICKS_PER_HOUR
/ 2LL;
281 tmp
+= TICKS_PER_HOUR
/ 2LL;
282 tmp
= div_s64(tmp
, TICKS_PER_HOUR
);
286 * Computatiion is the reverse operation of the one done in
287 * `tps6594_rtc_set_offset`. The safety remarks applie here too.
291 * Offset value operates in negative way, so swap sign.
292 * See 8.3.10.5, (32768 - COMP_REG).
294 *offset
= (long)-tmp
;
299 static int tps6594_rtc_set_offset(struct device
*dev
, long offset
)
304 // Make sure offset value is within supported range.
305 if (offset
< MIN_OFFSET
|| offset
> MAX_OFFSET
)
308 // Convert from ppb format to RTC calibration register format.
310 tmp
= offset
* TICKS_PER_HOUR
;
312 tmp
-= PPB_MULT
/ 2LL;
314 tmp
+= PPB_MULT
/ 2LL;
315 tmp
= div_s64(tmp
, PPB_MULT
);
319 * - tmp = offset * TICK_PER_HOUR :
320 * `offset` can't be more than 277774, so `tmp` can't exceed 277774000000000
321 * which is lower than the maximum value in an `s64` (2^63-1). No overflow here.
323 * - tmp += TICK_PER_HOUR / 2LL :
324 * tmp will have a maximum value of 277774117964800 which is still inferior to 2^63-1.
327 // Offset value operates in negative way, so swap sign.
328 calibration
= (int)-tmp
;
330 return tps6594_rtc_set_calibration(dev
, calibration
);
333 static irqreturn_t
tps6594_rtc_interrupt(int irq
, void *data
)
335 struct device
*dev
= data
;
336 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
337 struct tps6594_rtc
*rtc
= dev_get_drvdata(dev
);
341 ret
= regmap_read(tps
->regmap
, TPS6594_REG_RTC_STATUS
, &rtc_reg
);
345 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
350 static const struct rtc_class_ops tps6594_rtc_ops
= {
351 .read_time
= tps6594_rtc_read_time
,
352 .set_time
= tps6594_rtc_set_time
,
353 .read_alarm
= tps6594_rtc_read_alarm
,
354 .set_alarm
= tps6594_rtc_set_alarm
,
355 .alarm_irq_enable
= tps6594_rtc_alarm_irq_enable
,
356 .read_offset
= tps6594_rtc_read_offset
,
357 .set_offset
= tps6594_rtc_set_offset
,
360 static int tps6594_rtc_probe(struct platform_device
*pdev
)
362 struct tps6594
*tps
= dev_get_drvdata(pdev
->dev
.parent
);
363 struct device
*dev
= &pdev
->dev
;
364 struct tps6594_rtc
*rtc
;
368 rtc
= devm_kzalloc(dev
, sizeof(*rtc
), GFP_KERNEL
);
372 rtc
->rtc_dev
= devm_rtc_allocate_device(dev
);
373 if (IS_ERR(rtc
->rtc_dev
))
374 return PTR_ERR(rtc
->rtc_dev
);
376 // Enable crystal oscillator.
377 ret
= regmap_set_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_2
,
378 TPS6594_BIT_XTAL_EN
);
382 ret
= regmap_test_bits(tps
->regmap
, TPS6594_REG_RTC_STATUS
,
388 ret
= regmap_set_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
389 TPS6594_BIT_STOP_RTC
);
394 * On some boards, a 40 ms delay is needed before BIT_RUN is set.
395 * 80 ms should provide sufficient margin.
400 * RTC should be running now. Check if this is the case.
401 * If not it might be a missing oscillator.
403 ret
= regmap_test_bits(tps
->regmap
, TPS6594_REG_RTC_STATUS
,
410 // Stop RTC until first call to `tps6594_rtc_set_time`.
411 ret
= regmap_clear_bits(tps
->regmap
, TPS6594_REG_RTC_CTRL_1
,
412 TPS6594_BIT_STOP_RTC
);
417 platform_set_drvdata(pdev
, rtc
);
419 irq
= platform_get_irq_byname(pdev
, TPS6594_IRQ_NAME_ALARM
);
421 return dev_err_probe(dev
, irq
, "Failed to get irq\n");
425 ret
= devm_request_threaded_irq(dev
, irq
, NULL
, tps6594_rtc_interrupt
,
426 IRQF_ONESHOT
, TPS6594_IRQ_NAME_ALARM
,
429 return dev_err_probe(dev
, ret
,
430 "Failed to request_threaded_irq\n");
432 ret
= device_init_wakeup(dev
, true);
434 return dev_err_probe(dev
, ret
,
435 "Failed to init rtc as wakeup source\n");
437 rtc
->rtc_dev
->ops
= &tps6594_rtc_ops
;
438 rtc
->rtc_dev
->range_min
= RTC_TIMESTAMP_BEGIN_2000
;
439 rtc
->rtc_dev
->range_max
= RTC_TIMESTAMP_END_2099
;
441 return devm_rtc_register_device(rtc
->rtc_dev
);
444 static int tps6594_rtc_resume(struct device
*dev
)
446 struct tps6594
*tps
= dev_get_drvdata(dev
->parent
);
447 struct tps6594_rtc
*rtc
= dev_get_drvdata(dev
);
450 ret
= regmap_test_bits(tps
->regmap
, TPS6594_REG_INT_STARTUP
,
451 TPS6594_BIT_RTC_INT
);
453 dev_err(dev
, "failed to read REG_INT_STARTUP: %d\n", ret
);
459 * If the alarm bit is set, it means that the IRQ has been
460 * fired. But, the kernel may not have woke up yet when it
461 * happened. So, we have to clear it.
463 ret
= regmap_write(tps
->regmap
, TPS6594_REG_RTC_STATUS
,
466 dev_err(dev
, "error clearing alarm bit: %d", ret
);
468 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
471 disable_irq_wake(rtc
->irq
);
476 static int tps6594_rtc_suspend(struct device
*dev
)
478 struct tps6594_rtc
*rtc
= dev_get_drvdata(dev
);
480 enable_irq_wake(rtc
->irq
);
485 static DEFINE_SIMPLE_DEV_PM_OPS(tps6594_rtc_pm_ops
, tps6594_rtc_suspend
, tps6594_rtc_resume
);
487 static const struct platform_device_id tps6594_rtc_id_table
[] = {
491 MODULE_DEVICE_TABLE(platform
, tps6594_rtc_id_table
);
493 static struct platform_driver tps6594_rtc_driver
= {
494 .probe
= tps6594_rtc_probe
,
496 .name
= "tps6594-rtc",
497 .pm
= pm_sleep_ptr(&tps6594_rtc_pm_ops
),
499 .id_table
= tps6594_rtc_id_table
,
502 module_platform_driver(tps6594_rtc_driver
);
503 MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>");
504 MODULE_DESCRIPTION("TPS6594 RTC driver");
505 MODULE_LICENSE("GPL");