1 // SPDX-License-Identifier: GPL-2.0
3 * NVEC: NVIDIA compliant embedded controller interface
5 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
7 * Authors: Pierre-Hugues Husson <phhusson@free.fr>
8 * Ilya Petrov <ilya.muromec@gmail.com>
9 * Marc Dietrich <marvin24@gmx.de>
10 * Julian Andres Klode <jak@jak-linux.org>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/atomic.h>
16 #include <linux/clk.h>
17 #include <linux/completion.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/gpio/consumer.h>
21 #include <linux/interrupt.h>
23 #include <linux/irq.h>
25 #include <linux/list.h>
26 #include <linux/mfd/core.h>
27 #include <linux/mutex.h>
28 #include <linux/notifier.h>
29 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/workqueue.h>
36 #define I2C_CNFG_PACKET_MODE_EN BIT(10)
37 #define I2C_CNFG_NEW_MASTER_SFM BIT(11)
38 #define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
40 #define I2C_SL_CNFG 0x20
41 #define I2C_SL_NEWSL BIT(2)
42 #define I2C_SL_NACK BIT(1)
43 #define I2C_SL_RESP BIT(0)
44 #define I2C_SL_IRQ BIT(3)
45 #define END_TRANS BIT(4)
49 #define I2C_SL_RCVD 0x24
50 #define I2C_SL_STATUS 0x28
51 #define I2C_SL_ADDR1 0x2c
52 #define I2C_SL_ADDR2 0x30
53 #define I2C_SL_DELAY_COUNT 0x3c
56 * enum nvec_msg_category - Message categories for nvec_msg_alloc()
57 * @NVEC_MSG_RX: The message is an incoming message (from EC)
58 * @NVEC_MSG_TX: The message is an outgoing message (to EC)
60 enum nvec_msg_category
{
65 enum nvec_sleep_subcmds
{
71 #define CNF_EVENT_REPORTING 0x01
72 #define GET_FIRMWARE_VERSION 0x15
73 #define LID_SWITCH BIT(1)
74 #define PWR_BUTTON BIT(15)
76 static struct nvec_chip
*nvec_power_handle
;
78 static const struct mfd_cell nvec_devices
[] = {
99 * nvec_register_notifier - Register a notifier with nvec
100 * @nvec: A &struct nvec_chip
101 * @nb: The notifier block to register
104 * Registers a notifier with @nvec. The notifier will be added to an atomic
105 * notifier chain that is called for all received messages except those that
106 * correspond to a request initiated by nvec_write_sync().
108 int nvec_register_notifier(struct nvec_chip
*nvec
, struct notifier_block
*nb
,
111 return atomic_notifier_chain_register(&nvec
->notifier_list
, nb
);
113 EXPORT_SYMBOL_GPL(nvec_register_notifier
);
116 * nvec_unregister_notifier - Unregister a notifier with nvec
117 * @nvec: A &struct nvec_chip
118 * @nb: The notifier block to unregister
120 * Unregisters a notifier with @nvec. The notifier will be removed from the
121 * atomic notifier chain.
123 int nvec_unregister_notifier(struct nvec_chip
*nvec
, struct notifier_block
*nb
)
125 return atomic_notifier_chain_unregister(&nvec
->notifier_list
, nb
);
127 EXPORT_SYMBOL_GPL(nvec_unregister_notifier
);
130 * nvec_status_notifier - The final notifier
132 * Prints a message about control events not handled in the notifier
135 static int nvec_status_notifier(struct notifier_block
*nb
,
136 unsigned long event_type
, void *data
)
138 struct nvec_chip
*nvec
= container_of(nb
, struct nvec_chip
,
139 nvec_status_notifier
);
140 unsigned char *msg
= data
;
142 if (event_type
!= NVEC_CNTL
)
145 dev_warn(nvec
->dev
, "unhandled msg type %ld\n", event_type
);
146 print_hex_dump(KERN_WARNING
, "payload: ", DUMP_PREFIX_NONE
, 16, 1,
147 msg
, msg
[1] + 2, true);
154 * @nvec: A &struct nvec_chip
155 * @category: Pool category, see &enum nvec_msg_category
157 * Allocate a single &struct nvec_msg object from the message pool of
158 * @nvec. The result shall be passed to nvec_msg_free() if no longer
161 * Outgoing messages are placed in the upper 75% of the pool, keeping the
162 * lower 25% available for RX buffers only. The reason is to prevent a
163 * situation where all buffers are full and a message is thus endlessly
164 * retried because the response could never be processed.
166 static struct nvec_msg
*nvec_msg_alloc(struct nvec_chip
*nvec
,
167 enum nvec_msg_category category
)
169 int i
= (category
== NVEC_MSG_TX
) ? (NVEC_POOL_SIZE
/ 4) : 0;
171 for (; i
< NVEC_POOL_SIZE
; i
++) {
172 if (atomic_xchg(&nvec
->msg_pool
[i
].used
, 1) == 0) {
173 dev_vdbg(nvec
->dev
, "INFO: Allocate %i\n", i
);
174 return &nvec
->msg_pool
[i
];
178 dev_err(nvec
->dev
, "Could not allocate %s buffer\n",
179 (category
== NVEC_MSG_TX
) ? "TX" : "RX");
186 * @nvec: A &struct nvec_chip
187 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec)
189 * Free the given message
191 void nvec_msg_free(struct nvec_chip
*nvec
, struct nvec_msg
*msg
)
193 if (msg
!= &nvec
->tx_scratch
)
194 dev_vdbg(nvec
->dev
, "INFO: Free %ti\n", msg
- nvec
->msg_pool
);
195 atomic_set(&msg
->used
, 0);
197 EXPORT_SYMBOL_GPL(nvec_msg_free
);
200 * nvec_msg_is_event - Return %true if @msg is an event
203 static bool nvec_msg_is_event(struct nvec_msg
*msg
)
205 return msg
->data
[0] >> 7;
209 * nvec_msg_size - Get the size of a message
210 * @msg: The message to get the size for
212 * This only works for received messages, not for outgoing messages.
214 static size_t nvec_msg_size(struct nvec_msg
*msg
)
216 bool is_event
= nvec_msg_is_event(msg
);
217 int event_length
= (msg
->data
[0] & 0x60) >> 5;
219 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */
220 if (!is_event
|| event_length
== NVEC_VAR_SIZE
)
221 return (msg
->pos
|| msg
->size
) ? (msg
->data
[1] + 2) : 0;
222 else if (event_length
== NVEC_2BYTES
)
224 else if (event_length
== NVEC_3BYTES
)
230 * nvec_gpio_set_value - Set the GPIO value
231 * @nvec: A &struct nvec_chip
232 * @value: The value to write (0 or 1)
234 * Like gpio_set_value(), but generating debugging information
236 static void nvec_gpio_set_value(struct nvec_chip
*nvec
, int value
)
238 dev_dbg(nvec
->dev
, "GPIO changed from %u to %u\n",
239 gpiod_get_value(nvec
->gpiod
), value
);
240 gpiod_set_value(nvec
->gpiod
, value
);
244 * nvec_write_async - Asynchronously write a message to NVEC
245 * @nvec: An nvec_chip instance
246 * @data: The message data, starting with the request type
247 * @size: The size of @data
249 * Queue a single message to be transferred to the embedded controller
250 * and return immediately.
252 * Returns: 0 on success, a negative error code on failure. If a failure
253 * occurred, the nvec driver may print an error.
255 int nvec_write_async(struct nvec_chip
*nvec
, const unsigned char *data
,
258 struct nvec_msg
*msg
;
261 msg
= nvec_msg_alloc(nvec
, NVEC_MSG_TX
);
267 memcpy(msg
->data
+ 1, data
, size
);
268 msg
->size
= size
+ 1;
270 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
271 list_add_tail(&msg
->node
, &nvec
->tx_data
);
272 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
274 schedule_work(&nvec
->tx_work
);
278 EXPORT_SYMBOL(nvec_write_async
);
281 * nvec_write_sync - Write a message to nvec and read the response
282 * @nvec: An &struct nvec_chip
283 * @data: The data to write
284 * @size: The size of @data
285 * @msg: The response message received
287 * This is similar to nvec_write_async(), but waits for the
288 * request to be answered before returning. This function
289 * uses a mutex and can thus not be called from e.g.
290 * interrupt handlers.
292 * Returns: 0 on success, a negative error code on failure.
293 * The response message is returned in @msg. Shall be freed
294 * with nvec_msg_free() once no longer used.
297 int nvec_write_sync(struct nvec_chip
*nvec
,
298 const unsigned char *data
, short size
,
299 struct nvec_msg
**msg
)
301 mutex_lock(&nvec
->sync_write_mutex
);
306 nvec
->sync_write_pending
= (data
[1] << 8) + data
[0];
308 if (nvec_write_async(nvec
, data
, size
) < 0) {
309 mutex_unlock(&nvec
->sync_write_mutex
);
313 dev_dbg(nvec
->dev
, "nvec_sync_write: 0x%04x\n",
314 nvec
->sync_write_pending
);
315 if (!(wait_for_completion_timeout(&nvec
->sync_write
,
316 msecs_to_jiffies(2000)))) {
318 "Timeout waiting for sync write to complete\n");
319 mutex_unlock(&nvec
->sync_write_mutex
);
323 dev_dbg(nvec
->dev
, "nvec_sync_write: pong!\n");
326 *msg
= nvec
->last_sync_msg
;
328 nvec_msg_free(nvec
, nvec
->last_sync_msg
);
330 mutex_unlock(&nvec
->sync_write_mutex
);
334 EXPORT_SYMBOL(nvec_write_sync
);
337 * nvec_toggle_global_events - enables or disables global event reporting
339 * @state: true for enable, false for disable
341 * This switches on/off global event reports by the embedded controller.
343 static void nvec_toggle_global_events(struct nvec_chip
*nvec
, bool state
)
345 unsigned char global_events
[] = { NVEC_SLEEP
, GLOBAL_EVENTS
, state
};
347 nvec_write_async(nvec
, global_events
, 3);
351 * nvec_event_mask - fill the command string with event bitfield
352 * @ev: points to event command string
353 * @mask: bit to insert into the event mask
355 * Configure event command expects a 32 bit bitfield which describes
356 * which events to enable. The bitfield has the following structure
357 * (from highest byte to lowest):
358 * system state bits 7-0
359 * system state bits 15-8
360 * oem system state bits 7-0
361 * oem system state bits 15-8
363 static void nvec_event_mask(char *ev
, u32 mask
)
365 ev
[3] = mask
>> 16 & 0xff;
366 ev
[4] = mask
>> 24 & 0xff;
367 ev
[5] = mask
>> 0 & 0xff;
368 ev
[6] = mask
>> 8 & 0xff;
372 * nvec_request_master - Process outgoing messages
373 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
375 * Processes all outgoing requests by sending the request and awaiting the
376 * response, then continuing with the next request. Once a request has a
377 * matching response, it will be freed and removed from the list.
379 static void nvec_request_master(struct work_struct
*work
)
381 struct nvec_chip
*nvec
= container_of(work
, struct nvec_chip
, tx_work
);
384 struct nvec_msg
*msg
;
386 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
387 while (!list_empty(&nvec
->tx_data
)) {
388 msg
= list_first_entry(&nvec
->tx_data
, struct nvec_msg
, node
);
389 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
390 nvec_gpio_set_value(nvec
, 0);
391 err
= wait_for_completion_interruptible_timeout(&nvec
->ec_transfer
,
392 msecs_to_jiffies(5000));
395 dev_warn(nvec
->dev
, "Timeout waiting for ec transfer\n");
396 nvec_gpio_set_value(nvec
, 1);
400 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
403 list_del_init(&msg
->node
);
404 nvec_msg_free(nvec
, msg
);
407 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
411 * parse_msg - Print some information and call the notifiers on an RX message
412 * @nvec: A &struct nvec_chip
413 * @msg: A message received by @nvec
415 * Paarse some pieces of the message and then call the chain of notifiers
416 * registered via nvec_register_notifier.
418 static int parse_msg(struct nvec_chip
*nvec
, struct nvec_msg
*msg
)
420 if ((msg
->data
[0] & 1 << 7) == 0 && msg
->data
[3]) {
421 dev_err(nvec
->dev
, "ec responded %*ph\n", 4, msg
->data
);
425 if ((msg
->data
[0] >> 7) == 1 && (msg
->data
[0] & 0x0f) == 5)
426 print_hex_dump(KERN_WARNING
, "ec system event ",
427 DUMP_PREFIX_NONE
, 16, 1, msg
->data
,
428 msg
->data
[1] + 2, true);
430 atomic_notifier_call_chain(&nvec
->notifier_list
, msg
->data
[0] & 0x8f,
437 * nvec_dispatch - Process messages received from the EC
438 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
440 * Process messages previously received from the EC and put into the RX
441 * queue of the &struct nvec_chip instance associated with @work.
443 static void nvec_dispatch(struct work_struct
*work
)
445 struct nvec_chip
*nvec
= container_of(work
, struct nvec_chip
, rx_work
);
447 struct nvec_msg
*msg
;
449 spin_lock_irqsave(&nvec
->rx_lock
, flags
);
450 while (!list_empty(&nvec
->rx_data
)) {
451 msg
= list_first_entry(&nvec
->rx_data
, struct nvec_msg
, node
);
452 list_del_init(&msg
->node
);
453 spin_unlock_irqrestore(&nvec
->rx_lock
, flags
);
455 if (nvec
->sync_write_pending
==
456 (msg
->data
[2] << 8) + msg
->data
[0]) {
457 dev_dbg(nvec
->dev
, "Sync write completed!\n");
458 nvec
->sync_write_pending
= 0;
459 nvec
->last_sync_msg
= msg
;
460 complete(&nvec
->sync_write
);
462 parse_msg(nvec
, msg
);
463 nvec_msg_free(nvec
, msg
);
465 spin_lock_irqsave(&nvec
->rx_lock
, flags
);
467 spin_unlock_irqrestore(&nvec
->rx_lock
, flags
);
471 * nvec_tx_completed - Complete the current transfer
472 * @nvec: A &struct nvec_chip
474 * This is called when we have received an END_TRANS on a TX transfer.
476 static void nvec_tx_completed(struct nvec_chip
*nvec
)
478 /* We got an END_TRANS, let's skip this, maybe there's an event */
479 if (nvec
->tx
->pos
!= nvec
->tx
->size
) {
480 dev_err(nvec
->dev
, "Premature END_TRANS, resending\n");
482 nvec_gpio_set_value(nvec
, 0);
489 * nvec_rx_completed - Complete the current transfer
490 * @nvec: A &struct nvec_chip
492 * This is called when we have received an END_TRANS on a RX transfer.
494 static void nvec_rx_completed(struct nvec_chip
*nvec
)
496 if (nvec
->rx
->pos
!= nvec_msg_size(nvec
->rx
)) {
497 dev_err(nvec
->dev
, "RX incomplete: Expected %u bytes, got %u\n",
498 (uint
)nvec_msg_size(nvec
->rx
),
499 (uint
)nvec
->rx
->pos
);
501 nvec_msg_free(nvec
, nvec
->rx
);
504 /* Battery quirk - Often incomplete, and likes to crash */
505 if (nvec
->rx
->data
[0] == NVEC_BAT
)
506 complete(&nvec
->ec_transfer
);
511 spin_lock(&nvec
->rx_lock
);
514 * Add the received data to the work list and move the ring buffer
515 * pointer to the next entry.
517 list_add_tail(&nvec
->rx
->node
, &nvec
->rx_data
);
519 spin_unlock(&nvec
->rx_lock
);
523 if (!nvec_msg_is_event(nvec
->rx
))
524 complete(&nvec
->ec_transfer
);
526 schedule_work(&nvec
->rx_work
);
530 * nvec_invalid_flags - Send an error message about invalid flags and jump
531 * @nvec: The nvec device
532 * @status: The status flags
533 * @reset: Whether we shall jump to state 0.
535 static void nvec_invalid_flags(struct nvec_chip
*nvec
, unsigned int status
,
538 dev_err(nvec
->dev
, "unexpected status flags 0x%02x during state %i\n",
539 status
, nvec
->state
);
545 * nvec_tx_set - Set the message to transfer (nvec->tx)
546 * @nvec: A &struct nvec_chip
548 * Gets the first entry from the tx_data list of @nvec and sets the
549 * tx member to it. If the tx_data list is empty, this uses the
550 * tx_scratch message to send a no operation message.
552 static void nvec_tx_set(struct nvec_chip
*nvec
)
554 spin_lock(&nvec
->tx_lock
);
555 if (list_empty(&nvec
->tx_data
)) {
556 dev_err(nvec
->dev
, "empty tx - sending no-op\n");
557 memcpy(nvec
->tx_scratch
.data
, "\x02\x07\x02", 3);
558 nvec
->tx_scratch
.size
= 3;
559 nvec
->tx_scratch
.pos
= 0;
560 nvec
->tx
= &nvec
->tx_scratch
;
561 list_add_tail(&nvec
->tx
->node
, &nvec
->tx_data
);
563 nvec
->tx
= list_first_entry(&nvec
->tx_data
, struct nvec_msg
,
567 spin_unlock(&nvec
->tx_lock
);
569 dev_dbg(nvec
->dev
, "Sending message of length %u, command 0x%x\n",
570 (uint
)nvec
->tx
->size
, nvec
->tx
->data
[1]);
574 * tegra_i2c_writel - safely write to an I2C client controller register
575 * @val: value to be written
576 * @reg: register to write to
578 * A write to an I2C controller register needs to be read back to make sure
579 * that the value has arrived.
581 static void tegra_i2c_writel(u32 val
, void *reg
)
583 writel_relaxed(val
, reg
);
585 /* read back register to make sure that register writes completed */
590 * nvec_interrupt - Interrupt handler
592 * @dev: The nvec device
594 * Interrupt handler that fills our RX buffers and empties our TX
595 * buffers. This uses a finite state machine with ridiculous amounts
596 * of error checking, in order to be fairly reliable.
598 static irqreturn_t
nvec_interrupt(int irq
, void *dev
)
600 unsigned long status
;
601 unsigned int received
= 0;
602 unsigned char to_send
= 0xff;
603 const unsigned long irq_mask
= I2C_SL_IRQ
| END_TRANS
| RCVD
| RNW
;
604 struct nvec_chip
*nvec
= dev
;
605 unsigned int state
= nvec
->state
;
607 status
= readl(nvec
->base
+ I2C_SL_STATUS
);
609 /* Filter out some errors */
610 if ((status
& irq_mask
) == 0 && (status
& ~irq_mask
) != 0) {
611 dev_err(nvec
->dev
, "Unexpected irq mask %lx\n", status
);
614 if ((status
& I2C_SL_IRQ
) == 0) {
615 dev_err(nvec
->dev
, "Spurious IRQ\n");
619 /* The EC did not request a read, so it send us something, read it */
620 if ((status
& RNW
) == 0) {
621 received
= readl(nvec
->base
+ I2C_SL_RCVD
);
623 tegra_i2c_writel(0, nvec
->base
+ I2C_SL_RCVD
);
626 if (status
== (I2C_SL_IRQ
| RCVD
))
629 switch (nvec
->state
) {
630 case 0: /* Verify that its a transfer start, the rest later */
631 if (status
!= (I2C_SL_IRQ
| RCVD
))
632 nvec_invalid_flags(nvec
, status
, false);
634 case 1: /* Command byte */
635 if (status
!= I2C_SL_IRQ
) {
636 nvec_invalid_flags(nvec
, status
, true);
638 nvec
->rx
= nvec_msg_alloc(nvec
, NVEC_MSG_RX
);
639 /* Should not happen in a normal world */
640 if (unlikely(!nvec
->rx
)) {
644 nvec
->rx
->data
[0] = received
;
649 case 2: /* first byte after command */
650 if (status
== (I2C_SL_IRQ
| RNW
| RCVD
)) {
652 if (nvec
->rx
->data
[0] != 0x01) {
654 "Read without prior read command\n");
658 nvec_msg_free(nvec
, nvec
->rx
);
661 to_send
= nvec
->tx
->data
[0];
663 } else if (status
== (I2C_SL_IRQ
)) {
664 nvec
->rx
->data
[1] = received
;
668 nvec_invalid_flags(nvec
, status
, true);
671 case 3: /* EC does a block read, we transmit data */
672 if (status
& END_TRANS
) {
673 nvec_tx_completed(nvec
);
674 } else if ((status
& RNW
) == 0 || (status
& RCVD
)) {
675 nvec_invalid_flags(nvec
, status
, true);
676 } else if (nvec
->tx
&& nvec
->tx
->pos
< nvec
->tx
->size
) {
677 to_send
= nvec
->tx
->data
[nvec
->tx
->pos
++];
680 "tx buffer underflow on %p (%u > %u)\n",
682 (uint
)(nvec
->tx
? nvec
->tx
->pos
: 0),
683 (uint
)(nvec
->tx
? nvec
->tx
->size
: 0));
687 case 4: /* EC does some write, we read the data */
688 if ((status
& (END_TRANS
| RNW
)) == END_TRANS
)
689 nvec_rx_completed(nvec
);
690 else if (status
& (RNW
| RCVD
))
691 nvec_invalid_flags(nvec
, status
, true);
692 else if (nvec
->rx
&& nvec
->rx
->pos
< NVEC_MSG_SIZE
)
693 nvec
->rx
->data
[nvec
->rx
->pos
++] = received
;
696 "RX buffer overflow on %p: Trying to write byte %u of %u\n",
697 nvec
->rx
, nvec
->rx
? nvec
->rx
->pos
: 0,
704 /* If we are told that a new transfer starts, verify it */
705 if ((status
& (RCVD
| RNW
)) == RCVD
) {
706 if (received
!= nvec
->i2c_addr
)
708 "received address 0x%02x, expected 0x%02x\n",
709 received
, nvec
->i2c_addr
);
713 /* Send data if requested, but not on end of transmission */
714 if ((status
& (RNW
| END_TRANS
)) == RNW
)
715 tegra_i2c_writel(to_send
, nvec
->base
+ I2C_SL_RCVD
);
717 /* If we have send the first byte */
718 if (status
== (I2C_SL_IRQ
| RNW
| RCVD
))
719 nvec_gpio_set_value(nvec
, 1);
722 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n",
723 (status
& RNW
) == 0 ? "received" : "R=",
725 (status
& (RNW
| END_TRANS
)) ? "sent" : "S=",
728 status
& END_TRANS
? " END_TRANS" : "",
729 status
& RCVD
? " RCVD" : "",
730 status
& RNW
? " RNW" : "");
735 static void tegra_init_i2c_slave(struct nvec_chip
*nvec
)
739 clk_prepare_enable(nvec
->i2c_clk
);
741 reset_control_assert(nvec
->rst
);
743 reset_control_deassert(nvec
->rst
);
745 val
= I2C_CNFG_NEW_MASTER_SFM
| I2C_CNFG_PACKET_MODE_EN
|
746 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT
);
747 tegra_i2c_writel(val
, nvec
->base
+ I2C_CNFG
);
749 clk_set_rate(nvec
->i2c_clk
, 8 * 80000);
751 tegra_i2c_writel(I2C_SL_NEWSL
, nvec
->base
+ I2C_SL_CNFG
);
752 tegra_i2c_writel(0x1E, nvec
->base
+ I2C_SL_DELAY_COUNT
);
754 tegra_i2c_writel(nvec
->i2c_addr
>> 1, nvec
->base
+ I2C_SL_ADDR1
);
755 tegra_i2c_writel(0, nvec
->base
+ I2C_SL_ADDR2
);
757 enable_irq(nvec
->irq
);
760 #ifdef CONFIG_PM_SLEEP
761 static void nvec_disable_i2c_slave(struct nvec_chip
*nvec
)
763 disable_irq(nvec
->irq
);
764 tegra_i2c_writel(I2C_SL_NEWSL
| I2C_SL_NACK
, nvec
->base
+ I2C_SL_CNFG
);
765 clk_disable_unprepare(nvec
->i2c_clk
);
769 static void nvec_power_off(void)
771 char ap_pwr_down
[] = { NVEC_SLEEP
, AP_PWR_DOWN
};
773 nvec_toggle_global_events(nvec_power_handle
, false);
774 nvec_write_async(nvec_power_handle
, ap_pwr_down
, 2);
777 static int tegra_nvec_probe(struct platform_device
*pdev
)
781 struct device
*dev
= &pdev
->dev
;
782 struct nvec_chip
*nvec
;
783 struct nvec_msg
*msg
;
785 char get_firmware_version
[] = { NVEC_CNTL
, GET_FIRMWARE_VERSION
},
786 unmute_speakers
[] = { NVEC_OEM0
, 0x10, 0x59, 0x95 },
787 enable_event
[7] = { NVEC_SYS
, CNF_EVENT_REPORTING
, true };
790 dev_err(dev
, "must be instantiated using device tree\n");
794 nvec
= devm_kzalloc(dev
, sizeof(struct nvec_chip
), GFP_KERNEL
);
798 platform_set_drvdata(pdev
, nvec
);
801 if (of_property_read_u32(dev
->of_node
, "slave-addr", &nvec
->i2c_addr
)) {
802 dev_err(dev
, "no i2c address specified");
806 base
= devm_platform_ioremap_resource(pdev
, 0);
808 return PTR_ERR(base
);
810 nvec
->irq
= platform_get_irq(pdev
, 0);
814 i2c_clk
= devm_clk_get(dev
, "div-clk");
815 if (IS_ERR(i2c_clk
)) {
816 dev_err(dev
, "failed to get controller clock\n");
820 nvec
->rst
= devm_reset_control_get_exclusive(dev
, "i2c");
821 if (IS_ERR(nvec
->rst
)) {
822 dev_err(dev
, "failed to get controller reset\n");
823 return PTR_ERR(nvec
->rst
);
827 nvec
->i2c_clk
= i2c_clk
;
828 nvec
->rx
= &nvec
->msg_pool
[0];
830 ATOMIC_INIT_NOTIFIER_HEAD(&nvec
->notifier_list
);
832 init_completion(&nvec
->sync_write
);
833 init_completion(&nvec
->ec_transfer
);
834 mutex_init(&nvec
->sync_write_mutex
);
835 spin_lock_init(&nvec
->tx_lock
);
836 spin_lock_init(&nvec
->rx_lock
);
837 INIT_LIST_HEAD(&nvec
->rx_data
);
838 INIT_LIST_HEAD(&nvec
->tx_data
);
839 INIT_WORK(&nvec
->rx_work
, nvec_dispatch
);
840 INIT_WORK(&nvec
->tx_work
, nvec_request_master
);
842 nvec
->gpiod
= devm_gpiod_get(dev
, "request", GPIOD_OUT_HIGH
);
843 if (IS_ERR(nvec
->gpiod
)) {
844 dev_err(dev
, "couldn't request gpio\n");
845 return PTR_ERR(nvec
->gpiod
);
848 err
= devm_request_irq(dev
, nvec
->irq
, nvec_interrupt
, IRQF_NO_AUTOEN
,
851 dev_err(dev
, "couldn't request irq\n");
855 tegra_init_i2c_slave(nvec
);
857 /* enable event reporting */
858 nvec_toggle_global_events(nvec
, true);
860 nvec
->nvec_status_notifier
.notifier_call
= nvec_status_notifier
;
861 nvec_register_notifier(nvec
, &nvec
->nvec_status_notifier
, 0);
863 nvec_power_handle
= nvec
;
864 pm_power_off
= nvec_power_off
;
866 /* Get Firmware Version */
867 err
= nvec_write_sync(nvec
, get_firmware_version
, 2, &msg
);
871 "ec firmware version %02x.%02x.%02x / %02x\n",
872 msg
->data
[4], msg
->data
[5],
873 msg
->data
[6], msg
->data
[7]);
875 nvec_msg_free(nvec
, msg
);
878 ret
= mfd_add_devices(dev
, 0, nvec_devices
,
879 ARRAY_SIZE(nvec_devices
), NULL
, 0, NULL
);
881 dev_err(dev
, "error adding subdevices\n");
883 /* unmute speakers? */
884 nvec_write_async(nvec
, unmute_speakers
, 4);
886 /* enable lid switch event */
887 nvec_event_mask(enable_event
, LID_SWITCH
);
888 nvec_write_async(nvec
, enable_event
, 7);
890 /* enable power button event */
891 nvec_event_mask(enable_event
, PWR_BUTTON
);
892 nvec_write_async(nvec
, enable_event
, 7);
897 static void tegra_nvec_remove(struct platform_device
*pdev
)
899 struct nvec_chip
*nvec
= platform_get_drvdata(pdev
);
901 nvec_toggle_global_events(nvec
, false);
902 mfd_remove_devices(nvec
->dev
);
903 nvec_unregister_notifier(nvec
, &nvec
->nvec_status_notifier
);
904 cancel_work_sync(&nvec
->rx_work
);
905 cancel_work_sync(&nvec
->tx_work
);
906 /* FIXME: needs check whether nvec is responsible for power off */
910 #ifdef CONFIG_PM_SLEEP
911 static int nvec_suspend(struct device
*dev
)
914 struct nvec_chip
*nvec
= dev_get_drvdata(dev
);
915 struct nvec_msg
*msg
;
916 char ap_suspend
[] = { NVEC_SLEEP
, AP_SUSPEND
};
918 dev_dbg(nvec
->dev
, "suspending\n");
920 /* keep these sync or you'll break suspend */
921 nvec_toggle_global_events(nvec
, false);
923 err
= nvec_write_sync(nvec
, ap_suspend
, sizeof(ap_suspend
), &msg
);
925 nvec_msg_free(nvec
, msg
);
927 nvec_disable_i2c_slave(nvec
);
932 static int nvec_resume(struct device
*dev
)
934 struct nvec_chip
*nvec
= dev_get_drvdata(dev
);
936 dev_dbg(nvec
->dev
, "resuming\n");
937 tegra_init_i2c_slave(nvec
);
938 nvec_toggle_global_events(nvec
, true);
944 static SIMPLE_DEV_PM_OPS(nvec_pm_ops
, nvec_suspend
, nvec_resume
);
946 /* Match table for of_platform binding */
947 static const struct of_device_id nvidia_nvec_of_match
[] = {
948 { .compatible
= "nvidia,nvec", },
951 MODULE_DEVICE_TABLE(of
, nvidia_nvec_of_match
);
953 static struct platform_driver nvec_device_driver
= {
954 .probe
= tegra_nvec_probe
,
955 .remove
= tegra_nvec_remove
,
959 .of_match_table
= nvidia_nvec_of_match
,
963 module_platform_driver(nvec_device_driver
);
965 MODULE_ALIAS("platform:nvec");
966 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface");
967 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>");
968 MODULE_LICENSE("GPL");