1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Definitions for CS4271 ASoC codec driver
5 * Copyright (c) 2010 Alexander Sverdlin <subaparts@yandex.ru>
11 struct cs4271_platform_data
{
12 bool amutec_eq_bmutec
; /* flag to enable AMUTEC=BMUTEC */
15 * The CS4271 requires its LRCLK and MCLK to be stable before its RESET
16 * line is de-asserted. That also means that clocks cannot be changed
17 * without putting the chip back into hardware reset, which also requires
18 * a complete re-initialization of all registers.
20 * One (undocumented) workaround is to assert and de-assert the PDN bit
21 * in the MODE2 register. This workaround can be enabled with the
24 * Note that this is not needed in case the clocks are stable
25 * throughout the entire runtime of the codec.
27 bool enable_soft_reset
;
30 #endif /* __CS4271_H */