1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mt8195-audsys-clk.h -- Mediatek 8195 audsys clock definition
5 * Copyright (c) 2021 MediaTek Inc.
6 * Author: Trevor Wu <trevor.wu@mediatek.com>
9 #ifndef _MT8195_AUDSYS_CLK_H_
10 #define _MT8195_AUDSYS_CLK_H_
12 int mt8195_audsys_clk_register(struct mtk_base_afe
*afe
);