1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * RZ/G2L Display Unit CRTCs
5 * Copyright (C) 2023 Renesas Electronics Corporation
7 * Based on rcar_du_crtc.h
10 #ifndef __RZG2L_DU_CRTC_H__
11 #define __RZG2L_DU_CRTC_H__
13 #include <linux/container_of.h>
14 #include <linux/mutex.h>
15 #include <linux/spinlock.h>
16 #include <linux/wait.h>
18 #include <drm/drm_crtc.h>
19 #include <drm/drm_writeback.h>
21 #include <media/vsp1.h>
26 struct rzg2l_du_format_info
;
29 * struct rzg2l_du_crtc - the CRTC, representing a DU superposition processor
30 * @crtc: base DRM CRTC
32 * @initialized: whether the CRTC has been initialized and clocks enabled
33 * @vblank_enable: whether vblank events are enabled on this CRTC
34 * @event: event to post when the pending page flip completes
35 * @flip_wait: wait queue used to signal page flip completion
36 * @vsp: VSP feeding video to this CRTC
37 * @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
38 * @rstc: reset controller
39 * @rzg2l_clocks: the bus, main and video clock
41 struct rzg2l_du_crtc
{
44 struct rzg2l_du_device
*dev
;
48 struct drm_pending_vblank_event
*event
;
49 wait_queue_head_t flip_wait
;
51 struct rzg2l_du_vsp
*vsp
;
52 unsigned int vsp_pipe
;
54 const char *const *sources
;
55 unsigned int sources_count
;
57 struct reset_control
*rstc
;
65 static inline struct rzg2l_du_crtc
*to_rzg2l_crtc(struct drm_crtc
*c
)
67 return container_of(c
, struct rzg2l_du_crtc
, crtc
);
71 * struct rzg2l_du_crtc_state - Driver-specific CRTC state
72 * @state: base DRM CRTC state
73 * @outputs: bitmask of the outputs (enum rzg2l_du_output) driven by this CRTC
75 struct rzg2l_du_crtc_state
{
76 struct drm_crtc_state state
;
80 static inline struct rzg2l_du_crtc_state
*to_rzg2l_crtc_state(struct drm_crtc_state
*s
)
82 return container_of(s
, struct rzg2l_du_crtc_state
, state
);
85 int rzg2l_du_crtc_create(struct rzg2l_du_device
*rcdu
);
87 void rzg2l_du_crtc_finish_page_flip(struct rzg2l_du_crtc
*rcrtc
);
89 #endif /* __RZG2L_DU_CRTC_H__ */