1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom Limited
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_drv.h>
17 #include <drm/drm_edid.h>
18 #include <drm/drm_of.h>
19 #include <drm/drm_panel.h>
20 #include <drm/drm_probe_helper.h>
21 #include <drm/drm_simple_kms_helper.h>
22 #include <linux/clk.h>
23 #include <linux/component.h>
24 #include <linux/media-bus-format.h>
25 #include <linux/mod_devicetable.h>
26 #include <linux/platform_device.h>
31 # define DPI_OUTPUT_ENABLE_MODE BIT(16)
33 /* The order field takes the incoming 24 bit RGB from the pixel valve
34 * and shuffles the 3 channels.
36 # define DPI_ORDER_MASK VC4_MASK(15, 14)
37 # define DPI_ORDER_SHIFT 14
38 # define DPI_ORDER_RGB 0
39 # define DPI_ORDER_BGR 1
40 # define DPI_ORDER_GRB 2
41 # define DPI_ORDER_BRG 3
43 /* The format field takes the ORDER-shuffled pixel valve data and
44 * formats it onto the output lines.
46 # define DPI_FORMAT_MASK VC4_MASK(13, 11)
47 # define DPI_FORMAT_SHIFT 11
48 /* This define is named in the hardware, but actually just outputs 0. */
49 # define DPI_FORMAT_9BIT_666_RGB 0
50 /* Outputs 00000000rrrrrggggggbbbbb */
51 # define DPI_FORMAT_16BIT_565_RGB_1 1
52 /* Outputs 000rrrrr00gggggg000bbbbb */
53 # define DPI_FORMAT_16BIT_565_RGB_2 2
54 /* Outputs 00rrrrr000gggggg00bbbbb0 */
55 # define DPI_FORMAT_16BIT_565_RGB_3 3
56 /* Outputs 000000rrrrrrggggggbbbbbb */
57 # define DPI_FORMAT_18BIT_666_RGB_1 4
58 /* Outputs 00rrrrrr00gggggg00bbbbbb */
59 # define DPI_FORMAT_18BIT_666_RGB_2 5
60 /* Outputs rrrrrrrrggggggggbbbbbbbb */
61 # define DPI_FORMAT_24BIT_888_RGB 6
63 /* Reverses the polarity of the corresponding signal */
64 # define DPI_PIXEL_CLK_INVERT BIT(10)
65 # define DPI_HSYNC_INVERT BIT(9)
66 # define DPI_VSYNC_INVERT BIT(8)
67 # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
69 /* Outputs the signal the falling clock edge instead of rising. */
70 # define DPI_HSYNC_NEGATE BIT(6)
71 # define DPI_VSYNC_NEGATE BIT(5)
72 # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
74 /* Disables the signal */
75 # define DPI_HSYNC_DISABLE BIT(3)
76 # define DPI_VSYNC_DISABLE BIT(2)
77 # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
79 /* Power gate to the device, full reset at 0 -> 1 transition */
80 # define DPI_ENABLE BIT(0)
82 /* All other registers besides DPI_C return the ID */
84 # define DPI_ID_VALUE 0x00647069
86 /* General DPI hardware state. */
88 struct vc4_encoder encoder
;
90 struct platform_device
*pdev
;
94 struct clk
*pixel_clock
;
95 struct clk
*core_clock
;
97 struct debugfs_regset32 regset
;
100 #define to_vc4_dpi(_encoder) \
101 container_of_const(_encoder, struct vc4_dpi, encoder.base)
103 #define DPI_READ(offset) \
105 kunit_fail_current_test("Accessing a register in a unit test!\n"); \
106 readl(dpi->regs + (offset)); \
109 #define DPI_WRITE(offset, val) \
111 kunit_fail_current_test("Accessing a register in a unit test!\n"); \
112 writel(val, dpi->regs + (offset)); \
115 static const struct debugfs_reg32 dpi_regs
[] = {
120 static void vc4_dpi_encoder_disable(struct drm_encoder
*encoder
)
122 struct drm_device
*dev
= encoder
->dev
;
123 struct vc4_dpi
*dpi
= to_vc4_dpi(encoder
);
126 if (!drm_dev_enter(dev
, &idx
))
129 clk_disable_unprepare(dpi
->pixel_clock
);
134 static void vc4_dpi_encoder_enable(struct drm_encoder
*encoder
)
136 struct drm_device
*dev
= encoder
->dev
;
137 struct drm_display_mode
*mode
= &encoder
->crtc
->mode
;
138 struct vc4_dpi
*dpi
= to_vc4_dpi(encoder
);
139 struct drm_connector_list_iter conn_iter
;
140 struct drm_connector
*connector
= NULL
, *connector_scan
;
141 u32 dpi_c
= DPI_ENABLE
;
145 /* Look up the connector attached to DPI so we can get the
146 * bus_format. Ideally the bridge would tell us the
147 * bus_format we want, but it doesn't yet, so assume that it's
148 * uniform throughout the bridge chain.
150 drm_connector_list_iter_begin(dev
, &conn_iter
);
151 drm_for_each_connector_iter(connector_scan
, &conn_iter
) {
152 if (connector_scan
->encoder
== encoder
) {
153 connector
= connector_scan
;
157 drm_connector_list_iter_end(&conn_iter
);
159 /* Default to 18bit if no connector or format found. */
160 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1
, DPI_FORMAT
);
163 if (connector
->display_info
.num_bus_formats
) {
164 u32 bus_format
= connector
->display_info
.bus_formats
[0];
166 dpi_c
&= ~DPI_FORMAT_MASK
;
168 switch (bus_format
) {
169 case MEDIA_BUS_FMT_RGB888_1X24
:
170 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB
,
173 case MEDIA_BUS_FMT_BGR888_1X24
:
174 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB
,
176 dpi_c
|= VC4_SET_FIELD(DPI_ORDER_BGR
,
179 case MEDIA_BUS_FMT_BGR666_1X24_CPADHI
:
180 dpi_c
|= VC4_SET_FIELD(DPI_ORDER_BGR
, DPI_ORDER
);
182 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI
:
183 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2
,
186 case MEDIA_BUS_FMT_BGR666_1X18
:
187 dpi_c
|= VC4_SET_FIELD(DPI_ORDER_BGR
, DPI_ORDER
);
189 case MEDIA_BUS_FMT_RGB666_1X18
:
190 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1
,
193 case MEDIA_BUS_FMT_RGB565_1X16
:
194 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1
,
197 case MEDIA_BUS_FMT_RGB565_1X24_CPADHI
:
198 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2
,
202 drm_err(dev
, "Unknown media bus format %d\n",
208 if (connector
->display_info
.bus_flags
& DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE
)
209 dpi_c
|= DPI_PIXEL_CLK_INVERT
;
211 if (connector
->display_info
.bus_flags
& DRM_BUS_FLAG_DE_LOW
)
212 dpi_c
|= DPI_OUTPUT_ENABLE_INVERT
;
215 if (mode
->flags
& DRM_MODE_FLAG_CSYNC
) {
216 if (mode
->flags
& DRM_MODE_FLAG_NCSYNC
)
217 dpi_c
|= DPI_OUTPUT_ENABLE_INVERT
;
219 dpi_c
|= DPI_OUTPUT_ENABLE_MODE
;
221 if (mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
222 dpi_c
|= DPI_HSYNC_INVERT
;
223 else if (!(mode
->flags
& DRM_MODE_FLAG_PHSYNC
))
224 dpi_c
|= DPI_HSYNC_DISABLE
;
226 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
227 dpi_c
|= DPI_VSYNC_INVERT
;
228 else if (!(mode
->flags
& DRM_MODE_FLAG_PVSYNC
))
229 dpi_c
|= DPI_VSYNC_DISABLE
;
232 if (!drm_dev_enter(dev
, &idx
))
235 DPI_WRITE(DPI_C
, dpi_c
);
237 ret
= clk_set_rate(dpi
->pixel_clock
, mode
->clock
* 1000);
239 drm_err(dev
, "Failed to set clock rate: %d\n", ret
);
241 ret
= clk_prepare_enable(dpi
->pixel_clock
);
243 drm_err(dev
, "Failed to set clock rate: %d\n", ret
);
248 static enum drm_mode_status
vc4_dpi_encoder_mode_valid(struct drm_encoder
*encoder
,
249 const struct drm_display_mode
*mode
)
251 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
252 return MODE_NO_INTERLACE
;
257 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs
= {
258 .disable
= vc4_dpi_encoder_disable
,
259 .enable
= vc4_dpi_encoder_enable
,
260 .mode_valid
= vc4_dpi_encoder_mode_valid
,
263 static int vc4_dpi_late_register(struct drm_encoder
*encoder
)
265 struct drm_device
*drm
= encoder
->dev
;
266 struct vc4_dpi
*dpi
= to_vc4_dpi(encoder
);
268 vc4_debugfs_add_regset32(drm
, "dpi_regs", &dpi
->regset
);
273 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs
= {
274 .late_register
= vc4_dpi_late_register
,
277 static const struct of_device_id vc4_dpi_dt_match
[] = {
278 { .compatible
= "brcm,bcm2835-dpi", .data
= NULL
},
282 /* Sets up the next link in the display chain, whether it's a panel or
285 static int vc4_dpi_init_bridge(struct vc4_dpi
*dpi
)
287 struct drm_device
*drm
= dpi
->encoder
.base
.dev
;
288 struct device
*dev
= &dpi
->pdev
->dev
;
289 struct drm_bridge
*bridge
;
291 bridge
= drmm_of_get_bridge(drm
, dev
->of_node
, 0, 0);
292 if (IS_ERR(bridge
)) {
293 /* If nothing was connected in the DT, that's not an
296 if (PTR_ERR(bridge
) == -ENODEV
)
299 return PTR_ERR(bridge
);
302 return drm_bridge_attach(&dpi
->encoder
.base
, bridge
, NULL
, 0);
305 static void vc4_dpi_disable_clock(void *ptr
)
307 struct vc4_dpi
*dpi
= ptr
;
309 clk_disable_unprepare(dpi
->core_clock
);
312 static int vc4_dpi_bind(struct device
*dev
, struct device
*master
, void *data
)
314 struct platform_device
*pdev
= to_platform_device(dev
);
315 struct drm_device
*drm
= dev_get_drvdata(master
);
319 dpi
= drmm_kzalloc(drm
, sizeof(*dpi
), GFP_KERNEL
);
323 dpi
->encoder
.type
= VC4_ENCODER_TYPE_DPI
;
325 dpi
->regs
= vc4_ioremap_regs(pdev
, 0);
326 if (IS_ERR(dpi
->regs
))
327 return PTR_ERR(dpi
->regs
);
328 dpi
->regset
.base
= dpi
->regs
;
329 dpi
->regset
.regs
= dpi_regs
;
330 dpi
->regset
.nregs
= ARRAY_SIZE(dpi_regs
);
332 if (DPI_READ(DPI_ID
) != DPI_ID_VALUE
) {
333 dev_err(dev
, "Port returned 0x%08x for ID instead of 0x%08x\n",
334 DPI_READ(DPI_ID
), DPI_ID_VALUE
);
338 dpi
->core_clock
= devm_clk_get(dev
, "core");
339 if (IS_ERR(dpi
->core_clock
)) {
340 ret
= PTR_ERR(dpi
->core_clock
);
341 if (ret
!= -EPROBE_DEFER
)
342 drm_err(drm
, "Failed to get core clock: %d\n", ret
);
346 dpi
->pixel_clock
= devm_clk_get(dev
, "pixel");
347 if (IS_ERR(dpi
->pixel_clock
)) {
348 ret
= PTR_ERR(dpi
->pixel_clock
);
349 if (ret
!= -EPROBE_DEFER
)
350 drm_err(drm
, "Failed to get pixel clock: %d\n", ret
);
354 ret
= clk_prepare_enable(dpi
->core_clock
);
356 drm_err(drm
, "Failed to turn on core clock: %d\n", ret
);
360 ret
= devm_add_action_or_reset(dev
, vc4_dpi_disable_clock
, dpi
);
364 ret
= drmm_encoder_init(drm
, &dpi
->encoder
.base
,
365 &vc4_dpi_encoder_funcs
,
366 DRM_MODE_ENCODER_DPI
,
371 drm_encoder_helper_add(&dpi
->encoder
.base
, &vc4_dpi_encoder_helper_funcs
);
373 ret
= vc4_dpi_init_bridge(dpi
);
377 dev_set_drvdata(dev
, dpi
);
382 static const struct component_ops vc4_dpi_ops
= {
383 .bind
= vc4_dpi_bind
,
386 static int vc4_dpi_dev_probe(struct platform_device
*pdev
)
388 return component_add(&pdev
->dev
, &vc4_dpi_ops
);
391 static void vc4_dpi_dev_remove(struct platform_device
*pdev
)
393 component_del(&pdev
->dev
, &vc4_dpi_ops
);
396 struct platform_driver vc4_dpi_driver
= {
397 .probe
= vc4_dpi_dev_probe
,
398 .remove
= vc4_dpi_dev_remove
,
401 .of_match_table
= vc4_dpi_dt_match
,