1 # SPDX-License-Identifier: GPL-2.0-only
3 # Coresight configuration
6 tristate "CoreSight Tracing Support"
7 depends on ARM || ARM64
13 This framework provides a kernel interface for the CoreSight debug
14 and trace drivers to register themselves with. It's intended to build
15 a topological view of the CoreSight components based on a DT
16 specification and configure the right series of components when a
17 trace source gets enabled.
19 To compile this driver as a module, choose M here: the
20 module will be called coresight.
23 config CORESIGHT_LINKS_AND_SINKS
24 tristate "CoreSight Link and Sink drivers"
26 This enables support for CoreSight link and sink drivers that are
27 responsible for transporting and collecting the trace data
28 respectively. Link and sinks are dynamically aggregated with a trace
29 entity at run time to form a complete trace path.
31 To compile these drivers as modules, choose M here: the
32 modules will be called coresight-funnel and coresight-replicator.
34 config CORESIGHT_LINK_AND_SINK_TMC
35 tristate "Coresight generic TMC driver"
37 depends on CORESIGHT_LINKS_AND_SINKS
39 This enables support for the Trace Memory Controller driver.
40 Depending on its configuration the device can act as a link (embedded
41 trace router - ETR) or sink (embedded trace FIFO). The driver
42 complies with the generic implementation of the component without
43 special enhancement or added features.
45 To compile this driver as a module, choose M here: the
46 module will be called coresight-tmc.
49 tristate "Coresight Address Translation Unit (CATU) driver"
50 depends on CORESIGHT_LINK_AND_SINK_TMC
52 Enable support for the Coresight Address Translation Unit (CATU).
53 CATU supports a scatter gather table of 4K pages, with forward/backward
54 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
55 buffer by translating the addresses used by ETR to the physical address
56 by looking up the provided table. CATU can also be used in pass-through
57 mode where the address is not translated.
59 To compile this driver as a module, choose M here: the
60 module will be called coresight-catu.
62 config CORESIGHT_SINK_TPIU
63 tristate "Coresight generic TPIU driver"
64 depends on CORESIGHT_LINKS_AND_SINKS
66 This enables support for the Trace Port Interface Unit driver,
67 responsible for bridging the gap between the on-chip coresight
68 components and a trace for bridging the gap between the on-chip
69 coresight components and a trace port collection engine, typically
70 connected to an external host for use case capturing more traces than
71 the on-board coresight memory can handle.
73 To compile this driver as a module, choose M here: the
74 module will be called coresight-tpiu.
76 config CORESIGHT_SINK_ETBV10
77 tristate "Coresight ETBv1.0 driver"
78 depends on CORESIGHT_LINKS_AND_SINKS
80 This enables support for the Embedded Trace Buffer version 1.0 driver
81 that complies with the generic implementation of the component without
82 special enhancement or added features.
84 To compile this driver as a module, choose M here: the
85 module will be called coresight-etb10.
87 config CORESIGHT_SOURCE_ETM3X
88 tristate "CoreSight Embedded Trace Macrocell 3.x driver"
90 select CORESIGHT_LINKS_AND_SINKS
92 This driver provides support for processor ETM3.x and PTM1.x modules,
93 which allows tracing the instructions that a processor is executing
94 This is primarily useful for instruction level tracing. Depending
95 the ETM version data tracing may also be available.
97 To compile this driver as a module, choose M here: the
98 module will be called coresight-etm3x.
100 config CORESIGHT_SOURCE_ETM4X
101 tristate "CoreSight ETMv4.x / ETE driver"
103 select CORESIGHT_LINKS_AND_SINKS
104 select PID_IN_CONTEXTIDR
106 This driver provides support for the CoreSight Embedded Trace Macrocell
107 version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
108 modules, tracing the instructions that a processor is executing. This is
109 primarily useful for instruction level tracing.
111 To compile this driver as a module, choose M here: the
112 module will be called coresight-etm4x.
114 config ETM4X_IMPDEF_FEATURE
115 bool "Control implementation defined overflow support in ETM 4.x driver"
116 depends on CORESIGHT_SOURCE_ETM4X
118 This control provides implementation define control for CoreSight
119 ETM 4.x tracer module that can't reduce commit rate automatically.
120 This avoids overflow between the ETM tracer module and the cpu core.
123 tristate "CoreSight System Trace Macrocell driver"
124 depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
125 select CORESIGHT_LINKS_AND_SINKS
128 This driver provides support for hardware assisted software
129 instrumentation based tracing. This is primarily used for
130 logging useful software events or data coming from various entities
131 in the system, possibly running different OSs
133 To compile this driver as a module, choose M here: the
134 module will be called coresight-stm.
136 config CORESIGHT_CPU_DEBUG
137 tristate "CoreSight CPU Debug driver"
138 depends on ARM || ARM64
141 This driver provides support for coresight debugging module. This
142 is primarily used to dump sample-based profiling registers when
143 system triggers panic, the driver will parse context registers so
144 can quickly get to know program counter (PC), secure state,
145 exception level, etc. Before use debugging functionality, platform
146 needs to ensure the clock domain and power domain are enabled
147 properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst
148 for detailed description and the example for usage.
150 To compile this driver as a module, choose M here: the
151 module will be called coresight-cpu-debug.
153 config CORESIGHT_CPU_DEBUG_DEFAULT_ON
154 bool "Enable CoreSight CPU Debug by default"
155 depends on CORESIGHT_CPU_DEBUG
157 Say Y here to enable the CoreSight Debug panic-debug by default. This
158 can also be enabled via debugfs, but this ensures the debug feature
159 is enabled as early as possible.
161 Has the same effect as setting coresight_cpu_debug.enable=1 on the
167 tristate "CoreSight Cross Trigger Interface (CTI) driver"
168 depends on ARM || ARM64
170 This driver provides support for CoreSight CTI and CTM components.
171 These provide hardware triggering events between CoreSight trace
172 source and sink components. These can be used to halt trace or
173 inject events into the trace stream. CTI also provides a software
174 control to trigger the same halt events. This can provide fast trace
175 halt compared to disabling sources and sinks normally in driver
178 To compile this driver as a module, choose M here: the
179 module will be called coresight-cti.
181 config CORESIGHT_CTI_INTEGRATION_REGS
182 bool "Access CTI CoreSight Integration Registers"
183 depends on CORESIGHT_CTI
185 This option adds support for the CoreSight integration registers on
186 this device. The integration registers allow the exploration of the
187 CTI trigger connections between this and other devices.These
188 registers are not used in normal operation and can leave devices in
189 an inconsistent state.
191 config CORESIGHT_TRBE
192 tristate "Trace Buffer Extension (TRBE) driver"
193 depends on ARM64 && CORESIGHT_SOURCE_ETM4X
195 This driver provides support for percpu Trace Buffer Extension (TRBE).
196 TRBE always needs to be used along with its corresponding percpu ETE
197 component. ETE generates trace data which is then captured with TRBE.
198 Unlike traditional sink devices, TRBE is a CPU feature accessible via
199 system registers. But its explicit dependency with trace unit (ETE)
200 requires it to be plugged in as a coresight sink device.
202 To compile this driver as a module, choose M here: the module will be
203 called coresight-trbe.
206 tristate "Ultrasoc system memory buffer drivers"
207 depends on ACPI || COMPILE_TEST
208 depends on ARM64 && CORESIGHT_LINKS_AND_SINKS
210 This driver provides support for the Ultrasoc system memory buffer (SMB).
211 SMB is responsible for receiving the trace data from Coresight ETM devices
212 and storing them to a system buffer.
214 To compile this driver as a module, choose M here: the module will be
217 config CORESIGHT_TPDM
218 tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
219 select CORESIGHT_LINKS_AND_SINKS
220 select CORESIGHT_TPDA
222 This driver provides support for configuring monitor. Monitors are
223 primarily responsible for data set collection and support the
224 ability to collect any permutation of data set types.
226 To compile this driver as a module, choose M here: the module will be
227 called coresight-tpdm.
229 config CORESIGHT_TPDA
230 tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
232 This driver provides support for configuring aggregator. This is
233 primarily useful for pulling the data sets from one or more
234 attached monitors and pushing the resultant data out. Multiple
235 monitors are connected on different input ports of TPDA.
237 To compile this driver as a module, choose M here: the module will be
238 called coresight-tpda.
240 config CORESIGHT_DUMMY
241 tristate "Dummy driver support"
243 Enables support for dummy driver. Dummy driver can be used for
244 CoreSight sources/sinks that are owned and configured by some
245 other subsystem and use Linux drivers to configure rest of trace
248 To compile this driver as a module, choose M here: the module will be
249 called coresight-dummy.