2 * Arch depended part of ddi_support
4 * Supported by Alexey V. Sitnikov, alexmipt@mcst.ru, MCST
8 #include <linux/mcst/ddi.h>
9 #include <asm/uaccess.h>
10 #include <asm/pgtable.h>
13 #include <linux/pci.h>
14 #include <linux/slab.h>
15 #include <linux/mcst/pci_dev_info.h>
16 #include <linux/interrupt.h>
19 #define dbgddi if (DBG_MODE) printk
21 typedef struct sbus_dev sbus_dev_t
;
22 typedef struct pci_dev pci_dev_t
;
24 struct pci_dev_info pci_dev_info
[MCST_MAX_DRV
] = {
29 _ddi_read_long(int t
, ulong_t
*p
)
31 dbgddi("ddi_read_long: start\n");
32 if (t
== DDI_SBUS_SPARC
) {
33 #if defined(CONFIG_SBUS)
34 return (sbus_readl((const volatile void __iomem
*)p
));
35 #elif IS_ENABLED(CONFIG_PCI2SBUS)
36 return (my_sbus_readl((long)p
));
38 printk("_ddi_read_long: Unconfigured dev_type = %d\n", t
);
40 #endif /* CONFIG_SBUS */
42 } else if (t
== DDI_PCI_SPARC
) {
44 return (readl((const volatile void __iomem
*)p
));
46 printk("_ddi_read_long: Unconfigured dev_type = %d\n", t
);
48 #endif /* CONFIG_PCI */
50 printk("_ddi_read_long: Unknown dev_type = %d\n", t
);
56 _ddi_write_long(int t
, ulong_t
*p
, ulong_t b
)
59 dbgddi("ddi_write_long: start, addr = 0x%lx, val = 0x%lx\n", (unsigned long)p
, b
);
61 if (t
== DDI_SBUS_SPARC
) {
62 #if defined(CONFIG_SBUS)
63 sbus_writel(b
, (volatile void __iomem
*)p
);
64 #elif IS_ENABLED(CONFIG_PCI2SBUS)
65 my_sbus_writel(b
, (long)p
);
67 printk("_ddi_write_long: Unconfigured dev_type = %d\n", t
);
69 #endif /* CONFIG_SBUS */
70 } else if (t
== DDI_PCI_SPARC
) {
72 writel(b
, (volatile void __iomem
*)p
);
74 printk("_ddi_write_long: Unconfigured dev_type = %d\n", t
);
76 #endif /* CONFIG_PCI */
78 printk("_ddi_write_long: Unknown dev_type = %d\n", t
);
84 extern int curr_drv_nr
;
86 extern char *ddi_drivers
[];
87 extern char *ddi_drv_dir
[];
88 extern unsigned short ddi_vendors
[];
89 extern unsigned short ddi_devices
[];
91 /* dma_memory - ������ �� ������� ���������� */
93 ddi_dev_map_mem(struct device
*dev
, size_t size
, unsigned long dma_memory
)
96 dbgddi("** ddi_dev_map_mem: start **\n");
97 // mem = sbus_map_single(dev, (void *)dma_memory, size, SBUS_DMA_FROMDEVICE);
98 // mem = pci_map_single(dev, (void *)dma_memory, size, PCI_DMA_FROMDEVICE);
99 dbgddi("** ddi_dev_map_mem: finish **\n");
105 _ddi_dma_sync(struct device
*dev
, dma_addr_t addr
, size_t size
, int direction
)
107 dbgddi("** ddi_dma_sync: start **\n");
108 dma_sync_single_for_cpu(dev
, addr
, size
, direction
);
109 dbgddi("** ddi_dma_sync: finish **\n");
114 ddi_dev_alloc_mem(struct device
*dev
, size_t size
, unsigned long *va
)
118 dbgddi("** ddi_dev_alloc_mem: start **\n");
119 *va
= (unsigned long)dma_alloc_coherent(dev
, size
, &mem
, GFP_DMA
);
120 dbgddi("** ddi_dev_alloc_mem: finish **\n");
125 ddi_dev_free_mem(struct device
*dev
, size_t size
, unsigned long va
, dma_addr_t dma_addr
)
127 dbgddi("** ddi_dev_free_mem: start **\n");
128 dbgddi("** ddi_dev_free_mem: dma_addr = 0x%lx, va = 0x%lx **\n",
129 (unsigned long)dma_addr
, (unsigned long)va
);
131 dma_free_coherent(dev
, size
, (void *)va
, dma_addr
);
132 dbgddi("** ddi_dev_free_mem: finish **\n");
136 /* dev_memory - ������ �� ������� ���������� */
137 /* dma_memory - ������ �� ������� ���������� */
139 ddi_dev_unmap_mem(struct device
*dev
, size_t size
, unsigned long dma_memory
, dma_addr_t dev_memory
)
141 dbgddi("** ddi_dev_unamp_mem: start **\n");
142 // sbus_unmap_single(dev, dev_memory, size, SBUS_DMA_FROMDEVICE);
143 // pci_unmap_single(dev, dev_memory, size, PCI_DMA_FROMDEVICE);
144 dbgddi("** ddi_dev_unamp_mem: dev_memory = 0x%lx, dma_memory = 0x%lx **\n",
145 (unsigned long)dev_memory
, (unsigned long)dma_memory
);
147 dbgddi("** ddi_dev_unmap_mem: finish **\n");
152 ddi_get_order(size_t sz
)
154 dbgddi("ddi_get_order: start\n");
155 return(get_order(sz
));