2 /* òÅÄÁËÃÉÑ ÆÁÊÌÁ mcap.h:
3 éí÷ó - 10.02.05; home - 22.04.04 */
8 #include <linux/mcst/linux_mcap_io.h>
14 /* ÷ÅÒÓÉÑ ÄÒÁÊ×ÅÒÁ ÷ë */
15 #ifdef MCAP_OLD_VERSION
16 #define VER_DRV_VK_MC19 0x04030507
17 #define work_var_drv_vk 13
19 #define VER_DRV_VK_MCAP 0x14010608
20 #define work_var_drv_vk 18
21 #endif /* MCAP_OLD_VERSION */
28 #define cv_destroy(arg)
32 /* õÐÒÁ×ÌÅÎÉÅ ×ÙÄÁÞÅÊ ÓÏÏÂÝÅÎÉÊ ÏÔÌÁÄËÉ:
33 if (debug_mcap == 0) {
34 <ÓÏÏÂÝÅÎÉÅ ÎÅ ×ÙÄÁÇÔÓÑ>
36 if (debug_mcap == 1) {
41 #ifndef MCAP_OLD_VERSION
42 #define MCAP_MP_ROM_DRV_INIT_ADDR 0x00400
43 #define MCAP_MAX_SIZE_BUFFER_DMA 0x40000 /* íÁËÓ. ÒÁÚÍÅÒ ÂÕÆÅÒÁ ððä */
44 #define MCAP_MP_INIT_AREA_BMEM_SIZE 0x00010 /* size of MP init area */
45 #define MCAP_MP_HALT_OPCODE 0xf4f4f4f4UL
46 #define MCAP_MP_ROM_DRV_INIT_CODE {0xfa33c08eUL, 0xc0c60604UL, \
48 /* CLI; _ES = 0; mov byte ptr */
51 typedef union mcap_mp_init_area_t_
53 char as_chars
[MCAP_MP_INIT_AREA_BMEM_SIZE
];
54 u_char as_u_chars
[MCAP_MP_INIT_AREA_BMEM_SIZE
];
55 int as_longs
[MCAP_MP_INIT_AREA_BMEM_SIZE
/ sizeof(int)];
56 u_int as_u_longs
[MCAP_MP_INIT_AREA_BMEM_SIZE
/ sizeof(u_int
)];
57 } mcap_mp_init_area_t
;
59 #define MCAP_MP_INIT_AREA_char as_chars
60 #define MCAP_MP_INIT_AREA_u_char as_u_chars
61 #define MCAP_MP_INIT_AREA_long as_longs
62 #define MCAP_MP_INIT_AREA_u_long as_u_longs
64 typedef struct mcap_mp_rom_drv
{
65 int debug_drv_start
; /* ÎÅ ÉÓÐÏÌØÚÕÅÔÓÑ */
66 int rom_disable
; /* ÐÒÉÚÎÁË ÚÁÇÒÕÚËÉ 1 - ðúõ, 0 - ïúõ */
69 #endif /* MCAP_OLD_VERSION */
71 /* óÔÒÕËÔÕÒÙ ÍÅÖÄÒÁÊ×ÅÒÎÏÊ Ó×ÑÚÉ */
72 /* óÐÉÓÏË ÎÏÍÅÒÏ× ÚÁÄÁÎÉÊ ÄÌÑ ÄÒÁÊ×ÅÒÁ íð */
73 typedef enum _mp_task_t
75 no_mp_task
= 0, /* Mð ÖÄÅÔ ÚÁÄÁÎÉÅ */
76 init_driver_mp_task
= 1, /* ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
77 init_buffers_data_exchange_task
= 2, /* ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
78 mcap_halt_channel_data_exchange_task
= 9, /* ÏÓÔÁÎÏ× ËÁÎÁÌÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
79 mcap_turn_off_channels_task
= 10 /* ÏÔËÌÀÞÅÎÉÅ ËÁÎÁÌÏ× ÏÔ ÌÉÎÉÊ Ó×ÑÚÉ */
82 /* óÐÉÓÏË ÎÏÍÅÒÏ× ÚÁÄÁÎÉÊ ÄÌÑ ÄÒÁÊ×ÅÒÁ ÷ë */
83 typedef enum _sparc_task_t
85 no_sparc_task
= 0 /* ÄÒÁÊ×ÅÒ ÷ë ÖÄÅÔ ÚÁÄÁÎÉÅ */
88 /* úÁÄÁÎÉÊ ÎÁ ÐÒÅÒÙ×ÁÎÉÅ ÄÒÁÊ×ÅÒÁ ÷ë */
89 typedef enum _intr_task_t
91 no_intr_task
= 0, /* ÄÒÁÊ×ÅÒ ÷ë ÖÄÅÔ ÚÁÄÁÎÉÅ */
92 mcap_get_intr_driver
= 12 /* ×ÙÄÁÞÁ ÐÒÅÒÙ×ÁÎÉÑ ÄÒÁÊ×ÅÒÕ ÷ë */
95 /* óÐÉÓÏË ÓÏÓÔÏÑÎÉÊ íð */
96 typedef enum mp_state_t_
98 undef_mp_state
, /* ÎÅÏÐÒÅÄÅÌÅÎÎÏÅ ÓÏÓÔÏÑÎÉÅ íð */
99 halted_mp_state
, /* íð ÎÁÈÏÄÉÔÓÑ × ÏÓÔÁÎÏ×ÌÅÎÎÏÍ ÓÏÓÔÏÑÎÉÉ */
100 started_mp_state
, /* íð ÂÙÌ ÚÁÐÕÝÅÎ É ÆÕÎËÃÉÏÎÉÒÕÅÔ */
101 hangup_mp_state
, /* ÚÁ×ÉÓÁÎÉÅ íð */
102 crash_mp_state
, /* Á×ÁÒÉÊÎÙÊ ÏÔËÁÚ íð */
103 fault_mp_state
, /* ×ÎÕÔÒÅÎÎÑÑ ÎÅÉÓÐÒÁ×ÎÏÓÔØ ÐÌÁÔÙ ÉÌÉ íð */
104 adapter_abend_mp_state
, /* Á×ÁÒÉÊÎÏÅ ÐÒÅËÒÁÝÅÎÉÅ ÒÁÂÏÔÙ ÁÄÁÐÔÅÒÁ */
105 locked_mp_state
, /* íð ÎÁÈÏÄÉÔÓÑ × ÂÌÏËÉÒÏ×ÁÎÎÏÍ ÓÏÓÔÏÑÎÉÉ */
106 restarted_mp_state
/* íð ÐÅÒÅÚÁÐÕÝÅÎ */
109 /* óÐÉÓÏË ÐÒÉÞÉÎ ÐÒÅÒÙ×ÁÎÉÊ */
110 typedef enum intr_rsn
112 undefined_intr_reason
= 0, /* ÎÅÏÐÒÅÄÅÌÅÎÎÁÑ ÐÒÉÞÉÎÁ */
113 reject_intr_reason
= 1, /* ÐÒÅÒÙ×ÁÎÉÑ ÎÅ ÖÄÕÔ */
114 board_error_intr_reason
= 2, /* ×ÎÕÔÒÅÎÎÑÑ ÏÛÉÂËÁ ÐÌÁÔÙ */
115 get_intr_driver_reason
= 12 /* ÐÏÌÕÞÅÎÏ ÐÒÅÒÙ×ÁÎÉÅ ÏÔ ÄÒ-ÒÁ íð */
118 /* òÅÚÕÌØÔÁÔÙ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
119 #ifdef MY_DRIVER_BIG_ENDIAN
120 typedef struct _mp_init_result_t
122 u_short mp_error_code
; /* ËÏÄ ÏÛÉÂËÉ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
126 typedef struct _mp_init_result_t
129 u_short mp_error_code
; /* ËÏÄ ÏÛÉÂËÉ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
131 #endif /* MY_DRIVER_BIG_ENDIAN */
133 /* éÎÉÃÉÁÌÉÚÁÃÉÉ ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
134 #ifdef MY_DRIVER_BIG_ENDIAN
135 typedef struct init_bufers_exchange_data
137 u_short num_buf_user
; /* ËÏÌÉÞÅÓÔ×Ï ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÐÏÌØÚÏ×ÁÔÅÌÑ */
138 u_short max_size_buf_trans
; /* ÍÁËÓÉÍÁÌØÎÙÊ ÒÁÚÍÅÒ ÐÅÒÅÄÁÀÝÅÇÏ */
139 /* ÂÕÆÅÒÁ ÏÂÍÅÎÁ ÐÏÌØÚÏ×ÁÔÅÌÑ (ÂÁÊÔ) */
140 u_int dma_trans_bufs
[MCAP_SUBDEV_BUF_NUM
]; /* ÕËÁÚÁÔÅÌÉ ÓÐÉÓËÁ ÐÏÌØÚÏ×ÁÔÅÌØËÉÈ */
141 /* ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
142 } init_bufers_exchange_data_t
;
144 typedef struct init_bufers_exchange_data
146 u_short max_size_buf_trans
; /* ÍÁËÓÉÍÁÌØÎÙÊ ÒÁÚÍÅÒ ÐÅÒÅÄÁÀÝÅÇÏ */
147 /* ÂÕÆÅÒÁ ÏÂÍÅÎÁ ÐÏÌØÚÏ×ÁÔÅÌÑ (ÂÁÊÔ) */
148 u_short num_buf_user
; /* ËÏÌÉÞÅÓÔ×Ï ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÐÏÌØÚÏ×ÁÔÅÌÑ */
149 u_int dma_trans_bufs
[MCAP_SUBDEV_BUF_NUM
]; /* ÕËÁÚÁÔÅÌÉ ÓÐÉÓËÁ ÐÏÌØÚÏ×ÁÔÅÌØËÉÈ */
150 /* ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
151 } init_bufers_exchange_data_t
;
152 #endif /* MY_DRIVER_BIG_ENDIAN */
154 /* òÅÚÕÌØÔÁÔÙ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
155 #ifdef MY_DRIVER_BIG_ENDIAN
156 typedef struct init_bufers_exchange_data_res
158 u_short error_init_bufers
; /* ËÏÄ ÏÛÉÂËÉ, ÏÂÎÁÒÕÖÅÎÎÏÊ ÄÒÁÊ×ÅÒÏÍ Mð */
159 u_short unused
; /* ÎÅÉÓÐÏÌØÚÕÅÍÏÅ ÐÏÌÅ */
160 } init_bufers_exchange_data_res_t
;
162 typedef struct init_bufers_exchange_data_res
164 u_short unused
; /* ÎÅÉÓÐÏÌØÚÕÅÍÏÅ ÐÏÌÅ */
165 u_short error_init_bufers
; /* ËÏÄ ÏÛÉÂËÉ, ÏÂÎÁÒÕÖÅÎÎÏÊ ÄÒÁÊ×ÅÒÏÍ Mð */
166 } init_bufers_exchange_data_res_t
;
167 #endif /* MY_DRIVER_BIG_ENDIAN */
169 /* ïÓÔÁÎÏ×ÉÔØ ËÁÎÁÌ ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ (mcap_halt_channel_data_exchange_task) */
170 #ifdef MY_DRIVER_BIG_ENDIAN
171 typedef struct halt_channel_data_exche
{
172 short halt_channel_exchange
; /* ÎÏÍÅÒ ÏÓÔÁÎÁ×ÌÉ×ÁÅÍÏÇÏ ËÁÎÁÌÁ ÁÄÁÐÔÅÒÁ */
173 short flag_restore
; /* ÐÒÉÚÎÁË ÏÐÅÒÁÃÉÉ ×ÏÓÓÔÁÎÏ×ÌÅÎÉÑ õóë áó0 É óëâ ÷õ */
174 } mcap_halt_channel_data_exchange_t
;
176 typedef struct halt_channel_data_exche
{
177 short flag_restore
; /* ÐÒÉÚÎÁË ÏÐÅÒÁÃÉÉ ×ÏÓÓÔÁÎÏ×ÌÅÎÉÑ õóë áó0 É óëâ ÷õ */
178 short halt_channel_exchange
; /* ÎÏÍÅÒ ÏÓÔÁÎÁ×ÌÉ×ÁÅÍÏÇÏ ËÁÎÁÌÁ ÁÄÁÐÔÅÒÁ */
179 } mcap_halt_channel_data_exchange_t
;
180 #endif /* MY_DRIVER_BIG_ENDIAN */
182 /* ïÔËÌÀÞÉÔØ ËÁÎÁÌÙ ÏÔ ÌÉÎÉÊ Ó×ÑÚÉ (mcap_turn_off_channels_task) */
183 #ifdef MY_DRIVER_BIG_ENDIAN
184 typedef struct turn_ch
{
185 short mode_functional_monitoring
; /* ÒÅÖÉÍ áæë */
187 } mcap_turn_off_channels_t
;
189 typedef struct turn_ch
{
191 short mode_functional_monitoring
; /* ÒÅÖÉÍ áæë */
192 } mcap_turn_off_channels_t
;
193 #endif/* MY_DRIVER_BIG_ENDIAN */
195 /* ÷ÙÄÁÞÁ ÐÒÅÒÙ×ÁÎÉÑ ÐÏÌØÚÏ×ÁÔÅÌÀ */
196 #ifdef MY_DRIVER_BIG_ENDIAN
197 typedef struct reveal_result
{
198 u_short channel_num
; /* ÎÏÍÅÒ ËÁÎÁÌÁ */
199 u_short event_intr
; /* ËÏÄ ÓÏÂÙÔÉÑ */
202 typedef struct reveal_result
{
203 u_short event_intr
; /* ËÏÄ ÓÏÂÙÔÉÑ */
204 u_short channel_num
; /* ÎÏÍÅÒ ËÁÎÁÌÁ */
206 #endif /* MY_DRIVER_BIG_ENDIAN */
208 /* ðÁÒÁÍÅÔÒÙ ÚÁÄÁÎÉÑ ÄÌÑ ÄÒÁÊ×ÅÒÁ Mð ÏÔ ÄÒÁÊ×ÅÒÁ ÷ë */
209 typedef union _mp_drv_args_t
211 init_bufers_exchange_data_t init_buf_exch
; /* ÉÎÉÃÉÁÌÉÚÁÃÉÑ ÂÕÆÅÒÏ× ÏÂÍÅÎÁ ÄÁÎÎÙÍÉ */
212 mcap_halt_channel_data_exchange_t halt_channel_data_exch
; /* ÏÓÔÁÎÏ× ËÁÎÁÌÁ ÏÂÍÅÎÁ */
213 mcap_turn_off_channels_t turn_ch
; /* ÏÔËÌÀÞÅÎÉÅ ËÁÎÁÌÏ× ÏÔ ÌÉÎÉÊ Ó×ÑÚÉ */
214 u_int args_area
[35]; /* ÍÁËÓÉÍÁÌØÎÁÑ ÏÂÌÁÓÔØ ÐÁÒÁÍÅÔÒÏ× ÚÁÄÁÎÉÑ ÄÌÑ ÄÒÁÊ×ÅÒÁ Mð */
217 /* ðÁÒÁÍÅÔÒÙ ÚÁÄÁÎÉÑ ÄÌÑ ÄÒÁÊ×ÅÒÁ ÷ë ÏÔ ÄÒÁÊ×ÅÒÁ Mð */
218 typedef union _sparc_drv_args_t
220 mp_init_result_t mp_init_results
; /* ÒÅÚÕÌØÔÁÔÙ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
221 init_bufers_exchange_data_res_t init_buf_exch_res
; /* ÒÅÚÕÌØÔÁÔÙ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÂÕÆÅÒÏ× */
223 u_int args_area
[15]; /* ÍÁËÓÉÍÁÌØÎÁÑ ÏÂÌÁÓÔØ ÐÁÒÁÍÅÔÒÏ× */
224 /* ÚÁÄÁÎÉÊ ÄÒÁÊ×ÅÒÁ ÷ë */
227 /* ðÁÒÁÍÅÔÒÙ ÐÒÅÒÙ×ÁÎÉÑ ÏÔ ÄÒÁÊ×ÅÒÁ Mð */
228 typedef union _intr_drv_args_t
230 reveal_result_t reveal_result
; /* ÒÅÚÕÌØÔÁÔ ÐÒÅÒÙ×ÁÎÉÑ ÏÔ ÁÄÁÐÔÅÒÁ */
231 u_int args_area
[1]; /* ÍÁËÓÉÍÁÌØÎÁÑ ÏÂÌÁÓÔØ ÐÁÒÁÍÅÔÒÏ× */
233 /* ó×ÑÚØ ÄÒÁÊ×ÅÒÏ× ÷ë É íð */
234 typedef struct drv_intercom_t_
236 mp_task_t mp_task
; /* ÔÅËÕÝÅÅ ÚÁÄÁÎÉÅ ÄÌÑ ÄÒÁÊ×ÅÒÁ Mð */
237 mp_drv_args_t mp_args
; /* ÐÁÒÁÍÅÔÒÙ ÚÁÄÁÎÉÊ ÄÌÑ ÄÒÁÊ×ÅÒÁ Mð */
238 sparc_task_t sparc_task
; /* ÔÅËÕÝÅÅ ÚÁÄÁÎÉÅ ÄÌÑ ÄÒÁÊ×ÅÒÁ ÷ë */
239 sparc_drv_args_t sparc_args
; /* ÐÁÒÁÍÅÔÒÙ ÚÁÄÁÎÉÑ ÄÌÑ ÄÒÁÊ×ÅÒÁ ÷ë */
240 u_int flag_mp
; /* ÐÒÉÚÎÁË ÒÁÂÏÔÙ íð */
241 intr_task_t intr_task
; /* ÐÒÅÒÙ×ÁÎÉÅ ÄÌÑ ÄÒÁÊ×ÅÒÁ ÷ë */
242 intr_drv_args_t intr_args
; /* ÐÁÒÁÍÅÔÒÙ ÐÒÅÒÙ×ÁÎÉÑ */
245 /* ïÐÒÅÄÅÌÅÎÉÑ É ÓÔÒÕËÔÕÒÉÒÙ, ÉÓÐÏÌØÚÕÅÍÙÅ ÄÒÁÊ×ÅÒÏÍ É ÐÒÉÌÏÖÅÎÉÑÍÉ ÐÏÌØÚÏ×ÁÔÅÌÑ. */
247 #if defined(_KERNEL) || defined(_KMEMUSER)
249 /* Dev_ops ÄÌÑ ÜÔÏÇÏ ÍÏÄÕÌÑ */
250 /*struct dev_ops mcap_dev_ops;*/
251 static struct file_operations mcap_fops
;
253 /* ïÂÏÂÝÅÎÎÙÅ ÓÔÒÕËÔÕÒÙ ÐÅÒÅÓÙÌÏË É ÒÅÚÕÌØÔÁÔÏ× */
255 typedef struct dma_struct
{
256 caddr_t prim_buf_addr
;
258 dma_addr_t busa
; /* Address in the SBus space,*/
259 /* áÄÒÅÓ ÏÂÌÁÓÔÉ dma ÓÏ ÓÔÏÒÏÎÙ ÕÓÔÒÏÊÓÔ×Á */
260 unsigned long mem
; /* Address in the processor space,*/
261 /* áÄÒÅÓ ÏÂÌÁÓÔÉ dma ÓÏ ÓÔÏÒÏÎÙ ÐÒÏÃÅÓÓÏÒÁ */
265 /* óÔÒÕËÔÕÒÁ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
266 typedef struct trbuf_desc
{
267 caddr_t buf_address
; /* ×ÉÒÔÕÁÌØÎÙÊ ÁÄÒÅÓ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
268 size_t buf_size
; /* ÂÁÊÔÏ×ÙÊ ÒÁÚÍÅÒ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
269 /* ddi_acc_handle_t acc_handle;*/ /* ÂÕÆÅÒ ÏÂÒÁÂÏÔËÉ ÄÏÓÔÕÐÁ */
270 /* ddi_dma_handle_t dma_handle;*/ /* ÂÕÆÅÒ ÏÂÒÁÂÏÔËÉ DMA */
271 /* ddi_dma_cookie_t cookie;*/ /* ÂÕÆÅÒ DMA ÍÁÒËÅÒÏ× */
272 /* uint_t ccount;*/ /* ÞÉÓÌÏ ÂÕÆÅÒÏ× DMA ÍÁÒËÅÒÏ× */
273 dma_struct_t dma
; /* âÕÆÅÒ, ÏÐÉÓÙ×ÁÀÝÉÊ DMA */
276 /* ïÐÉÓÁÎÉÅ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
277 typedef struct trans_buf_
{
278 struct trans_buf
*next_trans_buf
; /* ÕËÁÚÁÔÅÌØ ÓÌÅÄÕÀÝÅÇÏ ÂÕÆÅÒÁ × ÓÐÉÓËÅ */
279 trbuf_desc_t trans_buf_desc
; /* ÏÐÉÓÁÎÉÅ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
282 /* óÔÒÕËÔÕÒÁ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ.
283 âÕÆÅÒ ÓÏÄÅÒÖÉÔ ÂÕÆÅÒÁ ÐÏÌØÚÏ×ÁÔÅÌÅÊ */
284 typedef struct trbuf_state
{
285 char valid_flag
; /* ÄÏÐÕÓÔÉÍÙÊ ÂÕÆÅÒ ÐÅÒÅÓÙÌËÉ */
286 trbuf_desc_t trans_buf_desc
; /* ÄÅÓËÒÉÐÔÏÒ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
287 caddr_t user_buf_address
; /* ×ÉÒÔÕÁÌØÎÙÊ ÁÄÒÅÓ ÎÁÞÁÌØÎÏÇÏ ÂÕÆÅÒÁ ÐÏÌØÚÏ×ÁÔÅÌÑ */
288 size_t user_buf_size
; /* ÂÁÊÔÏ×ÙÊ ÒÁÚÍÅÒ ÂÕÆÅÒÁ ÐÏÌØÚÏ×ÁÔÅÌÑ */
289 int max_user_buf_num
; /* ÍÁËÓ. ÞÉÓÌÏ ÂÕÆÅÒÏ× ÐÏÌØÚÏ×ÁÔÅÌÑ × ÂÕÆÅÒÅ ÄÒÁÊ×ÅÒÁ */
291 caddr_t user_trans_bufs
[MCAP_SUBDEV_BUF_NUM
]; /* ÓÐÉÓÏË ÕËÁÚÁÔÅÌÅÊ ÂÕÆÅÒÏ× ÐÅÒÅÓÙÌËÉ ÐÏÌØÚÏ×ÁÔÅÌÑ */
292 u_int dma_trans_bufs
[MCAP_SUBDEV_BUF_NUM
]; /* ÓÐÉÓÏË dma ÕËÁÚÁÔÅÌÅÊ ÂÕÆÅÒÏ× ÐÅÒÅÓÙÌËÉ
296 /* ÷ÎÕÔÒÅÎÎÅÅ ÓÏÓÔÏÑÎÉÅ ËÁÎÁÌÁ */
297 typedef struct mcap_chnl_state
{
298 trbuf_state_t trans_buf_state
; /* ÓÏÓÔÏÑÎÉÅ ÂÕÆÅÒÁ ÐÅÒÅÓÙÌËÉ */
299 char trans_state_is_init
; /* ÕÓÔÁÎÏ×ËÁ ÓÏÓÔÏÑÎÉÑ ÐÅÒÅÓÙÌËÉ */
300 char state_init_in_progress
; /* ×ÙÐÏÌÎÑÅÔÓÑ ÉÎÉÃÉÁÌÉÚÁÃÉÑ */
301 char trans_state_is_halt
; /* ÓÏÓÔÏÑÎÉÅ ÐÅÒÅÓÙÌËÉ - ÏÓÔÁÎÏ× */
302 char mp_trans_state_is_halt
; /* ÓÏÓÔÏÑÎÉÅ ÄÒÁÊ×ÅÒÁ - ÏÓÔÁÎÏ× */
303 char all_trans_finish
; /* ×ÓÅ ÐÅÒÅÓÙÌËÉ ÚÁ×ÅÒÛÅÎÙ */
304 char init_as_trans_map
; /* ËÁÎÁÌ ÉÎÉÃÉÁÌÉÚÉÒÏ×ÁÎ × ÒÅÖÉÍÅ ËÁÒÔÙ ÏÂÍÅÎÁ*/
305 int trans_halt_error
; /* ËÏÄ ÏÛÉÂËÉ ÏÓÔÁÎÏ×Á, ÅÓÌÉ ÏÓÔÁÎÏ× ÎÅ ÂÙÌ ÐÒÏÉÚ×ÅÄÅÎ */
306 mcap_init_iomap_t init_iomap_state_spec
; /* ÓÏÓÔÏÑÎÉÅ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ËÁÒÔÙ */
307 size_t full_data_buf_size
; /* ÐÏÌÎÙÊ ÒÁÚÍÅÒ ÂÕÆÅÒÁ ÄÁÎÎÙÈ */
308 size_t subdev_buf_trans_size
; /* ÒÁÚÍÅÒ ÐÅÒÅÄÁÀÝÅÇÏ ÂÕÆÅÒÁ, ×ËÌÀÞÁÑ ÚÁÇÏÌÏ×ÏË */
309 size_t subdev_buf_reciv_size
; /* ÒÁÚÍÅÒ ÐÒÉÅÍÎÏÇÏ ÂÕÆÅÒÁ, ×ËÌÀÞÁÑ ÚÁÇÏÌÏ×ÏË */
310 int dma_intr_handled
; /* ÐÒÅÒÙ×ÁÎÉÅ ÏÂÒÁÂÏÔÁÎÏ ×ÅÒÎÏ */
311 u_short trans_num
; /* ÎÏÍÅÒ ÐÁËÅÔÎÏÊ ÐÅÒÅÓÙÌËÉ */
314 /* ÷ÎÕÔÒÅÎÎÅÅ ÓÏÓÔÏÑÎÉÅ ÄÒÁÊ×ÅÒÁ */
315 #ifdef MCAP_OLD_VERSION
316 typedef struct mcap_state
{
317 dev_info_t
*dip
; /* dip. */
318 int inst
; /* ÎÏÍÅÒ ÜËÚÅÍÐÌÑÒÁ */
319 int opened
; /* ÏÔËÒÙÔÏÅ ÓÏÓÔÏÑÎÉÅ */
320 int open_flags
; /* ÏÔËÒÙÔÏÅ ÓÏÓÔÏÑÎÉÅ Ó ÆÌÁÖËÏÍ */
321 u_int open_channel_map
; /* ÍÁÓËÁ ÏÔËÒÙÔÙÈ ËÁÎÁÌÏ× */
322 /*********************************************************************************************************/
324 kcondvar_t channel_cv
; /* ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÊ (ÒÅÖÉÍÁ, ÓÏÓÔÏÑÎÉÊ) ËÁÎÁÌÁ */
325 kcondvar_t drv_comm_cv
; /* ÏÂÌÁÓÔØ Ó×ÑÚÉ ÄÒÁÊ×ÅÒÁ: ÚÁÎÑÔÁÑ ÉÌÉ
326 Ó×ÏÂÏÄÎÁÑ, ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÑ */
327 kcondvar_t trans_state_cv
; /* ÓÏÓÔÏÑÎÉÅ ËÁÎÁÌÁ ÐÅÒÅÓÙÌËÉ,
328 ÉÚÍÅÎÅÎÉÅ ÐÅÒÅÍÅÎÎÏÊ ÕÓÌÏ×ÉÑ */
329 kcondvar_t intr_cv
; /* ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÊ ÄÌÑ ÐÒÅÒÙ×ÁÎÉÑ */
330 /*********************************************************************************************************/
332 /* ddi_iblock_cookie_t iblock_cookie;*/ /* ÄÌÑ mutexes. */
333 /* struct pollhead pollhead;*/ /* ÇÌÕÈÁÑ ÓÔÒÕËÔÕÒÁ ÄÌÑ ÏÐÒÏÓÁ */
334 int drv_comm_busy
; /* ÐÒÉÚÎÁË ÚÁÎÑÔÏÓÔÉ ÏÂÌÁÓÔÉ
336 int drv_general_modes
; /* ÏÂÝÉÅ ÐÒÉÚÎÁËÉ ÒÅÖÉÍÏ× ÄÒÁÊ×ÅÒÁ */
337 e90_unit_t type_unit
; /* ÔÉÐ ÐÌÁÔÙ */
338 char intr_seted
; /* ÐÒÅÒÙ×ÁÎÉÅ ÕÓÔÁÎÏ×ÌÅÎÏ */
339 char intr_number
; /* ÞÉÓÌÏ ÐÒÅÒÙ×ÁÎÉÊ */
340 int system_burst
; /* DMA ÒÁÚÍÅÒÙ ÐÁÞËÉ, ÐÏÚ×ÏÌÅÎÎÙÅ SBUS */
341 char mp_drv_loaded
; /* MP ÄÒÁÊ×ÅÒ ÚÁÇÒÕÖÅÎ */
342 char mp_debug_drv_flag
; /* debug driver startuped flag */
343 char mp_rom_drv_enable
; /* MP ROM ÄÒÁÊ×ÅÒ Ñ×ÌÑÅÔÓÑ
344 ÒÁÚÒÅÛÁÀÝÉÍ ÐÒÉÚÎÁËÏÍ */
345 mp_state_t mp_state
; /* ÔÅËÕÝÅÅ ÓÏÓÔÏÑÎÉÅ Mð */
346 char mp_drv_started
; /* MP ÄÒÁÊ×ÅÒ ÚÁÐÕÝÅÎ */
347 char set_tlrm
; /* ???? ÂÌÏËÉÒÏ×ËÁ ÕÓÔÁÎÏ×ËÉ ÓÂÒÏÓÁ
349 bmem_trans_desk_t mp_init_code
; /* ÄÅÓËÒÉÐÔÏÒ ÚÁÐÕÓËÁ ËÏÄÁ Mð */
351 char /* ÚÁÐÕÓË ËÏÄÁ Mð */
352 mp_init_area_copy
[ME90_MP_INIT_AREA_BMEM_SIZE
];
353 mp_drv_args_t
/* ÉÎÆÏÒÍÁÃÉÑ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
355 volatile caddr_t MCAP_BMEM
; /* ÂÁÚÏ×ÙÊ ÁÄÒÅÓ âïúõ */
356 mcap_chnl_state_t
/* ÓÏÓÔÏÑÎÉÅ ËÁÎÁÌÁ ÐÌÁÔÙ */
358 /* ddi_acc_handle_t acc_regs;*/ /* ÕËÁÚÁÔÅÌØ ÎÁ ÄÅÓËÒÉÐÔÏÒ */
359 /* ÄÏÓÔÕÐÁ Ë ÒÅÇÉÓÔÒÁÍ */
360 caddr_t regs_base
; /* ÂÁÚÏ×ÙÊ ÁÄÒÅÓ ÒÅÇÉÓÔÒÏ× */
361 off_t reg_array_size
; /* ÒÁÚÍÅÒ ×ÙÄÅÌÅÎÎÏÊ ÏÂÌÁÓÔÉ */
363 u_short io_flags_intr
; /* ÐÒÉÚÎÁË ÎÁÌÉÞÉÑ ÐÒÅÒÙ×ÁÎÉÑ */
364 u_short event_intr_trans_ch
[MCAP_SUBDEV_BUF_NUM
];
365 /* ËÏÄ ÓÏÂÙÔÉÑ ÐÅÒÅÄÁÀÝÉÈ ËÁÎÁÌÏ× */
366 u_short event_intr_reciv_ch
[MCAP_SUBDEV_BUF_NUM
];
367 /* ËÏÄ ÓÏÂÙÔÉÑ ÐÒÉÅÍÎÙÈ ËÁÎÁÌÏ× */
368 hrtime_t time_get_intr_dev
; /* ô ÐÏÌÕÞÅÎÉÑ ÐÒÅÒÙ×ÁÎÉÑ ÏÔ ÁÄÁÐÔÅÒÁ */
372 typedef struct mcap_state
{
373 dev_info_t
*dip
; /* dip. */
374 int inst
; /* ÎÏÍÅÒ ÜËÚÅÍÐÌÑÒÁ */
375 int opened
; /* ÏÔËÒÙÔÏÅ ÓÏÓÔÏÑÎÉÅ */
376 int open_flags
; /* ÏÔËÒÙÔÏÅ ÓÏÓÔÏÑÎÉÅ Ó ÆÌÁÖËÏÍ */
377 u_int open_channel_map
; /* ÍÁÓËÁ ÏÔËÒÙÔÙÈ ËÁÎÁÌÏ× */
378 /*********************************************************************************************************/
380 kcondvar_t channel_cv
; /* ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÊ (ÒÅÖÉÍÁ, ÓÏÓÔÏÑÎÉÊ) ËÁÎÁÌÁ */
381 kcondvar_t drv_comm_cv
; /* ÏÂÌÁÓÔØ Ó×ÑÚÉ ÄÒÁÊ×ÅÒÁ: ÚÁÎÑÔÁÑ ÉÌÉ
382 Ó×ÏÂÏÄÎÁÑ, ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÑ */
383 kcondvar_t trans_state_cv
; /* ÓÏÓÔÏÑÎÉÅ ËÁÎÁÌÁ ÐÅÒÅÓÙÌËÉ,
384 ÉÚÍÅÎÅÎÉÅ ÐÅÒÅÍÅÎÎÏÊ ÕÓÌÏ×ÉÑ */
385 kcondvar_t intr_cv
; /* ÐÅÒÅÍÅÎÎÁÑ ÕÓÌÏ×ÉÊ ÄÌÑ ÐÒÅÒÙ×ÁÎÉÑ */
386 /*********************************************************************************************************/
388 /* ddi_iblock_cookie_t iblock_cookie;*/ /* ÄÌÑ mutexes. */
389 /* struct pollhead pollhead;*/ /* ÇÌÕÈÁÑ ÓÔÒÕËÔÕÒÁ ÄÌÑ ÏÐÒÏÓÁ */
390 int drv_comm_busy
; /* ÐÒÉÚÎÁË ÚÁÎÑÔÏÓÔÉ ÏÂÌÁÓÔÉ
392 e90_unit_t type_unit
; /* ÔÉÐ ÐÌÁÔÙ */
393 char intr_seted
; /* ÐÒÅÒÙ×ÁÎÉÅ ÕÓÔÁÎÏ×ÌÅÎÏ */
394 char intr_number
; /* ÞÉÓÌÏ ÐÒÅÒÙ×ÁÎÉÊ */
395 int system_burst
; /* DMA ÒÁÚÍÅÒÙ ÐÁÞËÉ, ÐÏÚ×ÏÌÅÎÎÙÅ SBUS */
396 char mp_drv_loaded
; /* MP ÄÒÁÊ×ÅÒ ÚÁÇÒÕÖÅÎ */
397 char mp_debug_drv_flag
; /* debug driver startuped flag */
398 char mp_rom_drv_enable
; /* MP ROM ÄÒÁÊ×ÅÒ Ñ×ÌÑÅÔÓÑ
399 ÒÁÚÒÅÛÁÀÝÉÍ ÐÒÉÚÎÁËÏÍ */
400 mp_state_t mp_state
; /* ÔÅËÕÝÅÅ ÓÏÓÔÏÑÎÉÅ Mð */
401 char mp_drv_started
; /* MP ÄÒÁÊ×ÅÒ ÚÁÐÕÝÅÎ */
402 mcap_bmem_trans_desk_t mp_init_code
; /* ÄÅÓËÒÉÐÔÏÒ ÚÁÐÕÓËÁ ËÏÄÁ Mð */
405 char mp_init_area_copy
[ME90_MP_INIT_AREA_BMEM_SIZE
];
406 mp_drv_args_t mp_drv_init_info
; /* ÉÎÆÏÒÍÁÃÉÑ ÉÎÉÃÉÁÌÉÚÁÃÉÉ ÄÒÁÊ×ÅÒÁ Mð */
407 volatile caddr_t MCAP_BMEM
; /* ÂÁÚÏ×ÙÊ ÁÄÒÅÓ âïúõ */
408 mcap_chnl_state_t
/* ÓÏÓÔÏÑÎÉÅ ËÁÎÁÌÁ ÐÌÁÔÙ */
410 /* ddi_acc_handle_t acc_regs;*/ /* ÕËÁÚÁÔÅÌØ ÎÁ ÄÅÓËÒÉÐÔÏÒ */
411 /* ÄÏÓÔÕÐÁ Ë ÒÅÇÉÓÔÒÁÍ */
412 caddr_t regs_base
; /* ÂÁÚÏ×ÙÊ ÁÄÒÅÓ ÒÅÇÉÓÔÒÏ× */
413 off_t reg_array_size
; /* ÒÁÚÍÅÒ ×ÙÄÅÌÅÎÎÏÊ ÏÂÌÁÓÔÉ */
415 u_short io_flags_intr
; /* ÐÒÉÚÎÁË ÎÁÌÉÞÉÑ ÐÒÅÒÙ×ÁÎÉÑ */
416 u_short event_intr_trans_ch
[MCAP_SUBDEV_BUF_NUM
];
417 /* ËÏÄ ÓÏÂÙÔÉÑ ÐÅÒÅÄÁÀÝÉÈ ËÁÎÁÌÏ× */
418 u_short event_intr_reciv_ch
[MCAP_SUBDEV_BUF_NUM
];
419 /* ËÏÄ ÓÏÂÙÔÉÑ ÐÒÉÅÍÎÙÈ ËÁÎÁÌÏ× */
420 hrtime_t time_get_intr_dev
; /* ô ÐÏÌÕÞÅÎÉÑ ÐÒÅÒÙ×ÁÎÉÑ ÏÔ ÁÄÁÐÔÅÒÁ */
421 u_short number_intr_rosh
; /* ËÏÌ-×Ï ÐÒÅÒÙ×ÁÎÉÊ ÐÏ òïû */
423 #endif /* MCAP_OLD_VERSION */
425 /* íÁËÒÏËÏÍÁÎÄÙ ÄÌÑ ÏÂÒÁÝÅÎÉÑ Ë ÒÅÇÉÓÔÒÁÍ */
426 /* ÷ÉÒÔÕÁÌØÎÙÊ ÁÄÒÅÓ ÒÅÇÉÓÔÒÁ */
427 #define MCAP_REGISTER_ADDR(state, reg) ((ulong_t *)(state->regs_base + reg))
428 /* þÔÅÎÉÑ ÓÏÄÅÒÖÉÍÏÇÏ ÒÅÇÉÓÔÒÁ */
429 #define READ_MCAP_REGISTER(state, reg) ddi_getl(state->dip->dev_type/*acc_regs*/, MCAP_REGISTER_ADDR(state, reg))
430 /* úÁÐÉÓØ × ÒÅÇÉÓÔÒ */
431 #define WRITE_MCAP_REGISTER(state, reg, v) ddi_putl(state->dip->dev_type/*acc_regs*/, MCAP_REGISTER_ADDR(state, reg), v)
434 mcap_ioctl(struct inode
*inode
, struct file
*file
,
435 unsigned int cmd
, unsigned long arg
);
437 static int mcap_open(struct inode
*inode
, struct file
*file
);
439 static int mcap_mmap(struct file
*file
, struct vm_area_struct
*vma
);
441 static int mcap_close(struct inode
*inode
, struct file
*file
);
443 static int mcap_attach(dev_info_t
*dip
);
445 int mcap_detach(dev_info_t
*dip
);
447 irqreturn_t
mcap_intr_handler(int irq
, void *arg
, struct pt_regs
*regs
);
449 static int __init
mcap_init(void);
451 static void __exit
mcap_exit(void);
453 int mcap_attach_add(mcap_state_t
*state
, int *add_attach_flags
);
455 void mcap_detach_add(mcap_state_t
*state
, int add_attach_flags
, int uncondit_detach
);
457 void Unmap_reg_sets(mcap_state_t
*state
);
459 int rmv_dev(dev_info_t
*dip
, int channel
);
461 int mcap_get_channel_to_init(
464 int drv_comm_area_locked
,
468 void mcap_free_channel_to_init(mcap_state_t
*state
, int mutex_locked
);
470 int mcap_init_trans_map_state(
472 mcap_init_iomap_t
*init_state_args
,
473 int drv_comm_area_locked
,
477 int mcap_create_drv_iomap_buf(mcap_state_t
*state
);
479 void mcap_delete_drv_trans_buf(mcap_state_t
*state
);
481 void mcap_init_trans_buf_desc(
482 trbuf_desc_t
*trans_buf_desc
);
484 int mcap_halt_trans_state(
485 mcap_state_t
* state
,
486 mcap_halt_trans_t
*halt_trans_state
,
487 int drv_comm_area_locked
,
491 int mcap_wait_for_trans_state_halt(
495 int mcap_halt_transfers(
498 #ifdef MCAP_OLD_VERSION
499 int delete_rem_trans
,
501 #endif /* MCAP_OLD_VERSION */
502 int drv_comm_area_locked
);
504 void mcap_init_subdev_buf(
506 mcap_iosubdbuf_t
*subdev_buf
,
508 size_t max_data_buf_size
,
511 void mcap_init_iomap_buf(
512 mcap_state_t
*state
, /* ÓÏÂÓÔ×ÅÎÎÁÑ ÉÎÆÏÒÍÁÃÉÑ ÄÒÁÊ×ÅÒÁ */
513 mcap_iosubdbuf_t
*iomap_buf_desc
, /* ÄÅÓËÒÉÐÔÏÒ ÂÕÆÅÒÁ ÏÂÍÅÎÁ */
514 size_t subdev_buf_trans_size
, /* ÍÁËÓÉÍÁÌØÎÙÊ ÒÁÚÍÅÒ */
515 /* ÂÕÆÅÒÁ ÐÅÒÅÄÁÞÉ */
516 size_t subdev_buf_reciv_size
, /* ÍÁËÓÉÍÁÌØÎÙÊ ÒÁÚÍÅÒ */
520 int mcap_start_task_drv_mp(
523 mp_drv_args_t
*task_args
,
524 sparc_drv_args_t
*mp_task_results
527 int mcap_wait_make_task_drv_mp(
530 int wait_mp_task_accept
,
531 int wait_mp_rom_drv_disable
);
533 int mcap_reset_general_regs(
537 void mcap_read_general_regs(
541 int mcap_calculate_work_hr_time(
542 hrtime_t start_time
, /* event start time */
543 hrtime_t end_time
/* event finish time */
546 int mcap_bmem_data_transfer(
548 #ifdef MCAP_OLD_VERSION
549 bmem_trans_desk_t
*transfer_desk
,
551 mcap_bmem_trans_desk_t
*transfer_desk
,
552 #endif /* MCAP_OLD_VERSION */
556 caddr_t
*kmem_area_p
);
558 int mcap_alloc_trans_bufs(
560 trbuf_desc_t
*new_trans_buf
,
563 void mcap_free_trans_bufs(
565 trbuf_desc_t
*trans_buf_desc
);
567 int mcap_write_base_memory(
569 caddr_t address_from
,
574 u_int
mcap_rotate_word_bytes(u_int source_word
);
576 int mcap_map_registers(
578 e90_unit_t type_unit
);
584 int mcap_reset_module(
589 void mcap_clean_base_memory(mcap_state_t
*state
);
591 void mcap_clean_drv_communication(mcap_state_t
*state
);
593 int mcap_ioctl(struct inode
*inode
, struct file
*file
,
594 unsigned int cmd
, unsigned long arg
);
596 void mcap_init_drv_state(mcap_state_t
*state
);
598 void mcap_init_trans_buf_state(
599 trbuf_state_t
*trans_buf_state
);
602 #define MCAP_DRV_COMM_FREE_TIMEOUT_DEF_VALUE (1000000)
603 #define MCAP_TASK_ACCEPT_BY_MP_TIME (100000) /* usec */
604 /*#define MCAP_TASK_ACCEPT_BY_MP_TRYON (1000) ÉÓËÌÀޣΠ*/
605 #define MCAP_TASK_ACCEPT_BY_MP_DELAY_TIME (1000) /* usec */
607 /* ìÏËÁÌØÎÙÅ ÏÐÒÅÄÅÌÅÎÉÑ */
609 #define MCAP_DEVN(d) (getminor(d)) /* dev_t -> minor (dev_num) */
610 #define MCAP_inst(m) (m >> 4) /* minor -> instance */
611 #define MCAP_chan(m) (m & 0xf) /* minor -> channel */
612 #define MCAP_MINOR(i,c) ((i << 4) | (c)) /* instance+channel -> minor */
613 #define MCAP_INST(d) MCAP_inst(MCAP_DEVN(d)) /* dev_t -> instance */
614 #define MCAP_CHAN(d) MCAP_chan(MCAP_DEVN(d))
615 #define CHNL_NUM_TO_MASK(chnl) (1 << chnl)
617 /* òÁÚÒÑÄÎÙÅ ÐÏÌÑ ÄÌÑ attach_flags: */
619 #define SOFT_STATE_ALLOCATED 0x0001
620 #define INTERRUPT_ADDED 0x0002
621 #define MUTEX_ADDED 0x0004
622 #define CHANNEL_CV_ADDED 0x0008
623 #define REGS_MAPPED 0x0010
624 #define MINOR_NODE_CREATED 0x0020
625 #define IOPB_ALLOCED 0x0040
626 #define ERRORS_SIGN 0x0080
627 #define IBLOCK_COOKIE_ADDED 0x0200
628 #define INTR_IBLOCK_COOKIE_ADDED 0x0400
629 #define INTR_MUTEX_ADDED 0x0800
630 #define TRANS_HALTED_CV_ADDED 0x1000
631 #define CNCT_POLLING_CV_ADDED 0x2000
632 #define TRANS_STATE_CV_ADDED 0x4000
634 /* éÍÅÎÁ ÒÅË×ÉÚÉÔÏ× ÕÓÔÒÏÊÓÔ×Á */
636 #define SBUS_INTR_L_NAME_OF_PROP "interrupts"
638 #endif /* defined(_KERNEL) || defined(_KMEMUSER) */
644 #endif /* __MCAP_H__ */