drivers/mcst/mpv/mpv.h

   1
   2 /* òÅÄÁËÃÉÑ ÆÁÊÌÁ mpv.h:
   3                           CAM - 09.12.08; home - 08.11.08.
   4 */
   5
   6 #ifndef _MPV_H_
   7 #define _MPV_H_
   8
   9 #include <linux/mcst/mpv_io.h>
  10
  11 #define MPV_NAME                "mpv"
  12 #define MPV_CARD_DEVID          0x4360
  13 #define MPV_KPI2_DEVID          0x8014
  14 #define MPV4_DEVID              0x8023
  15 #define MPV_KPI2                1
  16 #define MPV_4                   2
  17
  18 #define MAX_MPV_INSTANCES       16
  19 #define MPV_IO_IN               1
  20 #define MPV_IO_OUT              2
  21 #define MPV_IO_OS               3
  22
  23 #define MPV_MINOR(i, io, n)     ((i) << 7 | (io) << 5 | (n))
  24 #define MPV_BUS(d)                      (MINOR(d) & 0x1f)
  25 #define MPV_INST(d)                     (MINOR(d) >> 7)
  26 #define MPV_INOUT(d)                    ((MINOR(d) >> 5) & 3)
  27 #define MPV_IN(d)                       (MPV_INOUT(d) == MPV_IO_IN)
  28 #define MPV_OUT(d)                      (MPV_INOUT(d) == MPV_IO_OUT)
  29 #define MPV_OS(d)                       (MPV_INOUT(d) == MPV_IO_OS)
  30
  31 /* max mpv known non_iohub2 mpv version number */
  32 #define  MAX_MPV_VER    100
  33 /* rev. MPV in driver for iohub2 POVOZKA-2 */
  34 #define  IOHUB2         (MAX_MPV_VER + 1)
  35 /* max mpv known non_iohub2 mpv version number */
  36 #define  MAX_IOH2_VER   100
  37 #define  GPIO_MPV_SW    0x40    /* Enable MPV but not GPIO in POVOZKA-2 */
  38 #define  IOHUB2_IRQ1    0x6     /* irq for line 0 in POVOZKA-2 */
  39 #define  IOHUB2_IRQ2    0x9     /* irq for lines 1,2 in POVOZKA-2 */
  40
  41 #define MPV_REG_SIZE    0x80
  42 #define MPV_RPV                 0x00
  43 #define MPV_REG_MASK            0x04
  44 #define MPV_REG_POLARITY        0x08
  45 #define MPV_REG_OUT_STAT        0x0C
  46 #define MPV_REG_INTR_NULL       0x10
  47 #define MPV_REG_BASE_CNT        0x18
  48 #define MPV_REG_OUT_INTR        0x1C
  49 #define MPV_REG_CHECK           0x14    /* for mpv card rev. 1,2 */
  50 #define MPV_RPPV                0x20
  51 #define MPV_RESET_V2            0x20
  52 #define MPV_RESET_IOHUB2        0x10
  53 #define MPV_NOISE_GUARD_TIME    0x24    /* for MPVm rev.2 */
  54 #define MPV_NOISE_GUARD_MPV4    0x3fc   /* for MPV4 */
  55 #define MPV_REG_NULL_INTR       0x60
  56 #define MPV_REG_CONFIG_INTR     0x64
  57 #define MPV_SBUS_VER            0xd8    /* sbus-mpv version (sbus-mpv ver.5 ~ */
  58                                         /*              revID 2 of pci-mpv)*/
  59 #define MPV_RAW_IN              0x6c    /* for MPVm rev.2 only */
  60 #define MASK_RAW_IN             0x300000
  61 #define RAW_AFTER_2             0x0
  62 #define RAW_AFTER_1             0x1
  63 #define RAW_AFTER_0             0x2
  64
  65 /* Noise mode register */
  66 #define MPV_NOISE_MODE          0x78
  67 #define USE_AFTER_2             0x0
  68 #define USE_AFTER_1             0x1
  69 #define USE_AFTER_0             0x2
  70
  71 #define MPV_IN_MASK     0xfffff
  72 #define MPV_CPU_INTR 0x3 /* cpu interrupt number for sbus-mpv by default */
  73
  74 /*  reg. number  0     1     2     3     4     5     6     7     8     9 */
  75 unsigned char corr_cnt_reg_v2[10] = {   /* correct counter */
  76                 0x18, 0x28, 0x38, 0x48, 0x58, 0x88, 0x98, 0xa8, 0xb8, 0xc8};
  77 unsigned char corr_cnt_reg_v0[4] = {    /* correct counter */
  78                 0x18, 0x38, 0x58, 0x78};
  79 unsigned char gen_period_reg_v2[10] = {
  80                 0x7c, 0x2c, 0x3c, 0x4c, 0x5c, 0x8c, 0x9c, 0xac, 0xbc, 0xcc};
  81 unsigned char intpts_cnt_reg_v2[10] = {
  82                 0x80, 0x30, 0x40, 0x50, 0x70, 0x90, 0xa0, 0xb0, 0xc0, 0xd0};
  83 unsigned char prev_time_reg_v2[10]  = {
  84                 0x84, 0x34, 0x44, 0x54, 0x74, 0x94, 0xa4, 0xb4, 0xc4, 0xd4};
  85 unsigned char corr_cnt_reg_new[4]   = {0x1c, 0x30, 0x44, 0x58};
  86 unsigned char gen_period_reg_new[4] = {0x20, 0x34, 0x48, 0x5c};
  87 unsigned char intpts_cnt_reg_new[4] = {0x24, 0x38, 0x4c, 0x60};
  88 unsigned char prev_time_reg_new[4]  = {0x28, 0x3c, 0x50, 0x64};
  89 /* basic counter copy*/
  90 unsigned char mpv_time_reg_new[4]   = {0x2c, 0x40, 0x54, 0x68};
  91 /*  mpv or mpv_ioh2 version                           0   1   2   3 */
  92 /* number of corr. time  regs */
  93 unsigned char num_time_regs_v2[MAX_MPV_VER + 1]    = {4, 5, 10, 10};
  94 unsigned char num_time_regs_ioh2[MAX_IOH2_VER + 1] = {3};
  95 /* number of inputs */
  96 unsigned char num_inputs_v2[MAX_MPV_VER + 1]       = {20, 20, 20, 20};
  97 unsigned char num_inputs_ioh2[MAX_IOH2_VER + 1]    = {3};
  98 /* enable generetor mask */
  99 unsigned char gen_mode_reg_v2[MAX_MPV_VER + 1]     = {0xff, 0xff, 0x68, 0x68};
 100 unsigned char gen_mode_reg_ioh2[MAX_IOH2_VER + 1]  = {0x14};
 101
 102 typedef struct __raw_wqueue {
 103         struct task_struct *task;
 104         struct list_head task_list;
 105 } raw_wqueue_t;
 106
 107 typedef struct mpv_intrk
 108 {
 109         /* limit time wating for interrupt (mcs) */
 110         int             intr_timeout;
 111         /* number of got interrupts by driver */
 112         int             num_reciv_intr;
 113         /* time from sinal appear to driver enter (ns) */
 114         int             correct_counter_nsec;
 115         /* ns timeofday when interrupt was appear in controler */
 116         long long       intr_appear_nsec;
 117         /* The time when driver have sent interrupt (ns) */
 118         long long       time_get_comm;
 119         /* time_of_day when interrupt was sent (mcs) */
 120         long long       time_generation_intr;
 121         /* clock source value when interrupt was got by driver */
 122         long long       intr_appear_clk;
 123         /* previous correct counter register value */
 124         int             prev_time_clk;
 125         /* common number of interrupts register value */
 126         int             intpts_cnt;
 127         /* monotonic time when interrupt was appear in controler */
 128         struct timespec intr_appear_raw;
 129         /* real time when interrupt was appear in controler */
 130         struct timespec intr_appear_real;
 131         /* interval of interrupts genarated by MPV */
 132         long long       interv_gen_ns;
 133         /* don't leave cpu < wait_on_cpu mcs*/
 134         int             wait_on_cpu;
 135         /* if it is set some timer intrrupts are perfomed by mpv */
 136         long long       period_ns;
 137         /* timeout for read(), ioctl(MPVIO_WAIT_INTR) for return ETIME */
 138         long long       timeout_ns;
 139         /* driver enter minus OS enter time */
 140         long long       irq_enter_clks;
 141         /* interrupt appear time as basic mpv counter */
 142         unsigned int    mpv_time;
 143         int             read_cc_ns;
 144         struct list_head        wait1_task_list;
 145 } mpv_intrk_t;
 146
 147 typedef struct mpv_state_struct {
 148         raw_spinlock_t          mpv_lock;
 149         /* registers numbers for current mpv version */
 150         unsigned char           num_in_bus;
 151         unsigned char           num_time_regs;
 152         unsigned char           gen_mode_reg;
 153         unsigned char           mpv_time_reg[10];
 154         unsigned char           corr_cnt_reg[10];
 155         unsigned char           gen_period_reg[10];
 156         unsigned char           intpts_cnt_reg[10];
 157         unsigned char           prev_time_reg[10];
 158
 159         int                     oncpu_irq;      /* irq to be on cpu */
 160         int                     psecs_per_corr_clck;
 161         int                     intr_assemble;
 162         mpv_intrk_t             kdata_intr[MPV_NUM_IN_INTR];
 163         struct list_head        any_in_task_list;
 164         struct pci_dev          *pdev;
 165         struct of_device        *op;
 166         int                     major;
 167         /* mpv_new=1 mpv KPI-2 (ioh2) or mpv_new=2 for MPV4m */
 168         u8                      mpv_new;
 169         u8                      revision_id;
 170         int                     inst;
 171         int                     open_in;
 172         int                     open_in_count[MPV_NUM_IN_INTR];
 173         int                     stv_in_number;/* mpv-in which adjusts time */
 174         int                     stv_intr_got; /* STV interrupt is got*/
 175         int                     non_oncpu_irq; /* irq to be in handler*/
 176         int                     open_out;
 177         int                     open_st;
 178         int                     open_in_excl;
 179         int                     open_out_excl;
 180         int                     open_st_excl;
 181         void                    *regs_base;
 182         int                     acc_regs;
 183         int                     base_polar;
 184         int                     polar;
 185         wait_queue_head_t       pollhead;
 186         int                     conf_inter;
 187         int                     current_st;
 188         int                     current_out;
 189         off_t                   mpv_regs_sz;
 190         /* The time when interrupt was sent by MPV */
 191         long long               time_gener_intr;
 192         int                     dev_type;       /* sbus, pci */
 193         int                     irq;
 194         int                     irq_orig;
 195         /* listen alive and mask input on interrupt */
 196         int                     listen_alive;
 197 } mpv_state_t;
 198
 199 #endif  /* _MPV_H_ */