drivers/mcst/rdma/rdma.h

   1 #define PCI_VENDOR_ID_MCST_RDMA 0x8086
   2 #define PCI_DEVICE_ID_MCST_RDMA 0x7191
   3
   4 /* Indexes of pci_dev.resource[] */
   5 #define PCI_MMIO_BAR            0
   6 #define PCI_MEM_BAR             1
   7
   8 #define RDMA_PFX                "rdma: "
   9 #define RDMA_PFX_READ           "rdma: read_buf: "
  10 #define RDMA_PFX_WRITE          "rdma: write_buf: "
  11 #define RDMA_PFX_SEND_MSG       "rdma: send_msg: "
  12 #define RDMA_PFX_IOCTL          "rdma_ioctl: "
  13 #define RDMA_PFX_IOCTL          "rdma_ioctl: "
  14
  15 //#define RDMA_REG_TRACE 1
  16 //#define RDMA_PRN_ADDR_FUN 1
  17 //#define TRACE_LATENCY 1
  18 //#define TRACE_LATENCY_MSG 1
  19 //#define TRACE_LATENCY_SM 1
  20
  21 #ifndef RDMA_PRN_ADDR_FUN
  22 #define RDMA_PRN_ADDR_FUN       0
  23 #endif
  24 #define PRN_ADDR_FUN(x...)      if(RDMA_PRN_ADDR_FUN) \
  25                                 printk( x )
  26
  27 #ifndef RDMA_DEBUG
  28 #define RDMA_DEBUG              0
  29 #endif
  30 #define DEBUG_MSG(x...)         if(RDMA_DEBUG)  \
  31                                 printk(RDMA_PFX x )
  32
  33 #ifndef RDMA_TRACE
  34 #define RDMA_TRACE              1
  35 #endif
  36 #define TRACE_MSG(x...)         if(RDMA_TRACE)  \
  37                                 printk(RDMA_PFX x )
  38
  39 #define INFO_MSG(x...)          printk(  RDMA_PFX x )
  40 #define WARN_MSG(x...)          printk(  RDMA_PFX x )
  41 #define ERROR_MSG(x...)         printk(  RDMA_PFX x )
  42
  43
  44 #ifndef RDMA_DEBUG_READ
  45 #define RDMA_DEBUG_READ         0
  46 #endif
  47 #define dbg_read_buf(x...)      if(RDMA_DEBUG_READ)     \
  48                                 printk(RDMA_PFX_READ x )
  49
  50 #ifndef RDMA_DEBUG_SEND_MSG
  51 #define RDMA_DEBUG_SEND_MSG     0
  52 #endif
  53 #define dbg_send_msg(x...)      if(RDMA_DEBUG_SEND_MSG) \
  54                                 printk(RDMA_PFX_SEND_MSG x )
  55
  56 #ifndef RDMA_DEBUG_WRITE_BUF
  57 #define RDMA_DEBUG_WRITE_BUF    0
  58 #endif
  59 #define dbg_write_buf(x...)     if(RDMA_DEBUG_WRITE_BUF)\
  60                                 printk(RDMA_PFX_WRITE x )
  61
  62 #ifndef RDMA_DEBUG_IOCTL
  63 #define RDMA_DEBUG_IOCTL        0
  64 #endif
  65 #define dbg_ioctl(x...)         if(RDMA_DEBUG_IOCTL)    \
  66                                 printk(RDMA_PFX_IOCTL x )
  67
  68 #define EVENT                   1
  69 #define fix_event               if(EVENT_IOCTL) fix_event_proc
  70
  71 #define EVENT_IOCTL     1
  72 #ifndef EVENT_IOCTL
  73 #define EVENT_IOCTL     0
  74 #endif /* RDMA_DBG */
  75
  76 #define event_ioctl             if(EVENT_IOCTL) fix_event
  77
  78 #define EVENT_INTR      1
  79 #ifndef EVENT_INTR
  80 #define EVENT_INTR      0
  81 #endif /* RDMA_DBG */
  82
  83 #define event_intr              if(EVENT_INTR) fix_event
  84
  85 #define EVENT_READ      1
  86 #ifndef EVENT_READ
  87 #define EVENT_READ      0
  88 #endif /* RDMA_DBG */
  89
  90 #define event_read              if(EVENT_READ) fix_event
  91
  92 #define EVENT_WRITE     1
  93 #ifndef EVENT_WRITE
  94 #define EVENT_WRITE     0
  95 #endif /* RDMA_DBG */
  96
  97 #define event_write             if(EVENT_WRITE) fix_event
  98
  99 #define EVENT_SNDMSG    1
 100 #ifndef EVENT_SNDMSG
 101 #define EVENT_SNDMSG    0
 102 #endif /* RDMA_DBG */
 103
 104 #define event_sndmsg            if(EVENT_SNDMSG) fix_event
 105
 106 #define EVENT_DDI_CV 1
 107 #define event_ddi_cv            if (EVENT_DDI_CV) fix_event
 108
 109 #define DEBUG 0
 110 #define dbgprn if (DEBUG)       printk
 111
 112 #define CONFIG_CMD_RDMA(bus,devfn, where)   (0x80000000 | (bus << 16) | (devfn << 8) | (where & ~3))
 113
 114 #define MAX_TIMER 15000000      /*   ÎÅ ÂÏÌÅÅ xxx ÓÅË       */
 115 #define IO_TIMEOUT 10000000     /* n000000: n sec i/o timeout */
 116 #define SHIFT_TO        10
 117 #define REPEAT_TRWD_MAX         5
 118 #define REPEAT_WAIT_RD_MAX      50
 119 #define TIME_OUT_WAIT_RD        30 // test rdma ok
 120 #define TIME_OUT_WAIT_WR        40 // test rdma ok
 121 #define TIME_OUT_WAIT_FS        100
 122
 123 #define MSG_OPER        0x80000000      /* Messages OPER */
 124 #define MSG_TRWD        0x80000000      /* Messages TRWD */
 125 #define MSG_READY       0x00000000      /* Messages READY RECEIVER */
 126 #define ALLIGN_RDMA     256
 127
 128 #define MAX_max(a, b)    (a)>(b)?(a):(b)
 129 #define MIN_min(a, b)    (a)>(b)?(b):(a)
 130
 131 #define TIMER_FOR_WRITE_MAX     1000000
 132 #define TIMER_FOR_READ_MAX      1000000
 133 #define TIMER_FOR_WRITE_MIN     0
 134 #define TIMER_FOR_READ_MIN      100000
 135 #define TIMER_MAX               1000000
 136 #define TIMER_MIN               100000
 137 #define TIMER_READ_MAX          2000000
 138 #define TIMER_READ_MIN          200000
 139 #define TIMER_WRITE_MAX         1000000
 140 #define TIMER_WRITE_MIN         100000
 141 #define REPEAT_READY_MAX        10
 142 #define MAX_COUNT_RDR_RBC 300
 143 #define WAIT_SND_MSG            100
 144
 145
 146 #define board_name      "MCST,rdma"     /* should be same as FCODE.name */
 147
 148 ///#define DEV_inst(m)  ((m > 6)?1:0)           /* minor -> instance */
 149 #define DEV_inst(m)     (0)             /* minor -> instance */
 150 ///#define DEV_chan(m)  ((m > 6)?m - 7:m)       /* minor -> channel */
 151 #define DEV_chan(m)     (m)     /* minor -> channel */
 152
 153 #define MAX_CHANNEL             8
 154 #define MAX_CHANNEL_RDMA        12
 155
 156
 157 #define READER  0
 158 #define WRITER  1
 159
 160 #define MSG_USER        0x0fffffff      /* Messages for user */
 161 #define MSG_ABONENT     0x70000000
 162 #define SHIFT_ABONENT   28
 163
 164 #ifdef RDMA_REG_TRACE
 165 extern void WRR_rdma(unsigned char *reg, unsigned int val);
 166 extern unsigned int RDR_rdma(unsigned char *reg);
 167 #else
 168 #define WRR_rdma(reg, val)      writel(val, reg)
 169 #define RDR_rdma(reg)           readl(reg)
 170 #endif
 171
 172 extern  raw_spinlock_t  mu_fix_event;
 173 extern  raw_spinlock_t  cam_lock;
 174
 175 typedef struct dev_rdma_sem {
 176         char *dev_name;
 177         unsigned long   waited2_clkr;
 178         unsigned long   waited1_clkr;
 179         unsigned long   broadcast_clkr;
 180         unsigned long timeout;
 181         long irq_count_rdma;            /* ÓÞÅÔÞÉË ÅÝÅ ÎÅ ÏÂÒÁÂÏÔÁÎÎÙÈ ÐÒÅÒÙ×ÁÎÉÊ, ËÁË ÐÒÁ×ÉÌÏ 1 */
 182         unsigned int    num_obmen;      /* ÎÏÍÅÒ ÏÂÍÅÎÁ */
 183         unsigned long   time_broadcast; /* ÍÏÍÅÎÔ ÐÏÄÁÞÉ ËÏÍÁÎÄÙ ÎÁ ÐÒÏÂÕÖÄÅÎÉÅ */
 184
 185         raw_spinlock_t  lock;
 186         kcondvar_t      cond_var;
 187 } dev_rdma_sem_t;
 188
 189 typedef struct dma_chan {
 190         uchar_t channel;                 /*      channel index in slot   */
 191         uchar_t allocs;                  /* chan res alloc statbit stack */
 192
 193         dma_addr_t       dma_busa;
 194         dma_addr_t       dma;
 195         dma_addr_t       fdma;
 196         dma_addr_t       *prim_buf_addr;
 197         size_t           real_size;
 198         uint_t          tm;
 199         uint_t          tm_inited;
 200         size_t          size_tm;
 201         uint_t          full;
 202         dma_addr_t      *vdma_tm;
 203         dma_addr_t      fdma_tm;
 204 } dma_chan_t;
 205
 206 typedef struct rw_state {
 207         raw_spinlock_t  lock_wr;
 208         raw_spinlock_t  lock_rd;
 209         raw_spinlock_t  mu_spin;
 210         kmutex_t        mc;
 211         struct dev_rdma_sem     dev_rdma_sem;
 212         kmutex_t        mu;
 213         struct sk_buff *skb;
 214         uchar_t         stat;
 215         uint_t          int_ac;
 216         uchar_t         trwd_was;
 217         uint_t          evs;
 218         uint_t          msg_cs;
 219         uint_t          tcs;
 220         uint_t          dsf;
 221         uint_t          msf;
 222         uint_t          msg;
 223         uint_t          err_no;
 224         uint_t          acclen;
 225         uint_t          dma_tcs;
 226         uint_t          rbc;
 227         uint_t          real_size;
 228         uint_t          size_trans;
 229         uint_t          size_trb;
 230         uint_t          errno;
 231         uint_t          dma_busa;
 232         dma_addr_t      *prim_buf_addr;
 233         uint_t          vdma_tm;
 234         uint_t          fdma_tm;
 235         uint_t          tm;
 236         uint_t          dma;
 237         uint_t          fdma;
 238         uint_t          n_ready;
 239         dma_chan_t     *chd;
 240         int     clock_begin_read;
 241         int     clock_end_read_old;
 242         int     clock_begin_read_old;
 243         int     trwd_send_count;
 244         int     ready_send_count;
 245         int     trwd_rec_count;
 246         int     ready_rec_count;
 247         uint_t          clock_receive_ready;
 248         unsigned long   clock_receive_trwd;
 249         uint_t          clock_send_ready;
 250         uint_t          clock_send_trwd;
 251         uint_t          clock_rdc;
 252         uint_t          clock_tdc;
 253         uint_t          rdma_intr;
 254         long            tv_sec;
 255         long            tv_usec;
 256         unsigned long   clkr;
 257         int             int_cnt;
 258         int             timer_for_read;
 259         int             timer_for_write;
 260         int             timer;
 261         int             timer_read;
 262         int             timer_write;
 263         int             node_src;
 264         int             state_GP0;
 265         int             state_GP1;
 266         int             state_GP2;
 267         int             send_state_GP0;
 268         int             send_state_GP1;
 269         int             send_state_GP2;
 270         int             ret_GP0;
 271         int             ret_GP1;
 272         int             ret_GP2;
 273 } rw_state_t;
 274
 275 typedef rw_state_t * rw_state_p;
 276
 277 typedef struct rdma_state_inst {
 278         unsigned int    instance;
 279         kmutex_t        mu;
 280         unsigned int    opened;
 281         dma_chan_t      dma_chans[MAX_CHANNEL_RDMA];    /* DMA channels vector */
 282         rw_state_t rw_states_d[2];
 283         rw_state_t rw_states_m[2];
 284         rw_state_t ralive;
 285         rw_state_t talive;
 286         rw_state_t *rw_states_wr;
 287         rw_state_t *rw_states_rd;
 288 } rdma_state_inst_t;
 289
 290 struct rdma_state {
 291         struct pci_dev *dev_rdma;
 292         unsigned int    major;
 293         kmutex_t        mu;
 294         unsigned long   mmio_base;              // phys address
 295         uint8_t*        mmio_vbase;             // virtual address
 296         unsigned int    mmio_len;
 297         unsigned int    inited;
 298         int             size_rdma_state;
 299         rdma_state_inst_t       rdma_sti[2];
 300
 301 };
 302
 303 typedef unsigned int    half_addr_t;    /* single word (32 bits) */
 304 typedef struct rdma_addr_fields {
 305         half_addr_t     laddr;          /* [31:0] */
 306         half_addr_t     haddr;          /* [63:32] */
 307 } rdma_addr_fields_t;
 308
 309 typedef union rdma_addr_struct {        /* Structure of word */
 310         rdma_addr_fields_t      fields; /* as fields */
 311         unsigned long           addr;   /* as entier register */
 312 } rdma_addr_struct_t;
 313
 314 typedef struct rdma_tbl_32_struct {     /* struct for rdma tbl 32 */
 315         unsigned int    laddr;          /* l addess */
 316         unsigned int    sz;             /* size buffers */
 317 } rdma_tbl_32_struct_t;
 318
 319 typedef struct rdma_tbl_64_struct {     /* struct for rdma tbl 64 */
 320         unsigned long   addr;           /* address */
 321         unsigned long   sz;             /* size buffers */
 322 } rdma_tbl_64_struct_t;
 323
 324 #define SIZE_TBL64_RDMA         4096 /*4096*/
 325 #define SIZE_TBL32_RDMA         4096 /*4096*/
 326 #define NR_ENTRY_TBL64_RDMA     (SIZE_TBL64_RDMA >> 4)
 327
 328
 329 extern struct rdma_state *rdma_state;
 330
 331 extern int      wait_for_irq_rdma_sem(void* dev_rdma_sem, signed long timeout);
 332 extern void __wake_up_common(wait_queue_head_t *q, unsigned int mode,//muvlad
 333                              int nr_exclusive, int sync, void *key);
 334
 335 extern void     (*rdma_interrupt_p)(struct pt_regs *regs);
 336 extern void     fix_event_proc(unsigned int channel, unsigned int event, unsigned int val1, unsigned int val2);
 337 extern int send_msg(rdma_state_inst_t *xsp, unsigned int msg, int instance, unsigned int cmd, dev_rdma_sem_t *dev);
 338 extern unsigned int     msg_cs_dmrcl;
 339
 340 extern rdma_event_t rdma_event;
 341
 342 extern int rdma_event_init;
 343 extern int      irq_mc;
 344
 345 #if defined(TRACE_LATENCY) || defined(TRACE_LATENCY_MSG)
 346 extern void     user_trace_stop_my(void);
 347 extern  void    user_trace_start_my(void);
 348 #endif
 349
 350 extern unsigned long    time_ID_REQ;
 351 extern unsigned long    time_ID_ANS;
 352 extern unsigned char    bus_number_rdma, devfn_rdma;
 353 extern unsigned int     tr_atl;
 354