drm/radeon/kms: set DMA mask properly on newer PCI asics
[linux/fpc-iii.git] / drivers / gpu / drm / radeon / radeon_gem.c
blob2edc2a40d4d7b5b0b220ff225bc6e1f9200ed79b
1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
28 #include "drmP.h"
29 #include "drm.h"
30 #include "radeon_drm.h"
31 #include "radeon.h"
33 int radeon_gem_object_init(struct drm_gem_object *obj)
35 BUG();
37 return 0;
40 void radeon_gem_object_free(struct drm_gem_object *gobj)
42 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
44 if (robj) {
45 radeon_bo_unref(&robj);
49 int radeon_gem_object_create(struct radeon_device *rdev, int size,
50 int alignment, int initial_domain,
51 bool discardable, bool kernel,
52 struct drm_gem_object **obj)
54 struct radeon_bo *robj;
55 int r;
57 *obj = NULL;
58 /* At least align on page size */
59 if (alignment < PAGE_SIZE) {
60 alignment = PAGE_SIZE;
62 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
63 if (r) {
64 if (r != -ERESTARTSYS)
65 DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
66 size, initial_domain, alignment, r);
67 return r;
69 *obj = &robj->gem_base;
71 mutex_lock(&rdev->gem.mutex);
72 list_add_tail(&robj->list, &rdev->gem.objects);
73 mutex_unlock(&rdev->gem.mutex);
75 return 0;
78 int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
79 uint64_t *gpu_addr)
81 struct radeon_bo *robj = gem_to_radeon_bo(obj);
82 int r;
84 r = radeon_bo_reserve(robj, false);
85 if (unlikely(r != 0))
86 return r;
87 r = radeon_bo_pin(robj, pin_domain, gpu_addr);
88 radeon_bo_unreserve(robj);
89 return r;
92 void radeon_gem_object_unpin(struct drm_gem_object *obj)
94 struct radeon_bo *robj = gem_to_radeon_bo(obj);
95 int r;
97 r = radeon_bo_reserve(robj, false);
98 if (likely(r == 0)) {
99 radeon_bo_unpin(robj);
100 radeon_bo_unreserve(robj);
104 int radeon_gem_set_domain(struct drm_gem_object *gobj,
105 uint32_t rdomain, uint32_t wdomain)
107 struct radeon_bo *robj;
108 uint32_t domain;
109 int r;
111 /* FIXME: reeimplement */
112 robj = gem_to_radeon_bo(gobj);
113 /* work out where to validate the buffer to */
114 domain = wdomain;
115 if (!domain) {
116 domain = rdomain;
118 if (!domain) {
119 /* Do nothings */
120 printk(KERN_WARNING "Set domain withou domain !\n");
121 return 0;
123 if (domain == RADEON_GEM_DOMAIN_CPU) {
124 /* Asking for cpu access wait for object idle */
125 r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);
126 if (r) {
127 printk(KERN_ERR "Failed to wait for object !\n");
128 return r;
131 return 0;
134 int radeon_gem_init(struct radeon_device *rdev)
136 INIT_LIST_HEAD(&rdev->gem.objects);
137 return 0;
140 void radeon_gem_fini(struct radeon_device *rdev)
142 radeon_bo_force_delete(rdev);
147 * GEM ioctls.
149 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
150 struct drm_file *filp)
152 struct radeon_device *rdev = dev->dev_private;
153 struct drm_radeon_gem_info *args = data;
154 struct ttm_mem_type_manager *man;
156 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
158 args->vram_size = rdev->mc.real_vram_size;
159 args->vram_visible = (u64)man->size << PAGE_SHIFT;
160 if (rdev->stollen_vga_memory)
161 args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
162 args->vram_visible -= radeon_fbdev_total_size(rdev);
163 args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 -
164 RADEON_IB_POOL_SIZE*64*1024;
165 return 0;
168 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
169 struct drm_file *filp)
171 /* TODO: implement */
172 DRM_ERROR("unimplemented %s\n", __func__);
173 return -ENOSYS;
176 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
177 struct drm_file *filp)
179 /* TODO: implement */
180 DRM_ERROR("unimplemented %s\n", __func__);
181 return -ENOSYS;
184 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
185 struct drm_file *filp)
187 struct radeon_device *rdev = dev->dev_private;
188 struct drm_radeon_gem_create *args = data;
189 struct drm_gem_object *gobj;
190 uint32_t handle;
191 int r;
193 /* create a gem object to contain this object in */
194 args->size = roundup(args->size, PAGE_SIZE);
195 r = radeon_gem_object_create(rdev, args->size, args->alignment,
196 args->initial_domain, false,
197 false, &gobj);
198 if (r) {
199 return r;
201 r = drm_gem_handle_create(filp, gobj, &handle);
202 /* drop reference from allocate - handle holds it now */
203 drm_gem_object_unreference_unlocked(gobj);
204 if (r) {
205 return r;
207 args->handle = handle;
208 return 0;
211 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
212 struct drm_file *filp)
214 /* transition the BO to a domain -
215 * just validate the BO into a certain domain */
216 struct drm_radeon_gem_set_domain *args = data;
217 struct drm_gem_object *gobj;
218 struct radeon_bo *robj;
219 int r;
221 /* for now if someone requests domain CPU -
222 * just make sure the buffer is finished with */
224 /* just do a BO wait for now */
225 gobj = drm_gem_object_lookup(dev, filp, args->handle);
226 if (gobj == NULL) {
227 return -ENOENT;
229 robj = gem_to_radeon_bo(gobj);
231 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
233 drm_gem_object_unreference_unlocked(gobj);
234 return r;
237 int radeon_mode_dumb_mmap(struct drm_file *filp,
238 struct drm_device *dev,
239 uint32_t handle, uint64_t *offset_p)
241 struct drm_gem_object *gobj;
242 struct radeon_bo *robj;
244 gobj = drm_gem_object_lookup(dev, filp, handle);
245 if (gobj == NULL) {
246 return -ENOENT;
248 robj = gem_to_radeon_bo(gobj);
249 *offset_p = radeon_bo_mmap_offset(robj);
250 drm_gem_object_unreference_unlocked(gobj);
251 return 0;
254 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
255 struct drm_file *filp)
257 struct drm_radeon_gem_mmap *args = data;
259 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
262 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
263 struct drm_file *filp)
265 struct drm_radeon_gem_busy *args = data;
266 struct drm_gem_object *gobj;
267 struct radeon_bo *robj;
268 int r;
269 uint32_t cur_placement = 0;
271 gobj = drm_gem_object_lookup(dev, filp, args->handle);
272 if (gobj == NULL) {
273 return -ENOENT;
275 robj = gem_to_radeon_bo(gobj);
276 r = radeon_bo_wait(robj, &cur_placement, true, TTM_USAGE_READWRITE);
277 switch (cur_placement) {
278 case TTM_PL_VRAM:
279 args->domain = RADEON_GEM_DOMAIN_VRAM;
280 break;
281 case TTM_PL_TT:
282 args->domain = RADEON_GEM_DOMAIN_GTT;
283 break;
284 case TTM_PL_SYSTEM:
285 args->domain = RADEON_GEM_DOMAIN_CPU;
286 default:
287 break;
289 drm_gem_object_unreference_unlocked(gobj);
290 return r;
293 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
294 struct drm_file *filp)
296 struct drm_radeon_gem_wait_idle *args = data;
297 struct drm_gem_object *gobj;
298 struct radeon_bo *robj;
299 int r;
301 gobj = drm_gem_object_lookup(dev, filp, args->handle);
302 if (gobj == NULL) {
303 return -ENOENT;
305 robj = gem_to_radeon_bo(gobj);
306 r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);
307 /* callback hw specific functions if any */
308 if (robj->rdev->asic->ioctl_wait_idle)
309 robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
310 drm_gem_object_unreference_unlocked(gobj);
311 return r;
314 int radeon_gem_wait_ioctl(struct drm_device *dev, void *data,
315 struct drm_file *filp)
317 struct drm_radeon_gem_wait *args = data;
318 struct drm_gem_object *gobj;
319 struct radeon_bo *robj;
320 bool no_wait = (args->flags & RADEON_GEM_NO_WAIT) != 0;
321 enum ttm_buffer_usage usage = 0;
322 int r;
324 if (args->flags & RADEON_GEM_USAGE_READ)
325 usage |= TTM_USAGE_READ;
326 if (args->flags & RADEON_GEM_USAGE_WRITE)
327 usage |= TTM_USAGE_WRITE;
328 if (!usage)
329 usage = TTM_USAGE_READWRITE;
331 gobj = drm_gem_object_lookup(dev, filp, args->handle);
332 if (gobj == NULL) {
333 return -ENOENT;
335 robj = gem_to_radeon_bo(gobj);
336 r = radeon_bo_wait(robj, NULL, no_wait, usage);
337 /* callback hw specific functions if any */
338 if (!no_wait && robj->rdev->asic->ioctl_wait_idle)
339 robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
340 drm_gem_object_unreference_unlocked(gobj);
341 return r;
344 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
345 struct drm_file *filp)
347 struct drm_radeon_gem_set_tiling *args = data;
348 struct drm_gem_object *gobj;
349 struct radeon_bo *robj;
350 int r = 0;
352 DRM_DEBUG("%d \n", args->handle);
353 gobj = drm_gem_object_lookup(dev, filp, args->handle);
354 if (gobj == NULL)
355 return -ENOENT;
356 robj = gem_to_radeon_bo(gobj);
357 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
358 drm_gem_object_unreference_unlocked(gobj);
359 return r;
362 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
363 struct drm_file *filp)
365 struct drm_radeon_gem_get_tiling *args = data;
366 struct drm_gem_object *gobj;
367 struct radeon_bo *rbo;
368 int r = 0;
370 DRM_DEBUG("\n");
371 gobj = drm_gem_object_lookup(dev, filp, args->handle);
372 if (gobj == NULL)
373 return -ENOENT;
374 rbo = gem_to_radeon_bo(gobj);
375 r = radeon_bo_reserve(rbo, false);
376 if (unlikely(r != 0))
377 goto out;
378 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
379 radeon_bo_unreserve(rbo);
380 out:
381 drm_gem_object_unreference_unlocked(gobj);
382 return r;
385 int radeon_mode_dumb_create(struct drm_file *file_priv,
386 struct drm_device *dev,
387 struct drm_mode_create_dumb *args)
389 struct radeon_device *rdev = dev->dev_private;
390 struct drm_gem_object *gobj;
391 uint32_t handle;
392 int r;
394 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
395 args->size = args->pitch * args->height;
396 args->size = ALIGN(args->size, PAGE_SIZE);
398 r = radeon_gem_object_create(rdev, args->size, 0,
399 RADEON_GEM_DOMAIN_VRAM,
400 false, ttm_bo_type_device,
401 &gobj);
402 if (r)
403 return -ENOMEM;
405 r = drm_gem_handle_create(file_priv, gobj, &handle);
406 /* drop reference from allocate - handle holds it now */
407 drm_gem_object_unreference_unlocked(gobj);
408 if (r) {
409 return r;
411 args->handle = handle;
412 return 0;
415 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
416 struct drm_device *dev,
417 uint32_t handle)
419 return drm_gem_handle_delete(file_priv, handle);