include/asm-ppc/pci.h

   1 #ifndef __PPC_PCI_H
   2 #define __PPC_PCI_H
   3 #ifdef __KERNEL__
   4
   5 #include <linux/types.h>
   6 #include <linux/slab.h>
   7 #include <linux/string.h>
   8 #include <linux/mm.h>
   9 #include <asm/scatterlist.h>
  10 #include <asm/io.h>
  11 #include <asm/pci-bridge.h>
  12 #include <asm-generic/pci-dma-compat.h>
  13
  14 struct pci_dev;
  15
  16 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
  17 #define IOBASE_BRIDGE_NUMBER    0
  18 #define IOBASE_MEMORY           1
  19 #define IOBASE_IO               2
  20 #define IOBASE_ISA_IO           3
  21 #define IOBASE_ISA_MEM          4
  22
  23 /*
  24  * Set this to 1 if you want the kernel to re-assign all PCI
  25  * bus numbers
  26  */
  27 extern int pci_assign_all_buses;
  28
  29 #define pcibios_assign_all_busses()     (pci_assign_all_buses)
  30 #define pcibios_scan_all_fns(a, b)      0
  31
  32 #define PCIBIOS_MIN_IO          0x1000
  33 #define PCIBIOS_MIN_MEM         0x10000000
  34
  35 extern inline void pcibios_set_master(struct pci_dev *dev)
  36 {
  37         /* No special bus mastering setup handling */
  38 }
  39
  40 extern inline void pcibios_penalize_isa_irq(int irq, int active)
  41 {
  42         /* We don't do dynamic PCI IRQ allocation */
  43 }
  44
  45 extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res);
  46
  47 /*
  48  * The PCI bus bridge can translate addresses issued by the processor(s)
  49  * into a different address on the PCI bus.  On 32-bit cpus, we assume
  50  * this mapping is 1-1, but on 64-bit systems it often isn't.
  51  *
  52  * Obsolete ! Drivers should now use pci_resource_to_bus
  53  */
  54 extern unsigned long phys_to_bus(unsigned long pa);
  55 extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr);
  56 extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
  57
  58 /* The PCI address space does equal the physical memory
  59  * address space.  The networking and block device layers use
  60  * this boolean for bounce buffer decisions.
  61  */
  62 #define PCI_DMA_BUS_IS_PHYS     (1)
  63
  64 #ifdef CONFIG_NOT_COHERENT_CACHE
  65 /*
  66  * pci_unmap_{page,single} are NOPs but pci_dma_sync_single_for_cpu()
  67  * and so on are not, so...
  68  */
  69
  70 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
  71         dma_addr_t ADDR_NAME;
  72 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
  73         __u32 LEN_NAME;
  74 #define pci_unmap_addr(PTR, ADDR_NAME)                  \
  75         ((PTR)->ADDR_NAME)
  76 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
  77         (((PTR)->ADDR_NAME) = (VAL))
  78 #define pci_unmap_len(PTR, LEN_NAME)                    \
  79         ((PTR)->LEN_NAME)
  80 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
  81         (((PTR)->LEN_NAME) = (VAL))
  82
  83 #else /* coherent */
  84
  85 /* pci_unmap_{page,single} is a nop so... */
  86 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
  87 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
  88 #define pci_unmap_addr(PTR, ADDR_NAME)          (0)
  89 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
  90 #define pci_unmap_len(PTR, LEN_NAME)            (0)
  91 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
  92
  93 #endif /* CONFIG_NOT_COHERENT_CACHE */
  94
  95 #ifdef CONFIG_PCI
  96 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  97                                         enum pci_dma_burst_strategy *strat,
  98                                         unsigned long *strategy_parameter)
  99 {
 100         *strat = PCI_DMA_BURST_INFINITY;
 101         *strategy_parameter = ~0UL;
 102 }
 103 #endif
 104
 105 /* Return the index of the PCI controller for device PDEV. */
 106 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
 107
 108 /* Set the name of the bus as it appears in /proc/bus/pci */
 109 static inline int pci_proc_domain(struct pci_bus *bus)
 110 {
 111         return 0;
 112 }
 113
 114 /* Map a range of PCI memory or I/O space for a device into user space */
 115 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
 116                         enum pci_mmap_state mmap_state, int write_combine);
 117
 118 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
 119 #define HAVE_PCI_MMAP   1
 120
 121 extern void
 122 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
 123                         struct resource *res);
 124
 125 extern void
 126 pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
 127                         struct pci_bus_region *region);
 128
 129 static inline struct resource *
 130 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
 131 {
 132         struct resource *root = NULL;
 133
 134         if (res->flags & IORESOURCE_IO)
 135                 root = &ioport_resource;
 136         if (res->flags & IORESOURCE_MEM)
 137                 root = &iomem_resource;
 138
 139         return root;
 140 }
 141
 142 struct file;
 143 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
 144                                          unsigned long pfn,
 145                                          unsigned long size,
 146                                          pgprot_t prot);
 147
 148 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
 149 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
 150                                  const struct resource *rsrc,
 151                                  resource_size_t *start, resource_size_t *end);
 152
 153
 154 #endif  /* __KERNEL__ */
 155
 156 #endif /* __PPC_PCI_H */