Documentation/devicetree/bindings/media/st,stm32-dcmi.txt

   1 STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)
   2
   3 Required properties:
   4 - compatible: "st,stm32-dcmi"
   5 - reg: physical base address and length of the registers set for the device
   6 - interrupts: should contain IRQ line for the DCMI
   7 - resets: reference to a reset controller,
   8           see Documentation/devicetree/bindings/reset/st,stm32-rcc.txt
   9 - clocks: list of clock specifiers, corresponding to entries in
  10           the clock-names property
  11 - clock-names: must contain "mclk", which is the DCMI peripherial clock
  12 - pinctrl: the pincontrol settings to configure muxing properly
  13            for pins that connect to DCMI device.
  14            See Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml.
  15 - dmas: phandle to DMA controller node,
  16         see Documentation/devicetree/bindings/dma/stm32-dma.txt
  17 - dma-names: must contain "tx", which is the transmit channel from DCMI to DMA
  18
  19 DCMI supports a single port node with parallel bus. It should contain one
  20 'port' child node with child 'endpoint' node. Please refer to the bindings
  21 defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
  22
  23 Example:
  24
  25         dcmi: dcmi@50050000 {
  26                 compatible = "st,stm32-dcmi";
  27                 reg = <0x50050000 0x400>;
  28                 interrupts = <78>;
  29                 resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;
  30                 clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
  31                 clock-names = "mclk";
  32                 pinctrl-names = "default";
  33                 pinctrl-0 = <&dcmi_pins>;
  34                 dmas = <&dma2 1 1 0x414 0x3>;
  35                 dma-names = "tx";
  36                 port {
  37                         dcmi_0: endpoint {
  38                                 remote-endpoint = <...>;
  39                                 bus-width = <8>;
  40                                 hsync-active = <0>;
  41                                 vsync-active = <0>;
  42                                 pclk-sample = <1>;
  43                         };
  44                 };
  45         };