Documentation/devicetree/bindings/media/ti,da850-vpif.txt

   1 Texas Instruments VPIF
   2 ----------------------
   3
   4 The TI Video Port InterFace (VPIF) is the primary component for video
   5 capture and display on the DA850/AM18x family of TI DaVinci/Sitara
   6 SoCs.
   7
   8 TI Document reference: SPRUH82C, Chapter 35
   9 http://www.ti.com/lit/pdf/spruh82
  10
  11 Required properties:
  12 - compatible: must be "ti,da850-vpif"
  13 - reg: physical base address and length of the registers set for the device;
  14 - interrupts: should contain IRQ line for the VPIF
  15
  16 Video Capture:
  17
  18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
  19 single 16-bit channel. It should contain one or two port child nodes
  20 with child 'endpoint' node. If there are two ports then port@0 must
  21 describe the input and port@1 output channels. Please refer to the
  22 bindings defined in
  23 Documentation/devicetree/bindings/media/video-interfaces.txt.
  24
  25 Example using 2 8-bit input channels, one of which is connected to an
  26 I2C-connected TVP5147 decoder:
  27
  28         vpif: vpif@217000 {
  29                 compatible = "ti,da850-vpif";
  30                 reg = <0x217000 0x1000>;
  31                 interrupts = <92>;
  32
  33                 port@0 {
  34                         vpif_input_ch0: endpoint@0 {
  35                                 reg = <0>;
  36                                 bus-width = <8>;
  37                                 remote-endpoint = <&composite_in>;
  38                         };
  39
  40                         vpif_input_ch1: endpoint@1 {
  41                                 reg = <1>;
  42                                 bus-width = <8>;
  43                                 data-shift = <8>;
  44                         };
  45                 };
  46
  47                 port@1 {
  48                         vpif_output_ch0: endpoint {
  49                                 bus-width = <8>;
  50                                 remote-endpoint = <&composite_out>;
  51                         };
  52                 };
  53         };
  54
  55 [ ... ]
  56
  57 &i2c0 {
  58
  59         tvp5147@5d {
  60                 compatible = "ti,tvp5147";
  61                 reg = <0x5d>;
  62
  63                 port {
  64                         composite_in: endpoint {
  65                                 hsync-active = <1>;
  66                                 vsync-active = <1>;
  67                                 pclk-sample = <0>;
  68
  69                                 /* VPIF channel 0 (lower 8-bits) */
  70                                 remote-endpoint = <&vpif_input_ch0>;
  71                                 bus-width = <8>;
  72                         };
  73                 };
  74         };
  75
  76         adv7343@2a {
  77                 compatible = "adi,adv7343";
  78                 reg = <0x2a>;
  79
  80                 port {
  81                         composite_out: endpoint {
  82                                 adi,dac-enable = <1 1 1>;
  83                                 adi,sd-dac-enable = <1>;
  84
  85                                 remote-endpoint = <&vpif_output_ch0>;
  86                                 bus-width = <8>;
  87                         };
  88                 };
  89         };
  90 };
  91
  92
  93 Alternatively, an example when the bus is configured as a single
  94 16-bit input (e.g. for raw-capture mode):
  95
  96         vpif: vpif@217000 {
  97                 compatible = "ti,da850-vpif";
  98                 reg = <0x217000 0x1000>;
  99                 interrupts = <92>;
 100
 101                 port {
 102                         vpif_ch0: endpoint {
 103                                   bus-width = <16>;
 104                         };
 105                 };
 106         };