1 SMI (Smart Multimedia Interface) Local Arbiter
3 The hardware block diagram please check bindings/iommu/mediatek,iommu.txt
6 - compatible : must be one of :
7 "mediatek,mt2701-smi-larb"
8 "mediatek,mt2712-smi-larb"
9 "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
10 "mediatek,mt8173-smi-larb"
11 "mediatek,mt8183-smi-larb"
12 - reg : the register and size of this local arbiter.
13 - mediatek,smi : a phandle to the smi_common node.
14 - power-domains : a phandle to the power domain of this local arbiter.
15 - clocks : Must contain an entry for each entry in clock-names.
16 - clock-names: must contain 2 entries, as follows:
17 - "apb" : Advanced Peripheral Bus clock, It's the clock for setting
19 - "smi" : It's the clock for transfer data and command.
20 and this optional clock name:
21 - "gals": the clock for GALS(Global Async Local Sync).
22 Here is the list which has this GALS: mt8183.
24 Required property for mt2701, mt2712 and mt7623:
25 - mediatek,larb-id :the hardware id of this larb.
28 larb1: larb@16010000 {
29 compatible = "mediatek,mt8173-smi-larb";
30 reg = <0 0x16010000 0 0x1000>;
31 mediatek,smi = <&smi_common>;
32 power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
33 clocks = <&vdecsys CLK_VDEC_CKEN>,
34 <&vdecsys CLK_VDEC_LARB_CKEN>;
35 clock-names = "apb", "smi";
39 larb0: larb@14010000 {
40 compatible = "mediatek,mt2701-smi-larb";
41 reg = <0 0x14010000 0 0x1000>;
42 mediatek,smi = <&smi_common>;
43 mediatek,larb-id = <0>;
44 clocks = <&mmsys CLK_MM_SMI_LARB0>,
45 <&mmsys CLK_MM_SMI_LARB0>;
46 clock-names = "apb", "smi";
47 power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;