1 TI Keystone DSP devices
2 =======================
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
5 sub-systems that are used to offload some of the processor-intensive tasks or
6 algorithms, for achieving various system level goals.
8 These processor sub-systems usually contain additional sub-modules like L1
9 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller,
10 a dedicated local power/sleep controller etc. The DSP processor core in
11 Keystone 2 SoCs is usually a TMS320C66x CorePac processor.
15 Each DSP Core sub-system is represented as a single DT node, and should also
16 have an alias with the stem 'rproc' defined. Each node has a number of required
17 or optional properties that enable the OS running on the host processor (ARM
18 CorePac) to perform the device management of the remote processor and to
19 communicate with the remote processor.
23 The following are the mandatory properties:
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
32 Each entry should have the memory region's start address
33 and the size of the region, the representation matching
34 the parent node's '#address-cells' and '#size-cells' values.
36 - reg-names: Should contain strings with the following names, each
37 representing a specific internal memory region, and
38 should be defined in this order,
39 "l2sram", "l1pram", "l1dram"
41 - ti,syscon-dev: Should be a pair of the phandle to the Keystone Device
42 State Control node, and the register offset of the DSP
43 boot address register within that node's address space.
45 - resets: Should contain the phandle to the reset controller node
46 managing the resets for this device, and a reset
47 specifier. Please refer to either of the following reset
48 bindings for the reset argument specifier as per SoC,
49 Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
50 for 66AK2HK/66AK2L/66AK2E SoCs or,
51 Documentation/devicetree/bindings/reset/ti,sci-reset.txt
54 - interrupts: Should contain an entry for each value in 'interrupt-names'.
55 Each entry should have the interrupt source number used by
56 the remote processor to the host processor. The values should
57 follow the interrupt-specifier format as dictated by the
58 'interrupt-parent' node. The purpose of each is as per the
59 description in the 'interrupt-names' property.
61 - interrupt-names: Should contain strings with the following names, each
62 representing a specific interrupt,
63 "vring" - interrupt for virtio based IPC
64 "exception" - interrupt for exception notification
66 - kick-gpios: Should specify the gpio device needed for the virtio IPC
67 stack. This will be used to interrupt the remote processor.
68 The gpio device to be used is as per the bindings in,
69 Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
71 SoC-specific Required properties:
72 ---------------------------------
73 The following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E
76 - clocks: Should contain the device's input clock, and should be
77 defined as per the bindings in,
78 Documentation/devicetree/bindings/clock/keystone-gate.txt
80 The following are mandatory properties for Keystone 2 66AK2G SoCs only:
82 - power-domains: Should contain a phandle to a PM domain provider node
83 and an args specifier containing the DSP device id
84 value. This property is as per the binding,
85 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
90 - memory-region: phandle to the reserved memory node to be associated
91 with the remoteproc device. The reserved memory node
92 can be a CMA memory node, and should be defined as
94 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
101 /* 66AK2H/K DSP aliases */
113 /* 66AK2H/K DSP memory node */
115 #address-cells = <2>;
119 dsp_common_memory: dsp-common-memory@81f800000 {
120 compatible = "shared-dma-pool";
121 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
126 /* 66AK2H/K DSP node */
129 compatible = "ti,k2hk-dsp";
130 reg = <0x10800000 0x00100000>,
131 <0x10e00000 0x00008000>,
132 <0x10f00000 0x00008000>;
133 reg-names = "l2sram", "l1pram", "l1dram";
135 ti,syscon-dev = <&devctrl 0x40>;
136 resets = <&pscrst 0>;
137 interrupt-parent = <&kirq0>;
139 interrupt-names = "vring", "exception";
140 kick-gpios = <&dspgpio0 27 0>;
141 memory-region = <&dsp_common_memory>;
147 /* 66AK2G DSP alias */
152 /* 66AK2G DSP memory node */
154 #address-cells = <2>;
158 dsp_common_memory: dsp-common-memory@81f800000 {
159 compatible = "shared-dma-pool";
160 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
165 /* 66AK2G DSP node */
168 compatible = "ti,k2g-dsp";
169 reg = <0x10800000 0x00100000>,
170 <0x10e00000 0x00008000>,
171 <0x10f00000 0x00008000>;
172 reg-names = "l2sram", "l1pram", "l1dram";
173 power-domains = <&k2g_pds 0x0046>;
174 ti,syscon-dev = <&devctrl 0x40>;
175 resets = <&k2g_reset 0x0046 0x1>;
176 interrupt-parent = <&kirq0>;
178 interrupt-names = "vring", "exception";
179 kick-gpios = <&dspgpio0 27 0>;
180 memory-region = <&dsp_common_memory>;