1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
11 // by platform driver code.
14 #include <linux/mutex.h>
15 #include <linux/types.h>
20 static void ipc_trace_message(struct snd_sof_dev
*sdev
, u32 msg_id
);
21 static void ipc_stream_message(struct snd_sof_dev
*sdev
, u32 msg_cmd
);
24 * IPC message Tx/Rx message handling.
27 /* SOF generic IPC data */
29 struct snd_sof_dev
*sdev
;
31 /* protects messages and the disable flag */
32 struct mutex tx_mutex
;
33 /* disables further sending of ipc's */
36 struct snd_sof_ipc_msg msg
;
39 struct sof_ipc_ctrl_data_params
{
49 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
50 static void ipc_log_header(struct device
*dev
, u8
*text
, u32 cmd
)
57 glb
= cmd
& SOF_GLB_TYPE_MASK
;
58 type
= cmd
& SOF_CMD_TYPE_MASK
;
61 case SOF_IPC_GLB_REPLY
:
62 str
= "GLB_REPLY"; break;
63 case SOF_IPC_GLB_COMPOUND
:
64 str
= "GLB_COMPOUND"; break;
65 case SOF_IPC_GLB_TPLG_MSG
:
68 case SOF_IPC_TPLG_COMP_NEW
:
69 str2
= "COMP_NEW"; break;
70 case SOF_IPC_TPLG_COMP_FREE
:
71 str2
= "COMP_FREE"; break;
72 case SOF_IPC_TPLG_COMP_CONNECT
:
73 str2
= "COMP_CONNECT"; break;
74 case SOF_IPC_TPLG_PIPE_NEW
:
75 str2
= "PIPE_NEW"; break;
76 case SOF_IPC_TPLG_PIPE_FREE
:
77 str2
= "PIPE_FREE"; break;
78 case SOF_IPC_TPLG_PIPE_CONNECT
:
79 str2
= "PIPE_CONNECT"; break;
80 case SOF_IPC_TPLG_PIPE_COMPLETE
:
81 str2
= "PIPE_COMPLETE"; break;
82 case SOF_IPC_TPLG_BUFFER_NEW
:
83 str2
= "BUFFER_NEW"; break;
84 case SOF_IPC_TPLG_BUFFER_FREE
:
85 str2
= "BUFFER_FREE"; break;
87 str2
= "unknown type"; break;
90 case SOF_IPC_GLB_PM_MSG
:
93 case SOF_IPC_PM_CTX_SAVE
:
94 str2
= "CTX_SAVE"; break;
95 case SOF_IPC_PM_CTX_RESTORE
:
96 str2
= "CTX_RESTORE"; break;
97 case SOF_IPC_PM_CTX_SIZE
:
98 str2
= "CTX_SIZE"; break;
99 case SOF_IPC_PM_CLK_SET
:
100 str2
= "CLK_SET"; break;
101 case SOF_IPC_PM_CLK_GET
:
102 str2
= "CLK_GET"; break;
103 case SOF_IPC_PM_CLK_REQ
:
104 str2
= "CLK_REQ"; break;
105 case SOF_IPC_PM_CORE_ENABLE
:
106 str2
= "CORE_ENABLE"; break;
108 str2
= "unknown type"; break;
111 case SOF_IPC_GLB_COMP_MSG
:
112 str
= "GLB_COMP_MSG";
114 case SOF_IPC_COMP_SET_VALUE
:
115 str2
= "SET_VALUE"; break;
116 case SOF_IPC_COMP_GET_VALUE
:
117 str2
= "GET_VALUE"; break;
118 case SOF_IPC_COMP_SET_DATA
:
119 str2
= "SET_DATA"; break;
120 case SOF_IPC_COMP_GET_DATA
:
121 str2
= "GET_DATA"; break;
123 str2
= "unknown type"; break;
126 case SOF_IPC_GLB_STREAM_MSG
:
127 str
= "GLB_STREAM_MSG";
129 case SOF_IPC_STREAM_PCM_PARAMS
:
130 str2
= "PCM_PARAMS"; break;
131 case SOF_IPC_STREAM_PCM_PARAMS_REPLY
:
132 str2
= "PCM_REPLY"; break;
133 case SOF_IPC_STREAM_PCM_FREE
:
134 str2
= "PCM_FREE"; break;
135 case SOF_IPC_STREAM_TRIG_START
:
136 str2
= "TRIG_START"; break;
137 case SOF_IPC_STREAM_TRIG_STOP
:
138 str2
= "TRIG_STOP"; break;
139 case SOF_IPC_STREAM_TRIG_PAUSE
:
140 str2
= "TRIG_PAUSE"; break;
141 case SOF_IPC_STREAM_TRIG_RELEASE
:
142 str2
= "TRIG_RELEASE"; break;
143 case SOF_IPC_STREAM_TRIG_DRAIN
:
144 str2
= "TRIG_DRAIN"; break;
145 case SOF_IPC_STREAM_TRIG_XRUN
:
146 str2
= "TRIG_XRUN"; break;
147 case SOF_IPC_STREAM_POSITION
:
148 str2
= "POSITION"; break;
149 case SOF_IPC_STREAM_VORBIS_PARAMS
:
150 str2
= "VORBIS_PARAMS"; break;
151 case SOF_IPC_STREAM_VORBIS_FREE
:
152 str2
= "VORBIS_FREE"; break;
154 str2
= "unknown type"; break;
157 case SOF_IPC_FW_READY
:
158 str
= "FW_READY"; break;
159 case SOF_IPC_GLB_DAI_MSG
:
162 case SOF_IPC_DAI_CONFIG
:
163 str2
= "CONFIG"; break;
164 case SOF_IPC_DAI_LOOPBACK
:
165 str2
= "LOOPBACK"; break;
167 str2
= "unknown type"; break;
170 case SOF_IPC_GLB_TRACE_MSG
:
171 str
= "GLB_TRACE_MSG"; break;
172 case SOF_IPC_GLB_TEST_MSG
:
173 str
= "GLB_TEST_MSG";
175 case SOF_IPC_TEST_IPC_FLOOD
:
176 str2
= "IPC_FLOOD"; break;
178 str2
= "unknown type"; break;
182 str
= "unknown GLB command"; break;
186 dev_dbg(dev
, "%s: 0x%x: %s: %s\n", text
, cmd
, str
, str2
);
188 dev_dbg(dev
, "%s: 0x%x: %s\n", text
, cmd
, str
);
191 static inline void ipc_log_header(struct device
*dev
, u8
*text
, u32 cmd
)
193 if ((cmd
& SOF_GLB_TYPE_MASK
) != SOF_IPC_GLB_TRACE_MSG
)
194 dev_dbg(dev
, "%s: 0x%x\n", text
, cmd
);
198 /* wait for IPC message reply */
199 static int tx_wait_done(struct snd_sof_ipc
*ipc
, struct snd_sof_ipc_msg
*msg
,
202 struct snd_sof_dev
*sdev
= ipc
->sdev
;
203 struct sof_ipc_cmd_hdr
*hdr
= msg
->msg_data
;
206 /* wait for DSP IPC completion */
207 ret
= wait_event_timeout(msg
->waitq
, msg
->ipc_complete
,
208 msecs_to_jiffies(sdev
->ipc_timeout
));
211 dev_err(sdev
->dev
, "error: ipc timed out for 0x%x size %d\n",
212 hdr
->cmd
, hdr
->size
);
213 snd_sof_dsp_dbg_dump(ipc
->sdev
, SOF_DBG_REGS
| SOF_DBG_MBOX
);
214 snd_sof_ipc_dump(ipc
->sdev
);
215 snd_sof_trace_notify_for_error(ipc
->sdev
);
218 /* copy the data returned from DSP */
219 ret
= msg
->reply_error
;
221 memcpy(reply_data
, msg
->reply_data
, msg
->reply_size
);
223 dev_err(sdev
->dev
, "error: ipc error for 0x%x size %zu\n",
224 hdr
->cmd
, msg
->reply_size
);
226 ipc_log_header(sdev
->dev
, "ipc tx succeeded", hdr
->cmd
);
232 /* send IPC message from host to DSP */
233 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc
*ipc
, u32 header
,
234 void *msg_data
, size_t msg_bytes
,
235 void *reply_data
, size_t reply_bytes
)
237 struct snd_sof_dev
*sdev
= ipc
->sdev
;
238 struct snd_sof_ipc_msg
*msg
;
241 if (ipc
->disable_ipc_tx
)
245 * The spin-lock is also still needed to protect message objects against
246 * other atomic contexts.
248 spin_lock_irq(&sdev
->ipc_lock
);
250 /* initialise the message */
253 msg
->header
= header
;
254 msg
->msg_size
= msg_bytes
;
255 msg
->reply_size
= reply_bytes
;
256 msg
->reply_error
= 0;
258 /* attach any data */
260 memcpy(msg
->msg_data
, msg_data
, msg_bytes
);
264 ret
= snd_sof_dsp_send_msg(sdev
, msg
);
265 /* Next reply that we receive will be related to this message */
267 msg
->ipc_complete
= false;
269 spin_unlock_irq(&sdev
->ipc_lock
);
272 /* So far IPC TX never fails, consider making the above void */
273 dev_err_ratelimited(sdev
->dev
,
274 "error: ipc tx failed with error %d\n",
279 ipc_log_header(sdev
->dev
, "ipc tx", msg
->header
);
281 /* now wait for completion */
283 ret
= tx_wait_done(ipc
, msg
, reply_data
);
288 /* send IPC message from host to DSP */
289 int sof_ipc_tx_message(struct snd_sof_ipc
*ipc
, u32 header
,
290 void *msg_data
, size_t msg_bytes
, void *reply_data
,
295 if (msg_bytes
> SOF_IPC_MSG_MAX_SIZE
||
296 reply_bytes
> SOF_IPC_MSG_MAX_SIZE
)
299 /* Serialise IPC TX */
300 mutex_lock(&ipc
->tx_mutex
);
302 ret
= sof_ipc_tx_message_unlocked(ipc
, header
, msg_data
, msg_bytes
,
303 reply_data
, reply_bytes
);
305 mutex_unlock(&ipc
->tx_mutex
);
309 EXPORT_SYMBOL(sof_ipc_tx_message
);
311 /* handle reply message from DSP */
312 int snd_sof_ipc_reply(struct snd_sof_dev
*sdev
, u32 msg_id
)
314 struct snd_sof_ipc_msg
*msg
= &sdev
->ipc
->msg
;
316 if (msg
->ipc_complete
) {
317 dev_err(sdev
->dev
, "error: no reply expected, received 0x%x",
322 /* wake up and return the error if we have waiters on this message ? */
323 msg
->ipc_complete
= true;
324 wake_up(&msg
->waitq
);
328 EXPORT_SYMBOL(snd_sof_ipc_reply
);
330 /* DSP firmware has sent host a message */
331 void snd_sof_ipc_msgs_rx(struct snd_sof_dev
*sdev
)
333 struct sof_ipc_cmd_hdr hdr
;
337 /* read back header */
338 snd_sof_ipc_msg_data(sdev
, NULL
, &hdr
, sizeof(hdr
));
339 ipc_log_header(sdev
->dev
, "ipc rx", hdr
.cmd
);
341 cmd
= hdr
.cmd
& SOF_GLB_TYPE_MASK
;
342 type
= hdr
.cmd
& SOF_CMD_TYPE_MASK
;
344 /* check message type */
346 case SOF_IPC_GLB_REPLY
:
347 dev_err(sdev
->dev
, "error: ipc reply unknown\n");
349 case SOF_IPC_FW_READY
:
350 /* check for FW boot completion */
351 if (!sdev
->boot_complete
) {
352 err
= sof_ops(sdev
)->fw_ready(sdev
, cmd
);
355 * this indicates a mismatch in ABI
356 * between the driver and fw
358 dev_err(sdev
->dev
, "error: ABI mismatch %d\n",
361 /* firmware boot completed OK */
362 sdev
->boot_complete
= true;
365 /* wake up firmware loader */
366 wake_up(&sdev
->boot_wait
);
369 case SOF_IPC_GLB_COMPOUND
:
370 case SOF_IPC_GLB_TPLG_MSG
:
371 case SOF_IPC_GLB_PM_MSG
:
372 case SOF_IPC_GLB_COMP_MSG
:
374 case SOF_IPC_GLB_STREAM_MSG
:
375 /* need to pass msg id into the function */
376 ipc_stream_message(sdev
, hdr
.cmd
);
378 case SOF_IPC_GLB_TRACE_MSG
:
379 ipc_trace_message(sdev
, type
);
382 dev_err(sdev
->dev
, "error: unknown DSP message 0x%x\n", cmd
);
386 ipc_log_header(sdev
->dev
, "ipc rx done", hdr
.cmd
);
388 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx
);
391 * IPC trace mechanism.
394 static void ipc_trace_message(struct snd_sof_dev
*sdev
, u32 msg_id
)
396 struct sof_ipc_dma_trace_posn posn
;
399 case SOF_IPC_TRACE_DMA_POSITION
:
400 /* read back full message */
401 snd_sof_ipc_msg_data(sdev
, NULL
, &posn
, sizeof(posn
));
402 snd_sof_trace_update_pos(sdev
, &posn
);
405 dev_err(sdev
->dev
, "error: unhandled trace message %x\n",
412 * IPC stream position.
415 static void ipc_period_elapsed(struct snd_sof_dev
*sdev
, u32 msg_id
)
417 struct snd_sof_pcm_stream
*stream
;
418 struct sof_ipc_stream_posn posn
;
419 struct snd_sof_pcm
*spcm
;
422 spcm
= snd_sof_find_spcm_comp(sdev
, msg_id
, &direction
);
425 "error: period elapsed for unknown stream, msg_id %d\n",
430 stream
= &spcm
->stream
[direction
];
431 snd_sof_ipc_msg_data(sdev
, stream
->substream
, &posn
, sizeof(posn
));
433 dev_dbg(sdev
->dev
, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
434 posn
.host_posn
, posn
.dai_posn
, posn
.wallclock
);
436 memcpy(&stream
->posn
, &posn
, sizeof(posn
));
438 /* only inform ALSA for period_wakeup mode */
439 if (!stream
->substream
->runtime
->no_period_wakeup
)
440 snd_sof_pcm_period_elapsed(stream
->substream
);
443 /* DSP notifies host of an XRUN within FW */
444 static void ipc_xrun(struct snd_sof_dev
*sdev
, u32 msg_id
)
446 struct snd_sof_pcm_stream
*stream
;
447 struct sof_ipc_stream_posn posn
;
448 struct snd_sof_pcm
*spcm
;
451 spcm
= snd_sof_find_spcm_comp(sdev
, msg_id
, &direction
);
453 dev_err(sdev
->dev
, "error: XRUN for unknown stream, msg_id %d\n",
458 stream
= &spcm
->stream
[direction
];
459 snd_sof_ipc_msg_data(sdev
, stream
->substream
, &posn
, sizeof(posn
));
461 dev_dbg(sdev
->dev
, "posn XRUN: host %llx comp %d size %d\n",
462 posn
.host_posn
, posn
.xrun_comp_id
, posn
.xrun_size
);
464 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
465 /* stop PCM on XRUN - used for pipeline debug */
466 memcpy(&stream
->posn
, &posn
, sizeof(posn
));
467 snd_pcm_stop_xrun(stream
->substream
);
471 /* stream notifications from DSP FW */
472 static void ipc_stream_message(struct snd_sof_dev
*sdev
, u32 msg_cmd
)
474 /* get msg cmd type and msd id */
475 u32 msg_type
= msg_cmd
& SOF_CMD_TYPE_MASK
;
476 u32 msg_id
= SOF_IPC_MESSAGE_ID(msg_cmd
);
479 case SOF_IPC_STREAM_POSITION
:
480 ipc_period_elapsed(sdev
, msg_id
);
482 case SOF_IPC_STREAM_TRIG_XRUN
:
483 ipc_xrun(sdev
, msg_id
);
486 dev_err(sdev
->dev
, "error: unhandled stream message %x\n",
492 /* get stream position IPC - use faster MMIO method if available on platform */
493 int snd_sof_ipc_stream_posn(struct snd_sof_dev
*sdev
,
494 struct snd_sof_pcm
*spcm
, int direction
,
495 struct sof_ipc_stream_posn
*posn
)
497 struct sof_ipc_stream stream
;
500 /* read position via slower IPC */
501 stream
.hdr
.size
= sizeof(stream
);
502 stream
.hdr
.cmd
= SOF_IPC_GLB_STREAM_MSG
| SOF_IPC_STREAM_POSITION
;
503 stream
.comp_id
= spcm
->stream
[direction
].comp_id
;
505 /* send IPC to the DSP */
506 err
= sof_ipc_tx_message(sdev
->ipc
,
507 stream
.hdr
.cmd
, &stream
, sizeof(stream
), &posn
,
510 dev_err(sdev
->dev
, "error: failed to get stream %d position\n",
517 EXPORT_SYMBOL(snd_sof_ipc_stream_posn
);
519 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type
,
520 struct sof_ipc_ctrl_data
*src
,
521 struct sof_ipc_ctrl_data
*dst
,
522 struct sof_ipc_ctrl_data_params
*sparams
)
525 case SOF_CTRL_TYPE_VALUE_CHAN_GET
:
526 case SOF_CTRL_TYPE_VALUE_CHAN_SET
:
527 sparams
->src
= (u8
*)src
->chanv
;
528 sparams
->dst
= (u8
*)dst
->chanv
;
530 case SOF_CTRL_TYPE_VALUE_COMP_GET
:
531 case SOF_CTRL_TYPE_VALUE_COMP_SET
:
532 sparams
->src
= (u8
*)src
->compv
;
533 sparams
->dst
= (u8
*)dst
->compv
;
535 case SOF_CTRL_TYPE_DATA_GET
:
536 case SOF_CTRL_TYPE_DATA_SET
:
537 sparams
->src
= (u8
*)src
->data
->data
;
538 sparams
->dst
= (u8
*)dst
->data
->data
;
544 /* calculate payload size and number of messages */
545 sparams
->pl_size
= SOF_IPC_MSG_MAX_SIZE
- sparams
->hdr_bytes
;
546 sparams
->num_msg
= DIV_ROUND_UP(sparams
->msg_bytes
, sparams
->pl_size
);
551 static int sof_set_get_large_ctrl_data(struct snd_sof_dev
*sdev
,
552 struct sof_ipc_ctrl_data
*cdata
,
553 struct sof_ipc_ctrl_data_params
*sparams
,
556 struct sof_ipc_ctrl_data
*partdata
;
564 /* allocate max ipc size because we have at least one */
565 partdata
= kzalloc(SOF_IPC_MSG_MAX_SIZE
, GFP_KERNEL
);
570 err
= sof_get_ctrl_copy_params(cdata
->type
, cdata
, partdata
,
573 err
= sof_get_ctrl_copy_params(cdata
->type
, partdata
, cdata
,
580 msg_bytes
= sparams
->msg_bytes
;
581 pl_size
= sparams
->pl_size
;
583 /* copy the header data */
584 memcpy(partdata
, cdata
, sparams
->hdr_bytes
);
586 /* Serialise IPC TX */
587 mutex_lock(&sdev
->ipc
->tx_mutex
);
589 /* copy the payload data in a loop */
590 for (i
= 0; i
< sparams
->num_msg
; i
++) {
591 send_bytes
= min(msg_bytes
, pl_size
);
592 partdata
->num_elems
= send_bytes
;
593 partdata
->rhdr
.hdr
.size
= sparams
->hdr_bytes
+ send_bytes
;
594 partdata
->msg_index
= i
;
595 msg_bytes
-= send_bytes
;
596 partdata
->elems_remaining
= msg_bytes
;
599 memcpy(sparams
->dst
, sparams
->src
+ offset
, send_bytes
);
601 err
= sof_ipc_tx_message_unlocked(sdev
->ipc
,
602 partdata
->rhdr
.hdr
.cmd
,
604 partdata
->rhdr
.hdr
.size
,
606 partdata
->rhdr
.hdr
.size
);
611 memcpy(sparams
->dst
+ offset
, sparams
->src
, send_bytes
);
616 mutex_unlock(&sdev
->ipc
->tx_mutex
);
623 * IPC get()/set() for kcontrols.
625 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc
*ipc
,
626 struct snd_sof_control
*scontrol
,
628 enum sof_ipc_ctrl_type ctrl_type
,
629 enum sof_ipc_ctrl_cmd ctrl_cmd
,
632 struct sof_ipc_ctrl_data
*cdata
= scontrol
->control_data
;
633 struct snd_sof_dev
*sdev
= ipc
->sdev
;
634 struct sof_ipc_fw_ready
*ready
= &sdev
->fw_ready
;
635 struct sof_ipc_fw_version
*v
= &ready
->version
;
636 struct sof_ipc_ctrl_data_params sparams
;
640 /* read or write firmware volume */
641 if (scontrol
->readback_offset
!= 0) {
642 /* write/read value header via mmaped region */
643 send_bytes
= sizeof(struct sof_ipc_ctrl_value_chan
) *
646 snd_sof_dsp_block_write(sdev
, sdev
->mmio_bar
,
647 scontrol
->readback_offset
,
648 cdata
->chanv
, send_bytes
);
651 snd_sof_dsp_block_read(sdev
, sdev
->mmio_bar
,
652 scontrol
->readback_offset
,
653 cdata
->chanv
, send_bytes
);
657 cdata
->rhdr
.hdr
.cmd
= SOF_IPC_GLB_COMP_MSG
| ipc_cmd
;
658 cdata
->cmd
= ctrl_cmd
;
659 cdata
->type
= ctrl_type
;
660 cdata
->comp_id
= scontrol
->comp_id
;
661 cdata
->msg_index
= 0;
663 /* calculate header and data size */
664 switch (cdata
->type
) {
665 case SOF_CTRL_TYPE_VALUE_CHAN_GET
:
666 case SOF_CTRL_TYPE_VALUE_CHAN_SET
:
667 sparams
.msg_bytes
= scontrol
->num_channels
*
668 sizeof(struct sof_ipc_ctrl_value_chan
);
669 sparams
.hdr_bytes
= sizeof(struct sof_ipc_ctrl_data
);
670 sparams
.elems
= scontrol
->num_channels
;
672 case SOF_CTRL_TYPE_VALUE_COMP_GET
:
673 case SOF_CTRL_TYPE_VALUE_COMP_SET
:
674 sparams
.msg_bytes
= scontrol
->num_channels
*
675 sizeof(struct sof_ipc_ctrl_value_comp
);
676 sparams
.hdr_bytes
= sizeof(struct sof_ipc_ctrl_data
);
677 sparams
.elems
= scontrol
->num_channels
;
679 case SOF_CTRL_TYPE_DATA_GET
:
680 case SOF_CTRL_TYPE_DATA_SET
:
681 sparams
.msg_bytes
= cdata
->data
->size
;
682 sparams
.hdr_bytes
= sizeof(struct sof_ipc_ctrl_data
) +
683 sizeof(struct sof_abi_hdr
);
684 sparams
.elems
= cdata
->data
->size
;
690 cdata
->rhdr
.hdr
.size
= sparams
.msg_bytes
+ sparams
.hdr_bytes
;
691 cdata
->num_elems
= sparams
.elems
;
692 cdata
->elems_remaining
= 0;
694 /* send normal size ipc in one part */
695 if (cdata
->rhdr
.hdr
.size
<= SOF_IPC_MSG_MAX_SIZE
) {
696 err
= sof_ipc_tx_message(sdev
->ipc
, cdata
->rhdr
.hdr
.cmd
, cdata
,
697 cdata
->rhdr
.hdr
.size
, cdata
,
698 cdata
->rhdr
.hdr
.size
);
701 dev_err(sdev
->dev
, "error: set/get ctrl ipc comp %d\n",
707 /* data is bigger than max ipc size, chop into smaller pieces */
708 dev_dbg(sdev
->dev
, "large ipc size %u, control size %u\n",
709 cdata
->rhdr
.hdr
.size
, scontrol
->size
);
711 /* large messages is only supported from ABI 3.3.0 onwards */
712 if (v
->abi_version
< SOF_ABI_VER(3, 3, 0)) {
713 dev_err(sdev
->dev
, "error: incompatible FW ABI version\n");
717 err
= sof_set_get_large_ctrl_data(sdev
, cdata
, &sparams
, send
);
720 dev_err(sdev
->dev
, "error: set/get large ctrl ipc comp %d\n",
725 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data
);
728 * IPC layer enumeration.
731 int snd_sof_dsp_mailbox_init(struct snd_sof_dev
*sdev
, u32 dspbox
,
732 size_t dspbox_size
, u32 hostbox
,
735 sdev
->dsp_box
.offset
= dspbox
;
736 sdev
->dsp_box
.size
= dspbox_size
;
737 sdev
->host_box
.offset
= hostbox
;
738 sdev
->host_box
.size
= hostbox_size
;
741 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init
);
743 int snd_sof_ipc_valid(struct snd_sof_dev
*sdev
)
745 struct sof_ipc_fw_ready
*ready
= &sdev
->fw_ready
;
746 struct sof_ipc_fw_version
*v
= &ready
->version
;
749 "Firmware info: version %d:%d:%d-%s\n", v
->major
, v
->minor
,
752 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
753 SOF_ABI_VERSION_MAJOR(v
->abi_version
),
754 SOF_ABI_VERSION_MINOR(v
->abi_version
),
755 SOF_ABI_VERSION_PATCH(v
->abi_version
),
756 SOF_ABI_MAJOR
, SOF_ABI_MINOR
, SOF_ABI_PATCH
);
758 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION
, v
->abi_version
)) {
759 dev_err(sdev
->dev
, "error: incompatible FW ABI version\n");
763 if (v
->abi_version
> SOF_ABI_VERSION
) {
764 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS
)) {
765 dev_warn(sdev
->dev
, "warn: FW ABI is more recent than kernel\n");
767 dev_err(sdev
->dev
, "error: FW ABI is more recent than kernel\n");
772 if (ready
->flags
& SOF_IPC_INFO_BUILD
) {
774 "Firmware debug build %d on %s-%s - options:\n"
777 " lock vdebug: %s\n",
778 v
->build
, v
->date
, v
->time
,
779 (ready
->flags
& SOF_IPC_INFO_GDB
) ?
780 "enabled" : "disabled",
781 (ready
->flags
& SOF_IPC_INFO_LOCKS
) ?
782 "enabled" : "disabled",
783 (ready
->flags
& SOF_IPC_INFO_LOCKSV
) ?
784 "enabled" : "disabled");
787 /* copy the fw_version into debugfs at first boot */
788 memcpy(&sdev
->fw_version
, v
, sizeof(*v
));
792 EXPORT_SYMBOL(snd_sof_ipc_valid
);
794 struct snd_sof_ipc
*snd_sof_ipc_init(struct snd_sof_dev
*sdev
)
796 struct snd_sof_ipc
*ipc
;
797 struct snd_sof_ipc_msg
*msg
;
799 /* check if mandatory ops required for ipc are defined */
800 if (!sof_ops(sdev
)->fw_ready
) {
801 dev_err(sdev
->dev
, "error: ipc mandatory ops not defined\n");
805 ipc
= devm_kzalloc(sdev
->dev
, sizeof(*ipc
), GFP_KERNEL
);
809 mutex_init(&ipc
->tx_mutex
);
813 /* indicate that we aren't sending a message ATM */
814 msg
->ipc_complete
= true;
816 /* pre-allocate message data */
817 msg
->msg_data
= devm_kzalloc(sdev
->dev
, SOF_IPC_MSG_MAX_SIZE
,
822 msg
->reply_data
= devm_kzalloc(sdev
->dev
, SOF_IPC_MSG_MAX_SIZE
,
824 if (!msg
->reply_data
)
827 init_waitqueue_head(&msg
->waitq
);
831 EXPORT_SYMBOL(snd_sof_ipc_init
);
833 void snd_sof_ipc_free(struct snd_sof_dev
*sdev
)
835 struct snd_sof_ipc
*ipc
= sdev
->ipc
;
837 /* disable sending of ipc's */
838 mutex_lock(&ipc
->tx_mutex
);
839 ipc
->disable_ipc_tx
= true;
840 mutex_unlock(&ipc
->tx_mutex
);
842 EXPORT_SYMBOL(snd_sof_ipc_free
);