1 /* sunxvr500.c: Sun 3DLABS XVR-500 Expert3D driver for sparc64 systems
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
6 #include <linux/module.h>
7 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/of_device.h>
15 /* XXX This device has a 'dev-comm' property which apparently is
16 * XXX a pointer into the openfirmware's address space which is
17 * XXX a shared area the kernel driver can use to keep OBP
18 * XXX informed about the current resolution setting. The idea
19 * XXX is that the kernel can change resolutions, and as long
20 * XXX as the values in the 'dev-comm' area are accurate then
21 * XXX OBP can still render text properly to the console.
23 * XXX I'm still working out the layout of this and whether there
24 * XXX are any signatures we need to look for etc.
32 char __iomem
*fb_base
;
33 unsigned long fb_base_phys
;
35 unsigned long fb8_buf_diff
;
36 unsigned long regs_base_phys
;
40 struct device_node
*of_node
;
51 u32 pseudo_palette
[16];
54 static int e3d_get_props(struct e3d_info
*ep
)
56 ep
->width
= of_getintprop_default(ep
->of_node
, "width", 0);
57 ep
->height
= of_getintprop_default(ep
->of_node
, "height", 0);
58 ep
->depth
= of_getintprop_default(ep
->of_node
, "depth", 8);
60 if (!ep
->width
|| !ep
->height
) {
61 printk(KERN_ERR
"e3d: Critical properties missing for %s\n",
69 /* My XVR-500 comes up, at 1280x768 and a FB base register value of
70 * 0x04000000, the following video layout register values:
72 * RAMDAC_VID_WH 0x03ff04ff
73 * RAMDAC_VID_CFG 0x1a0b0088
74 * RAMDAC_VID_32FB_0 0x04000000
75 * RAMDAC_VID_32FB_1 0x04800000
76 * RAMDAC_VID_8FB_0 0x05000000
77 * RAMDAC_VID_8FB_1 0x05200000
78 * RAMDAC_VID_XXXFB 0x05400000
79 * RAMDAC_VID_YYYFB 0x05c00000
80 * RAMDAC_VID_ZZZFB 0x05e00000
82 /* Video layout registers */
83 #define RAMDAC_VID_WH 0x00000070UL /* (height-1)<<16 | (width-1) */
84 #define RAMDAC_VID_CFG 0x00000074UL /* 0x1a000088|(linesz_log2<<16) */
85 #define RAMDAC_VID_32FB_0 0x00000078UL /* PCI base 32bpp FB buffer 0 */
86 #define RAMDAC_VID_32FB_1 0x0000007cUL /* PCI base 32bpp FB buffer 1 */
87 #define RAMDAC_VID_8FB_0 0x00000080UL /* PCI base 8bpp FB buffer 0 */
88 #define RAMDAC_VID_8FB_1 0x00000084UL /* PCI base 8bpp FB buffer 1 */
89 #define RAMDAC_VID_XXXFB 0x00000088UL /* PCI base of XXX FB */
90 #define RAMDAC_VID_YYYFB 0x0000008cUL /* PCI base of YYY FB */
91 #define RAMDAC_VID_ZZZFB 0x00000090UL /* PCI base of ZZZ FB */
94 #define RAMDAC_INDEX 0x000000bcUL
95 #define RAMDAC_DATA 0x000000c0UL
97 static void e3d_clut_write(struct e3d_info
*ep
, int index
, u32 val
)
99 void __iomem
*ramdac
= ep
->ramdac
;
102 spin_lock_irqsave(&ep
->lock
, flags
);
104 writel(index
, ramdac
+ RAMDAC_INDEX
);
105 writel(val
, ramdac
+ RAMDAC_DATA
);
107 spin_unlock_irqrestore(&ep
->lock
, flags
);
110 static int e3d_setcolreg(unsigned regno
,
111 unsigned red
, unsigned green
, unsigned blue
,
112 unsigned transp
, struct fb_info
*info
)
114 struct e3d_info
*ep
= info
->par
;
115 u32 red_8
, green_8
, blue_8
;
116 u32 red_10
, green_10
, blue_10
;
123 green_8
= green
>> 8;
126 value
= (blue_8
<< 24) | (green_8
<< 16) | (red_8
<< 8);
128 if (info
->fix
.visual
== FB_VISUAL_TRUECOLOR
&& regno
< 16)
129 ((u32
*)info
->pseudo_palette
)[regno
] = value
;
133 green_10
= green
>> 6;
136 value
= (blue_10
<< 20) | (green_10
<< 10) | (red_10
<< 0);
137 e3d_clut_write(ep
, regno
, value
);
142 /* XXX This is a bit of a hack. I can't figure out exactly how the
143 * XXX two 8bpp areas of the framebuffer work. I imagine there is
144 * XXX a WID attribute somewhere else in the framebuffer which tells
145 * XXX the ramdac which of the two 8bpp framebuffer regions to take
146 * XXX the pixel from. So, for now, render into both regions to make
147 * XXX sure the pixel shows up.
149 static void e3d_imageblit(struct fb_info
*info
, const struct fb_image
*image
)
151 struct e3d_info
*ep
= info
->par
;
154 spin_lock_irqsave(&ep
->lock
, flags
);
155 cfb_imageblit(info
, image
);
156 info
->screen_base
+= ep
->fb8_buf_diff
;
157 cfb_imageblit(info
, image
);
158 info
->screen_base
-= ep
->fb8_buf_diff
;
159 spin_unlock_irqrestore(&ep
->lock
, flags
);
162 static void e3d_fillrect(struct fb_info
*info
, const struct fb_fillrect
*rect
)
164 struct e3d_info
*ep
= info
->par
;
167 spin_lock_irqsave(&ep
->lock
, flags
);
168 cfb_fillrect(info
, rect
);
169 info
->screen_base
+= ep
->fb8_buf_diff
;
170 cfb_fillrect(info
, rect
);
171 info
->screen_base
-= ep
->fb8_buf_diff
;
172 spin_unlock_irqrestore(&ep
->lock
, flags
);
175 static void e3d_copyarea(struct fb_info
*info
, const struct fb_copyarea
*area
)
177 struct e3d_info
*ep
= info
->par
;
180 spin_lock_irqsave(&ep
->lock
, flags
);
181 cfb_copyarea(info
, area
);
182 info
->screen_base
+= ep
->fb8_buf_diff
;
183 cfb_copyarea(info
, area
);
184 info
->screen_base
-= ep
->fb8_buf_diff
;
185 spin_unlock_irqrestore(&ep
->lock
, flags
);
188 static struct fb_ops e3d_ops
= {
189 .owner
= THIS_MODULE
,
190 .fb_setcolreg
= e3d_setcolreg
,
191 .fb_fillrect
= e3d_fillrect
,
192 .fb_copyarea
= e3d_copyarea
,
193 .fb_imageblit
= e3d_imageblit
,
196 static int e3d_set_fbinfo(struct e3d_info
*ep
)
198 struct fb_info
*info
= ep
->info
;
199 struct fb_var_screeninfo
*var
= &info
->var
;
201 info
->flags
= FBINFO_DEFAULT
;
202 info
->fbops
= &e3d_ops
;
203 info
->screen_base
= ep
->fb_base
;
204 info
->screen_size
= ep
->fb_size
;
206 info
->pseudo_palette
= ep
->pseudo_palette
;
208 /* Fill fix common fields */
209 strlcpy(info
->fix
.id
, "e3d", sizeof(info
->fix
.id
));
210 info
->fix
.smem_start
= ep
->fb_base_phys
;
211 info
->fix
.smem_len
= ep
->fb_size
;
212 info
->fix
.type
= FB_TYPE_PACKED_PIXELS
;
213 if (ep
->depth
== 32 || ep
->depth
== 24)
214 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
216 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
218 var
->xres
= ep
->width
;
219 var
->yres
= ep
->height
;
220 var
->xres_virtual
= var
->xres
;
221 var
->yres_virtual
= var
->yres
;
222 var
->bits_per_pixel
= ep
->depth
;
226 var
->green
.offset
= 16;
227 var
->green
.length
= 8;
228 var
->blue
.offset
= 24;
229 var
->blue
.length
= 8;
230 var
->transp
.offset
= 0;
231 var
->transp
.length
= 0;
233 if (fb_alloc_cmap(&info
->cmap
, 256, 0)) {
234 printk(KERN_ERR
"e3d: Cannot allocate color map.\n");
241 static int e3d_pci_register(struct pci_dev
*pdev
,
242 const struct pci_device_id
*ent
)
244 struct device_node
*of_node
;
245 const char *device_type
;
246 struct fb_info
*info
;
248 unsigned int line_length
;
251 of_node
= pci_device_to_OF_node(pdev
);
253 printk(KERN_ERR
"e3d: Cannot find OF node of %s\n",
258 device_type
= of_get_property(of_node
, "device_type", NULL
);
260 printk(KERN_INFO
"e3d: Ignoring secondary output device "
261 "at %s\n", pci_name(pdev
));
265 err
= pci_enable_device(pdev
);
267 printk(KERN_ERR
"e3d: Cannot enable PCI device %s\n",
272 info
= framebuffer_alloc(sizeof(struct e3d_info
), &pdev
->dev
);
274 printk(KERN_ERR
"e3d: Cannot allocate fb_info\n");
282 spin_lock_init(&ep
->lock
);
283 ep
->of_node
= of_node
;
285 /* Read the PCI base register of the frame buffer, which we
286 * need in order to interpret the RAMDAC_VID_*FB* values in
287 * the ramdac correctly.
289 pci_read_config_dword(pdev
, PCI_BASE_ADDRESS_0
,
291 ep
->fb_base_reg
&= PCI_BASE_ADDRESS_MEM_MASK
;
293 ep
->regs_base_phys
= pci_resource_start (pdev
, 1);
294 err
= pci_request_region(pdev
, 1, "e3d regs");
296 printk("e3d: Cannot request region 1 for %s\n",
300 ep
->ramdac
= ioremap(ep
->regs_base_phys
+ 0x8000, 0x1000);
303 goto err_release_pci1
;
306 ep
->fb8_0_off
= readl(ep
->ramdac
+ RAMDAC_VID_8FB_0
);
307 ep
->fb8_0_off
-= ep
->fb_base_reg
;
309 ep
->fb8_1_off
= readl(ep
->ramdac
+ RAMDAC_VID_8FB_1
);
310 ep
->fb8_1_off
-= ep
->fb_base_reg
;
312 ep
->fb8_buf_diff
= ep
->fb8_1_off
- ep
->fb8_0_off
;
314 ep
->fb_base_phys
= pci_resource_start (pdev
, 0);
315 ep
->fb_base_phys
+= ep
->fb8_0_off
;
317 err
= pci_request_region(pdev
, 0, "e3d framebuffer");
319 printk("e3d: Cannot request region 0 for %s\n",
321 goto err_unmap_ramdac
;
324 err
= e3d_get_props(ep
);
326 goto err_release_pci0
;
328 line_length
= (readl(ep
->ramdac
+ RAMDAC_VID_CFG
) >> 16) & 0xff;
329 line_length
= 1 << line_length
;
333 info
->fix
.line_length
= line_length
;
336 info
->fix
.line_length
= line_length
* 2;
339 info
->fix
.line_length
= line_length
* 3;
342 info
->fix
.line_length
= line_length
* 4;
345 ep
->fb_size
= info
->fix
.line_length
* ep
->height
;
347 ep
->fb_base
= ioremap(ep
->fb_base_phys
, ep
->fb_size
);
350 goto err_release_pci0
;
353 err
= e3d_set_fbinfo(ep
);
357 pci_set_drvdata(pdev
, info
);
359 printk("e3d: Found device at %s\n", pci_name(pdev
));
361 err
= register_framebuffer(info
);
363 printk(KERN_ERR
"e3d: Could not register framebuffer %s\n",
371 fb_dealloc_cmap(&info
->cmap
);
374 iounmap(ep
->fb_base
);
377 pci_release_region(pdev
, 0);
383 pci_release_region(pdev
, 1);
386 framebuffer_release(info
);
389 pci_disable_device(pdev
);
395 static void e3d_pci_unregister(struct pci_dev
*pdev
)
397 struct fb_info
*info
= pci_get_drvdata(pdev
);
398 struct e3d_info
*ep
= info
->par
;
400 unregister_framebuffer(info
);
403 iounmap(ep
->fb_base
);
405 pci_release_region(pdev
, 0);
406 pci_release_region(pdev
, 1);
408 fb_dealloc_cmap(&info
->cmap
);
409 framebuffer_release(info
);
411 pci_disable_device(pdev
);
414 static struct pci_device_id e3d_pci_table
[] = {
415 { PCI_DEVICE(PCI_VENDOR_ID_3DLABS
, 0x7a0), },
416 { PCI_DEVICE(0x1091, 0x7a0), },
417 { PCI_DEVICE(PCI_VENDOR_ID_3DLABS
, 0x7a2), },
418 { .vendor
= PCI_VENDOR_ID_3DLABS
,
419 .device
= PCI_ANY_ID
,
420 .subvendor
= PCI_VENDOR_ID_3DLABS
,
423 { .vendor
= PCI_VENDOR_ID_3DLABS
,
424 .device
= PCI_ANY_ID
,
425 .subvendor
= PCI_VENDOR_ID_3DLABS
,
428 { .vendor
= PCI_VENDOR_ID_3DLABS
,
429 .device
= PCI_ANY_ID
,
430 .subvendor
= PCI_VENDOR_ID_3DLABS
,
436 static struct pci_driver e3d_driver
= {
438 .id_table
= e3d_pci_table
,
439 .probe
= e3d_pci_register
,
440 .remove
= e3d_pci_unregister
,
443 static int __init
e3d_init(void)
445 if (fb_get_options("e3d", NULL
))
448 return pci_register_driver(&e3d_driver
);
451 static void __exit
e3d_exit(void)
453 pci_unregister_driver(&e3d_driver
);
456 module_init(e3d_init
);
457 module_exit(e3d_exit
);
459 MODULE_DESCRIPTION("framebuffer driver for Sun XVR-500 graphics");
460 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
461 MODULE_VERSION("1.0");
462 MODULE_LICENSE("GPL");