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[linux/fpc-iii.git] / sound / isa / cs423x / cs4231_lib.c
bloba5eb9659b519ca8003034651654d9bef5bb98af9
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
5 * Bugs:
6 * - sometimes record brokes playback with WSS portion of
7 * Yamaha OPL3-SA3 chip
8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initialization?
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/ioport.h>
34 #include <sound/core.h>
35 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h>
38 #include <asm/io.h>
39 #include <asm/dma.h>
40 #include <asm/irq.h>
42 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
46 #if 0
47 #define SNDRV_DEBUG_MCE
48 #endif
51 * Some variables
54 static unsigned char freq_bits[14] = {
55 /* 5510 */ 0x00 | CS4231_XTAL2,
56 /* 6620 */ 0x0E | CS4231_XTAL2,
57 /* 8000 */ 0x00 | CS4231_XTAL1,
58 /* 9600 */ 0x0E | CS4231_XTAL1,
59 /* 11025 */ 0x02 | CS4231_XTAL2,
60 /* 16000 */ 0x02 | CS4231_XTAL1,
61 /* 18900 */ 0x04 | CS4231_XTAL2,
62 /* 22050 */ 0x06 | CS4231_XTAL2,
63 /* 27042 */ 0x04 | CS4231_XTAL1,
64 /* 32000 */ 0x06 | CS4231_XTAL1,
65 /* 33075 */ 0x0C | CS4231_XTAL2,
66 /* 37800 */ 0x08 | CS4231_XTAL2,
67 /* 44100 */ 0x0A | CS4231_XTAL2,
68 /* 48000 */ 0x0C | CS4231_XTAL1
71 static unsigned int rates[14] = {
72 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73 27042, 32000, 33075, 37800, 44100, 48000
76 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
77 .count = ARRAY_SIZE(rates),
78 .list = rates,
79 .mask = 0,
82 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
84 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
87 static unsigned char snd_cs4231_original_image[32] =
89 0x00, /* 00/00 - lic */
90 0x00, /* 01/01 - ric */
91 0x9f, /* 02/02 - la1ic */
92 0x9f, /* 03/03 - ra1ic */
93 0x9f, /* 04/04 - la2ic */
94 0x9f, /* 05/05 - ra2ic */
95 0xbf, /* 06/06 - loc */
96 0xbf, /* 07/07 - roc */
97 0x20, /* 08/08 - pdfr */
98 CS4231_AUTOCALIB, /* 09/09 - ic */
99 0x00, /* 0a/10 - pc */
100 0x00, /* 0b/11 - ti */
101 CS4231_MODE2, /* 0c/12 - mi */
102 0xfc, /* 0d/13 - lbc */
103 0x00, /* 0e/14 - pbru */
104 0x00, /* 0f/15 - pbrl */
105 0x80, /* 10/16 - afei */
106 0x01, /* 11/17 - afeii */
107 0x9f, /* 12/18 - llic */
108 0x9f, /* 13/19 - rlic */
109 0x00, /* 14/20 - tlb */
110 0x00, /* 15/21 - thb */
111 0x00, /* 16/22 - la3mic/reserved */
112 0x00, /* 17/23 - ra3mic/reserved */
113 0x00, /* 18/24 - afs */
114 0x00, /* 19/25 - lamoc/version */
115 0xcf, /* 1a/26 - mioc */
116 0x00, /* 1b/27 - ramoc/reserved */
117 0x20, /* 1c/28 - cdfr */
118 0x00, /* 1d/29 - res4 */
119 0x00, /* 1e/30 - cbru */
120 0x00, /* 1f/31 - cbrl */
124 * Basic I/O functions
127 static inline void cs4231_outb(struct snd_cs4231 *chip, u8 offset, u8 val)
129 outb(val, chip->port + offset);
132 static inline u8 cs4231_inb(struct snd_cs4231 *chip, u8 offset)
134 return inb(chip->port + offset);
137 static void snd_cs4231_wait(struct snd_cs4231 *chip)
139 int timeout;
141 for (timeout = 250;
142 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
143 timeout--)
144 udelay(100);
147 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
148 unsigned char mask, unsigned char value)
150 unsigned char tmp = (chip->image[reg] & mask) | value;
152 snd_cs4231_wait(chip);
153 #ifdef CONFIG_SND_DEBUG
154 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
155 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
156 #endif
157 chip->image[reg] = tmp;
158 if (!chip->calibrate_mute) {
159 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
160 wmb();
161 cs4231_outb(chip, CS4231P(REG), tmp);
162 mb();
166 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
168 int timeout;
170 for (timeout = 250;
171 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
172 timeout--)
173 udelay(10);
174 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
175 cs4231_outb(chip, CS4231P(REG), value);
176 mb();
179 void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
181 snd_cs4231_wait(chip);
182 #ifdef CONFIG_SND_DEBUG
183 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
184 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
185 #endif
186 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
187 cs4231_outb(chip, CS4231P(REG), value);
188 chip->image[reg] = value;
189 mb();
190 snd_printdd("codec out - reg 0x%x = 0x%x\n",
191 chip->mce_bit | reg, value);
194 unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
196 snd_cs4231_wait(chip);
197 #ifdef CONFIG_SND_DEBUG
198 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
199 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
200 #endif
201 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
202 mb();
203 return cs4231_inb(chip, CS4231P(REG));
206 void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val)
208 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
209 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
210 cs4231_outb(chip, CS4231P(REG), val);
211 chip->eimage[CS4236_REG(reg)] = val;
212 #if 0
213 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
214 #endif
217 unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg)
219 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
220 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
221 #if 1
222 return cs4231_inb(chip, CS4231P(REG));
223 #else
225 unsigned char res;
226 res = cs4231_inb(chip, CS4231P(REG));
227 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
228 return res;
230 #endif
233 #if 0
235 static void snd_cs4231_debug(struct snd_cs4231 *chip)
237 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
238 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
239 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
240 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
241 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
242 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
243 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
244 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
245 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
246 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
247 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
248 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
249 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
250 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
251 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
252 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
253 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
254 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
255 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
256 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
257 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
258 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
259 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
260 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
261 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
262 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
263 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
264 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
265 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
266 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
267 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
268 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
269 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
270 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
273 #endif
276 * CS4231 detection / MCE routines
279 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
281 int timeout;
283 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
284 for (timeout = 5; timeout > 0; timeout--)
285 cs4231_inb(chip, CS4231P(REGSEL));
286 /* end of cleanup sequence */
287 for (timeout = 250;
288 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
289 timeout--)
290 udelay(10);
293 void snd_cs4231_mce_up(struct snd_cs4231 *chip)
295 unsigned long flags;
296 int timeout;
298 snd_cs4231_wait(chip);
299 #ifdef CONFIG_SND_DEBUG
300 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
301 snd_printk("mce_up - auto calibration time out (0)\n");
302 #endif
303 spin_lock_irqsave(&chip->reg_lock, flags);
304 chip->mce_bit |= CS4231_MCE;
305 timeout = cs4231_inb(chip, CS4231P(REGSEL));
306 if (timeout == 0x80)
307 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
308 if (!(timeout & CS4231_MCE))
309 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
310 spin_unlock_irqrestore(&chip->reg_lock, flags);
313 void snd_cs4231_mce_down(struct snd_cs4231 *chip)
315 unsigned long flags;
316 unsigned long end_time;
317 int timeout;
319 snd_cs4231_busy_wait(chip);
321 #ifdef CONFIG_SND_DEBUG
322 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
323 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
324 #endif
325 spin_lock_irqsave(&chip->reg_lock, flags);
326 chip->mce_bit &= ~CS4231_MCE;
327 timeout = cs4231_inb(chip, CS4231P(REGSEL));
328 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
329 spin_unlock_irqrestore(&chip->reg_lock, flags);
330 if (timeout == 0x80)
331 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
332 if ((timeout & CS4231_MCE) == 0 ||
333 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
334 return;
336 snd_cs4231_busy_wait(chip);
339 * Wait for (possible -- during init auto-calibration may not be set)
340 * calibration process to start. Needs upto 5 sample periods on AD1848
341 * which at the slowest possible rate of 5.5125 kHz means 907 us.
343 msleep(1);
345 snd_printdd("(1) jiffies = %lu\n", jiffies);
347 /* check condition up to 250 ms */
348 end_time = jiffies + msecs_to_jiffies(250);
349 while (snd_cs4231_in(chip, CS4231_TEST_INIT) &
350 CS4231_CALIB_IN_PROGRESS) {
352 if (time_after(jiffies, end_time)) {
353 snd_printk(KERN_ERR "mce_down - "
354 "auto calibration time out (2)\n");
355 return;
357 msleep(1);
360 snd_printdd("(2) jiffies = %lu\n", jiffies);
362 /* check condition up to 100 ms */
363 end_time = jiffies + msecs_to_jiffies(100);
364 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
365 if (time_after(jiffies, end_time)) {
366 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
367 return;
369 msleep(1);
372 snd_printdd("(3) jiffies = %lu\n", jiffies);
373 snd_printd("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
376 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
378 switch (format & 0xe0) {
379 case CS4231_LINEAR_16:
380 case CS4231_LINEAR_16_BIG:
381 size >>= 1;
382 break;
383 case CS4231_ADPCM_16:
384 return size >> 2;
386 if (format & CS4231_STEREO)
387 size >>= 1;
388 return size;
391 static int snd_cs4231_trigger(struct snd_pcm_substream *substream,
392 int cmd)
394 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
395 int result = 0;
396 unsigned int what;
397 struct snd_pcm_substream *s;
398 int do_start;
400 #if 0
401 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
402 #endif
404 switch (cmd) {
405 case SNDRV_PCM_TRIGGER_START:
406 case SNDRV_PCM_TRIGGER_RESUME:
407 do_start = 1; break;
408 case SNDRV_PCM_TRIGGER_STOP:
409 case SNDRV_PCM_TRIGGER_SUSPEND:
410 do_start = 0; break;
411 default:
412 return -EINVAL;
415 what = 0;
416 snd_pcm_group_for_each_entry(s, substream) {
417 if (s == chip->playback_substream) {
418 what |= CS4231_PLAYBACK_ENABLE;
419 snd_pcm_trigger_done(s, substream);
420 } else if (s == chip->capture_substream) {
421 what |= CS4231_RECORD_ENABLE;
422 snd_pcm_trigger_done(s, substream);
425 spin_lock(&chip->reg_lock);
426 if (do_start) {
427 chip->image[CS4231_IFACE_CTRL] |= what;
428 if (chip->trigger)
429 chip->trigger(chip, what, 1);
430 } else {
431 chip->image[CS4231_IFACE_CTRL] &= ~what;
432 if (chip->trigger)
433 chip->trigger(chip, what, 0);
435 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
436 spin_unlock(&chip->reg_lock);
437 #if 0
438 snd_cs4231_debug(chip);
439 #endif
440 return result;
444 * CODEC I/O
447 static unsigned char snd_cs4231_get_rate(unsigned int rate)
449 int i;
451 for (i = 0; i < ARRAY_SIZE(rates); i++)
452 if (rate == rates[i])
453 return freq_bits[i];
454 // snd_BUG();
455 return freq_bits[ARRAY_SIZE(rates) - 1];
458 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip,
459 int format,
460 int channels)
462 unsigned char rformat;
464 rformat = CS4231_LINEAR_8;
465 switch (format) {
466 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
467 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
468 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
469 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
470 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
472 if (channels > 1)
473 rformat |= CS4231_STEREO;
474 #if 0
475 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
476 #endif
477 return rformat;
480 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
482 unsigned long flags;
484 mute = mute ? 1 : 0;
485 spin_lock_irqsave(&chip->reg_lock, flags);
486 if (chip->calibrate_mute == mute) {
487 spin_unlock_irqrestore(&chip->reg_lock, flags);
488 return;
490 if (!mute) {
491 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
492 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
493 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
495 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
496 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
497 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
498 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
499 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
500 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
501 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
502 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
503 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
504 if (chip->hardware == CS4231_HW_INTERWAVE) {
505 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
506 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
507 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
508 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
510 chip->calibrate_mute = mute;
511 spin_unlock_irqrestore(&chip->reg_lock, flags);
514 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
515 struct snd_pcm_hw_params *params,
516 unsigned char pdfr)
518 unsigned long flags;
519 int full_calib = 1;
521 mutex_lock(&chip->mce_mutex);
522 snd_cs4231_calibrate_mute(chip, 1);
523 if (chip->hardware == CS4231_HW_CS4231A ||
524 (chip->hardware & CS4231_HW_CS4232_MASK)) {
525 spin_lock_irqsave(&chip->reg_lock, flags);
526 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
527 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
528 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
529 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
530 udelay(100); /* Fixes audible clicks at least on GUS MAX */
531 full_calib = 0;
533 spin_unlock_irqrestore(&chip->reg_lock, flags);
535 if (full_calib) {
536 snd_cs4231_mce_up(chip);
537 spin_lock_irqsave(&chip->reg_lock, flags);
538 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
539 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
540 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
541 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
542 pdfr);
543 } else {
544 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
546 spin_unlock_irqrestore(&chip->reg_lock, flags);
547 if (chip->hardware == CS4231_HW_OPL3SA2)
548 udelay(100); /* this seems to help */
549 snd_cs4231_mce_down(chip);
551 snd_cs4231_calibrate_mute(chip, 0);
552 mutex_unlock(&chip->mce_mutex);
555 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
556 struct snd_pcm_hw_params *params,
557 unsigned char cdfr)
559 unsigned long flags;
560 int full_calib = 1;
562 mutex_lock(&chip->mce_mutex);
563 snd_cs4231_calibrate_mute(chip, 1);
564 if (chip->hardware == CS4231_HW_CS4231A ||
565 (chip->hardware & CS4231_HW_CS4232_MASK)) {
566 spin_lock_irqsave(&chip->reg_lock, flags);
567 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
568 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
569 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
570 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
571 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
572 full_calib = 0;
574 spin_unlock_irqrestore(&chip->reg_lock, flags);
576 if (full_calib) {
577 snd_cs4231_mce_up(chip);
578 spin_lock_irqsave(&chip->reg_lock, flags);
579 if (chip->hardware != CS4231_HW_INTERWAVE) {
580 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
581 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
582 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
583 (cdfr & 0x0f));
584 spin_unlock_irqrestore(&chip->reg_lock, flags);
585 snd_cs4231_mce_down(chip);
586 snd_cs4231_mce_up(chip);
587 spin_lock_irqsave(&chip->reg_lock, flags);
590 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
591 spin_unlock_irqrestore(&chip->reg_lock, flags);
592 snd_cs4231_mce_down(chip);
594 snd_cs4231_calibrate_mute(chip, 0);
595 mutex_unlock(&chip->mce_mutex);
599 * Timer interface
602 static unsigned long snd_cs4231_timer_resolution(struct snd_timer * timer)
604 struct snd_cs4231 *chip = snd_timer_chip(timer);
605 if (chip->hardware & CS4231_HW_CS4236B_MASK)
606 return 14467;
607 else
608 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
611 static int snd_cs4231_timer_start(struct snd_timer * timer)
613 unsigned long flags;
614 unsigned int ticks;
615 struct snd_cs4231 *chip = snd_timer_chip(timer);
616 spin_lock_irqsave(&chip->reg_lock, flags);
617 ticks = timer->sticks;
618 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
619 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
620 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
621 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
622 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
623 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
625 spin_unlock_irqrestore(&chip->reg_lock, flags);
626 return 0;
629 static int snd_cs4231_timer_stop(struct snd_timer * timer)
631 unsigned long flags;
632 struct snd_cs4231 *chip = snd_timer_chip(timer);
633 spin_lock_irqsave(&chip->reg_lock, flags);
634 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
635 spin_unlock_irqrestore(&chip->reg_lock, flags);
636 return 0;
639 static void snd_cs4231_init(struct snd_cs4231 *chip)
641 unsigned long flags;
643 snd_cs4231_mce_down(chip);
645 #ifdef SNDRV_DEBUG_MCE
646 snd_printk("init: (1)\n");
647 #endif
648 snd_cs4231_mce_up(chip);
649 spin_lock_irqsave(&chip->reg_lock, flags);
650 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
651 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
652 CS4231_CALIB_MODE);
653 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
654 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
655 spin_unlock_irqrestore(&chip->reg_lock, flags);
656 snd_cs4231_mce_down(chip);
658 #ifdef SNDRV_DEBUG_MCE
659 snd_printk("init: (2)\n");
660 #endif
662 snd_cs4231_mce_up(chip);
663 spin_lock_irqsave(&chip->reg_lock, flags);
664 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
665 spin_unlock_irqrestore(&chip->reg_lock, flags);
666 snd_cs4231_mce_down(chip);
668 #ifdef SNDRV_DEBUG_MCE
669 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
670 #endif
672 spin_lock_irqsave(&chip->reg_lock, flags);
673 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
674 spin_unlock_irqrestore(&chip->reg_lock, flags);
676 snd_cs4231_mce_up(chip);
677 spin_lock_irqsave(&chip->reg_lock, flags);
678 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
679 spin_unlock_irqrestore(&chip->reg_lock, flags);
680 snd_cs4231_mce_down(chip);
682 #ifdef SNDRV_DEBUG_MCE
683 snd_printk("init: (4)\n");
684 #endif
686 snd_cs4231_mce_up(chip);
687 spin_lock_irqsave(&chip->reg_lock, flags);
688 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
689 spin_unlock_irqrestore(&chip->reg_lock, flags);
690 snd_cs4231_mce_down(chip);
692 #ifdef SNDRV_DEBUG_MCE
693 snd_printk("init: (5)\n");
694 #endif
697 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
699 unsigned long flags;
701 mutex_lock(&chip->open_mutex);
702 if ((chip->mode & mode) ||
703 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
704 mutex_unlock(&chip->open_mutex);
705 return -EAGAIN;
707 if (chip->mode & CS4231_MODE_OPEN) {
708 chip->mode |= mode;
709 mutex_unlock(&chip->open_mutex);
710 return 0;
712 /* ok. now enable and ack CODEC IRQ */
713 spin_lock_irqsave(&chip->reg_lock, flags);
714 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
715 CS4231_RECORD_IRQ |
716 CS4231_TIMER_IRQ);
717 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
718 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
719 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
720 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
721 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
722 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
723 CS4231_RECORD_IRQ |
724 CS4231_TIMER_IRQ);
725 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
726 spin_unlock_irqrestore(&chip->reg_lock, flags);
728 chip->mode = mode;
729 mutex_unlock(&chip->open_mutex);
730 return 0;
733 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
735 unsigned long flags;
737 mutex_lock(&chip->open_mutex);
738 chip->mode &= ~mode;
739 if (chip->mode & CS4231_MODE_OPEN) {
740 mutex_unlock(&chip->open_mutex);
741 return;
743 snd_cs4231_calibrate_mute(chip, 1);
745 /* disable IRQ */
746 spin_lock_irqsave(&chip->reg_lock, flags);
747 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
748 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
749 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
750 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
751 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
753 /* now disable record & playback */
755 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
756 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
757 spin_unlock_irqrestore(&chip->reg_lock, flags);
758 snd_cs4231_mce_up(chip);
759 spin_lock_irqsave(&chip->reg_lock, flags);
760 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
761 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
762 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
763 spin_unlock_irqrestore(&chip->reg_lock, flags);
764 snd_cs4231_mce_down(chip);
765 spin_lock_irqsave(&chip->reg_lock, flags);
768 /* clear IRQ again */
769 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
770 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
771 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
772 spin_unlock_irqrestore(&chip->reg_lock, flags);
774 snd_cs4231_calibrate_mute(chip, 0);
776 chip->mode = 0;
777 mutex_unlock(&chip->open_mutex);
781 * timer open/close
784 static int snd_cs4231_timer_open(struct snd_timer * timer)
786 struct snd_cs4231 *chip = snd_timer_chip(timer);
787 snd_cs4231_open(chip, CS4231_MODE_TIMER);
788 return 0;
791 static int snd_cs4231_timer_close(struct snd_timer * timer)
793 struct snd_cs4231 *chip = snd_timer_chip(timer);
794 snd_cs4231_close(chip, CS4231_MODE_TIMER);
795 return 0;
798 static struct snd_timer_hardware snd_cs4231_timer_table =
800 .flags = SNDRV_TIMER_HW_AUTO,
801 .resolution = 9945,
802 .ticks = 65535,
803 .open = snd_cs4231_timer_open,
804 .close = snd_cs4231_timer_close,
805 .c_resolution = snd_cs4231_timer_resolution,
806 .start = snd_cs4231_timer_start,
807 .stop = snd_cs4231_timer_stop,
811 * ok.. exported functions..
814 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
815 struct snd_pcm_hw_params *hw_params)
817 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
818 unsigned char new_pdfr;
819 int err;
821 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
822 return err;
823 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
824 snd_cs4231_get_rate(params_rate(hw_params));
825 chip->set_playback_format(chip, hw_params, new_pdfr);
826 return 0;
829 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
831 return snd_pcm_lib_free_pages(substream);
834 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
836 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
837 struct snd_pcm_runtime *runtime = substream->runtime;
838 unsigned long flags;
839 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
840 unsigned int count = snd_pcm_lib_period_bytes(substream);
842 spin_lock_irqsave(&chip->reg_lock, flags);
843 chip->p_dma_size = size;
844 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
845 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
846 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
847 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
848 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
849 spin_unlock_irqrestore(&chip->reg_lock, flags);
850 #if 0
851 snd_cs4231_debug(chip);
852 #endif
853 return 0;
856 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
857 struct snd_pcm_hw_params *hw_params)
859 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
860 unsigned char new_cdfr;
861 int err;
863 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
864 return err;
865 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
866 snd_cs4231_get_rate(params_rate(hw_params));
867 chip->set_capture_format(chip, hw_params, new_cdfr);
868 return 0;
871 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
873 return snd_pcm_lib_free_pages(substream);
876 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
878 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
879 struct snd_pcm_runtime *runtime = substream->runtime;
880 unsigned long flags;
881 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
882 unsigned int count = snd_pcm_lib_period_bytes(substream);
884 spin_lock_irqsave(&chip->reg_lock, flags);
885 chip->c_dma_size = size;
886 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
887 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
888 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
889 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
890 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
891 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
892 } else {
893 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
894 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
896 spin_unlock_irqrestore(&chip->reg_lock, flags);
897 return 0;
900 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
902 unsigned long flags;
903 unsigned char res;
905 spin_lock_irqsave(&chip->reg_lock, flags);
906 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
907 spin_unlock_irqrestore(&chip->reg_lock, flags);
908 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
909 chip->capture_substream->runtime->overrange++;
912 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id)
914 struct snd_cs4231 *chip = dev_id;
915 unsigned char status;
917 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
918 if (status & CS4231_TIMER_IRQ) {
919 if (chip->timer)
920 snd_timer_interrupt(chip->timer, chip->timer->sticks);
922 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
923 if (status & CS4231_PLAYBACK_IRQ) {
924 if (chip->mode & CS4231_MODE_PLAY) {
925 if (chip->playback_substream)
926 snd_pcm_period_elapsed(chip->playback_substream);
928 if (chip->mode & CS4231_MODE_RECORD) {
929 if (chip->capture_substream) {
930 snd_cs4231_overrange(chip);
931 snd_pcm_period_elapsed(chip->capture_substream);
935 } else {
936 if (status & CS4231_PLAYBACK_IRQ) {
937 if (chip->playback_substream)
938 snd_pcm_period_elapsed(chip->playback_substream);
940 if (status & CS4231_RECORD_IRQ) {
941 if (chip->capture_substream) {
942 snd_cs4231_overrange(chip);
943 snd_pcm_period_elapsed(chip->capture_substream);
948 spin_lock(&chip->reg_lock);
949 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
950 spin_unlock(&chip->reg_lock);
951 return IRQ_HANDLED;
954 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
956 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
957 size_t ptr;
959 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
960 return 0;
961 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
962 return bytes_to_frames(substream->runtime, ptr);
965 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
967 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
968 size_t ptr;
970 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
971 return 0;
972 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
973 return bytes_to_frames(substream->runtime, ptr);
980 static int snd_cs4231_probe(struct snd_cs4231 *chip)
982 unsigned long flags;
983 int i, id, rev;
984 unsigned char *ptr;
985 unsigned int hw;
987 #if 0
988 snd_cs4231_debug(chip);
989 #endif
990 id = 0;
991 for (i = 0; i < 50; i++) {
992 mb();
993 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
994 udelay(2000);
995 else {
996 spin_lock_irqsave(&chip->reg_lock, flags);
997 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
998 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
999 spin_unlock_irqrestore(&chip->reg_lock, flags);
1000 if (id == 0x0a)
1001 break; /* this is valid value */
1004 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1005 if (id != 0x0a)
1006 return -ENODEV; /* no valid device found */
1008 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1009 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1010 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1011 if (rev == 0x80) {
1012 unsigned char tmp = snd_cs4231_in(chip, 23);
1013 snd_cs4231_out(chip, 23, ~tmp);
1014 if (snd_cs4231_in(chip, 23) != tmp)
1015 chip->hardware = CS4231_HW_AD1845;
1016 else
1017 chip->hardware = CS4231_HW_CS4231;
1018 } else if (rev == 0xa0) {
1019 chip->hardware = CS4231_HW_CS4231A;
1020 } else if (rev == 0xa2) {
1021 chip->hardware = CS4231_HW_CS4232;
1022 } else if (rev == 0xb2) {
1023 chip->hardware = CS4231_HW_CS4232A;
1024 } else if (rev == 0x83) {
1025 chip->hardware = CS4231_HW_CS4236;
1026 } else if (rev == 0x03) {
1027 chip->hardware = CS4231_HW_CS4236B;
1028 } else {
1029 snd_printk("unknown CS chip with version 0x%x\n", rev);
1030 return -ENODEV; /* unknown CS4231 chip? */
1033 spin_lock_irqsave(&chip->reg_lock, flags);
1034 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1035 cs4231_outb(chip, CS4231P(STATUS), 0);
1036 mb();
1037 spin_unlock_irqrestore(&chip->reg_lock, flags);
1039 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1040 switch (chip->hardware) {
1041 case CS4231_HW_INTERWAVE:
1042 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1043 break;
1044 case CS4231_HW_CS4235:
1045 case CS4231_HW_CS4236B:
1046 case CS4231_HW_CS4237B:
1047 case CS4231_HW_CS4238B:
1048 case CS4231_HW_CS4239:
1049 if (hw == CS4231_HW_DETECT3)
1050 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1051 else
1052 chip->hardware = CS4231_HW_CS4236;
1053 break;
1056 chip->image[CS4231_IFACE_CTRL] =
1057 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1058 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1059 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1060 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1061 ptr = (unsigned char *) &chip->image;
1062 snd_cs4231_mce_down(chip);
1063 spin_lock_irqsave(&chip->reg_lock, flags);
1064 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1065 snd_cs4231_out(chip, i, *ptr++);
1066 spin_unlock_irqrestore(&chip->reg_lock, flags);
1067 snd_cs4231_mce_up(chip);
1068 snd_cs4231_mce_down(chip);
1070 mdelay(2);
1072 /* ok.. try check hardware version for CS4236+ chips */
1073 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1074 if (chip->hardware == CS4231_HW_CS4236B) {
1075 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1076 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1077 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1078 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1079 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1080 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1081 chip->hardware = CS4231_HW_CS4235;
1082 switch (id >> 5) {
1083 case 4:
1084 case 5:
1085 case 6:
1086 break;
1087 default:
1088 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1090 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1091 switch (id >> 5) {
1092 case 4:
1093 case 5:
1094 case 6:
1095 case 7:
1096 chip->hardware = CS4231_HW_CS4236B;
1097 break;
1098 default:
1099 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1101 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1102 chip->hardware = CS4231_HW_CS4237B;
1103 switch (id >> 5) {
1104 case 4:
1105 case 5:
1106 case 6:
1107 case 7:
1108 break;
1109 default:
1110 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1112 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1113 chip->hardware = CS4231_HW_CS4238B;
1114 switch (id >> 5) {
1115 case 5:
1116 case 6:
1117 case 7:
1118 break;
1119 default:
1120 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1122 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1123 chip->hardware = CS4231_HW_CS4239;
1124 switch (id >> 5) {
1125 case 4:
1126 case 5:
1127 case 6:
1128 break;
1129 default:
1130 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1132 } else {
1133 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1137 return 0; /* all things are ok.. */
1144 static struct snd_pcm_hardware snd_cs4231_playback =
1146 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1147 SNDRV_PCM_INFO_MMAP_VALID |
1148 SNDRV_PCM_INFO_RESUME |
1149 SNDRV_PCM_INFO_SYNC_START),
1150 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1151 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1152 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1153 .rate_min = 5510,
1154 .rate_max = 48000,
1155 .channels_min = 1,
1156 .channels_max = 2,
1157 .buffer_bytes_max = (128*1024),
1158 .period_bytes_min = 64,
1159 .period_bytes_max = (128*1024),
1160 .periods_min = 1,
1161 .periods_max = 1024,
1162 .fifo_size = 0,
1165 static struct snd_pcm_hardware snd_cs4231_capture =
1167 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1168 SNDRV_PCM_INFO_MMAP_VALID |
1169 SNDRV_PCM_INFO_RESUME |
1170 SNDRV_PCM_INFO_SYNC_START),
1171 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1172 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1173 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1174 .rate_min = 5510,
1175 .rate_max = 48000,
1176 .channels_min = 1,
1177 .channels_max = 2,
1178 .buffer_bytes_max = (128*1024),
1179 .period_bytes_min = 64,
1180 .period_bytes_max = (128*1024),
1181 .periods_min = 1,
1182 .periods_max = 1024,
1183 .fifo_size = 0,
1190 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1192 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1193 struct snd_pcm_runtime *runtime = substream->runtime;
1194 int err;
1196 runtime->hw = snd_cs4231_playback;
1198 /* hardware bug in InterWave chipset */
1199 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1200 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1202 /* hardware limitation of cheap chips */
1203 if (chip->hardware == CS4231_HW_CS4235 ||
1204 chip->hardware == CS4231_HW_CS4239)
1205 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1207 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1208 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1210 if (chip->claim_dma) {
1211 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1212 return err;
1215 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1216 if (chip->release_dma)
1217 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1218 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1219 return err;
1221 chip->playback_substream = substream;
1222 snd_pcm_set_sync(substream);
1223 chip->rate_constraint(runtime);
1224 return 0;
1227 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1229 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1230 struct snd_pcm_runtime *runtime = substream->runtime;
1231 int err;
1233 runtime->hw = snd_cs4231_capture;
1235 /* hardware limitation of cheap chips */
1236 if (chip->hardware == CS4231_HW_CS4235 ||
1237 chip->hardware == CS4231_HW_CS4239)
1238 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1240 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1241 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1243 if (chip->claim_dma) {
1244 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1245 return err;
1248 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1249 if (chip->release_dma)
1250 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1251 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1252 return err;
1254 chip->capture_substream = substream;
1255 snd_pcm_set_sync(substream);
1256 chip->rate_constraint(runtime);
1257 return 0;
1260 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1262 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1264 chip->playback_substream = NULL;
1265 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1266 return 0;
1269 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1271 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1273 chip->capture_substream = NULL;
1274 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1275 return 0;
1278 #ifdef CONFIG_PM
1280 /* lowlevel suspend callback for CS4231 */
1281 static void snd_cs4231_suspend(struct snd_cs4231 *chip)
1283 int reg;
1284 unsigned long flags;
1286 snd_pcm_suspend_all(chip->pcm);
1287 spin_lock_irqsave(&chip->reg_lock, flags);
1288 for (reg = 0; reg < 32; reg++)
1289 chip->image[reg] = snd_cs4231_in(chip, reg);
1290 spin_unlock_irqrestore(&chip->reg_lock, flags);
1293 /* lowlevel resume callback for CS4231 */
1294 static void snd_cs4231_resume(struct snd_cs4231 *chip)
1296 int reg;
1297 unsigned long flags;
1298 /* int timeout; */
1300 snd_cs4231_mce_up(chip);
1301 spin_lock_irqsave(&chip->reg_lock, flags);
1302 for (reg = 0; reg < 32; reg++) {
1303 switch (reg) {
1304 case CS4231_VERSION:
1305 break;
1306 default:
1307 snd_cs4231_out(chip, reg, chip->image[reg]);
1308 break;
1311 spin_unlock_irqrestore(&chip->reg_lock, flags);
1312 #if 1
1313 snd_cs4231_mce_down(chip);
1314 #else
1315 /* The following is a workaround to avoid freeze after resume on TP600E.
1316 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1317 include rescheduling. -- iwai
1319 snd_cs4231_busy_wait(chip);
1320 spin_lock_irqsave(&chip->reg_lock, flags);
1321 chip->mce_bit &= ~CS4231_MCE;
1322 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1323 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1324 spin_unlock_irqrestore(&chip->reg_lock, flags);
1325 if (timeout == 0x80)
1326 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1327 if ((timeout & CS4231_MCE) == 0 ||
1328 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1329 return;
1331 snd_cs4231_busy_wait(chip);
1332 #endif
1334 #endif /* CONFIG_PM */
1336 static int snd_cs4231_free(struct snd_cs4231 *chip)
1338 release_and_free_resource(chip->res_port);
1339 release_and_free_resource(chip->res_cport);
1340 if (chip->irq >= 0) {
1341 disable_irq(chip->irq);
1342 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1343 free_irq(chip->irq, (void *) chip);
1345 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1346 snd_dma_disable(chip->dma1);
1347 free_dma(chip->dma1);
1349 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1350 snd_dma_disable(chip->dma2);
1351 free_dma(chip->dma2);
1353 if (chip->timer)
1354 snd_device_free(chip->card, chip->timer);
1355 kfree(chip);
1356 return 0;
1359 static int snd_cs4231_dev_free(struct snd_device *device)
1361 struct snd_cs4231 *chip = device->device_data;
1362 return snd_cs4231_free(chip);
1365 const char *snd_cs4231_chip_id(struct snd_cs4231 *chip)
1367 switch (chip->hardware) {
1368 case CS4231_HW_CS4231: return "CS4231";
1369 case CS4231_HW_CS4231A: return "CS4231A";
1370 case CS4231_HW_CS4232: return "CS4232";
1371 case CS4231_HW_CS4232A: return "CS4232A";
1372 case CS4231_HW_CS4235: return "CS4235";
1373 case CS4231_HW_CS4236: return "CS4236";
1374 case CS4231_HW_CS4236B: return "CS4236B";
1375 case CS4231_HW_CS4237B: return "CS4237B";
1376 case CS4231_HW_CS4238B: return "CS4238B";
1377 case CS4231_HW_CS4239: return "CS4239";
1378 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1379 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1380 case CS4231_HW_AD1845: return "AD1845";
1381 default: return "???";
1385 static int snd_cs4231_new(struct snd_card *card,
1386 unsigned short hardware,
1387 unsigned short hwshare,
1388 struct snd_cs4231 ** rchip)
1390 struct snd_cs4231 *chip;
1392 *rchip = NULL;
1393 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1394 if (chip == NULL)
1395 return -ENOMEM;
1396 chip->hardware = hardware;
1397 chip->hwshare = hwshare;
1399 spin_lock_init(&chip->reg_lock);
1400 mutex_init(&chip->mce_mutex);
1401 mutex_init(&chip->open_mutex);
1402 chip->card = card;
1403 chip->rate_constraint = snd_cs4231_xrate;
1404 chip->set_playback_format = snd_cs4231_playback_format;
1405 chip->set_capture_format = snd_cs4231_capture_format;
1406 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1408 *rchip = chip;
1409 return 0;
1412 int snd_cs4231_create(struct snd_card *card,
1413 unsigned long port,
1414 unsigned long cport,
1415 int irq, int dma1, int dma2,
1416 unsigned short hardware,
1417 unsigned short hwshare,
1418 struct snd_cs4231 ** rchip)
1420 static struct snd_device_ops ops = {
1421 .dev_free = snd_cs4231_dev_free,
1423 struct snd_cs4231 *chip;
1424 int err;
1426 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1427 if (err < 0)
1428 return err;
1430 chip->irq = -1;
1431 chip->dma1 = -1;
1432 chip->dma2 = -1;
1434 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1435 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1436 snd_cs4231_free(chip);
1437 return -EBUSY;
1439 chip->port = port;
1440 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1441 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1442 snd_cs4231_free(chip);
1443 return -ENODEV;
1445 chip->cport = cport;
1446 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, IRQF_DISABLED, "CS4231", (void *) chip)) {
1447 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1448 snd_cs4231_free(chip);
1449 return -EBUSY;
1451 chip->irq = irq;
1452 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1453 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1454 snd_cs4231_free(chip);
1455 return -EBUSY;
1457 chip->dma1 = dma1;
1458 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1459 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1460 snd_cs4231_free(chip);
1461 return -EBUSY;
1463 if (dma1 == dma2 || dma2 < 0) {
1464 chip->single_dma = 1;
1465 chip->dma2 = chip->dma1;
1466 } else
1467 chip->dma2 = dma2;
1469 /* global setup */
1470 if (snd_cs4231_probe(chip) < 0) {
1471 snd_cs4231_free(chip);
1472 return -ENODEV;
1474 snd_cs4231_init(chip);
1476 #if 0
1477 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1478 if (chip->res_cport == NULL)
1479 snd_printk("CS4232 control port features are not accessible\n");
1481 #endif
1483 /* Register device */
1484 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1485 snd_cs4231_free(chip);
1486 return err;
1489 #ifdef CONFIG_PM
1490 /* Power Management */
1491 chip->suspend = snd_cs4231_suspend;
1492 chip->resume = snd_cs4231_resume;
1493 #endif
1495 *rchip = chip;
1496 return 0;
1499 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1500 .open = snd_cs4231_playback_open,
1501 .close = snd_cs4231_playback_close,
1502 .ioctl = snd_pcm_lib_ioctl,
1503 .hw_params = snd_cs4231_playback_hw_params,
1504 .hw_free = snd_cs4231_playback_hw_free,
1505 .prepare = snd_cs4231_playback_prepare,
1506 .trigger = snd_cs4231_trigger,
1507 .pointer = snd_cs4231_playback_pointer,
1510 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1511 .open = snd_cs4231_capture_open,
1512 .close = snd_cs4231_capture_close,
1513 .ioctl = snd_pcm_lib_ioctl,
1514 .hw_params = snd_cs4231_capture_hw_params,
1515 .hw_free = snd_cs4231_capture_hw_free,
1516 .prepare = snd_cs4231_capture_prepare,
1517 .trigger = snd_cs4231_trigger,
1518 .pointer = snd_cs4231_capture_pointer,
1521 int snd_cs4231_pcm(struct snd_cs4231 *chip, int device, struct snd_pcm **rpcm)
1523 struct snd_pcm *pcm;
1524 int err;
1526 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1527 return err;
1529 spin_lock_init(&chip->reg_lock);
1530 mutex_init(&chip->mce_mutex);
1531 mutex_init(&chip->open_mutex);
1533 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1534 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1536 /* global setup */
1537 pcm->private_data = chip;
1538 pcm->info_flags = 0;
1539 if (chip->single_dma)
1540 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1541 if (chip->hardware != CS4231_HW_INTERWAVE)
1542 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1543 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1545 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1546 snd_dma_isa_data(),
1547 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1549 chip->pcm = pcm;
1550 if (rpcm)
1551 *rpcm = pcm;
1552 return 0;
1555 static void snd_cs4231_timer_free(struct snd_timer *timer)
1557 struct snd_cs4231 *chip = timer->private_data;
1558 chip->timer = NULL;
1561 int snd_cs4231_timer(struct snd_cs4231 *chip, int device, struct snd_timer **rtimer)
1563 struct snd_timer *timer;
1564 struct snd_timer_id tid;
1565 int err;
1567 /* Timer initialization */
1568 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1569 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1570 tid.card = chip->card->number;
1571 tid.device = device;
1572 tid.subdevice = 0;
1573 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1574 return err;
1575 strcpy(timer->name, snd_cs4231_chip_id(chip));
1576 timer->private_data = chip;
1577 timer->private_free = snd_cs4231_timer_free;
1578 timer->hw = snd_cs4231_timer_table;
1579 chip->timer = timer;
1580 if (rtimer)
1581 *rtimer = timer;
1582 return 0;
1586 * MIXER part
1589 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1591 static char *texts[4] = {
1592 "Line", "Aux", "Mic", "Mix"
1594 static char *opl3sa_texts[4] = {
1595 "Line", "CD", "Mic", "Mix"
1597 static char *gusmax_texts[4] = {
1598 "Line", "Synth", "Mic", "Mix"
1600 char **ptexts = texts;
1601 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1603 snd_assert(chip->card != NULL, return -EINVAL);
1604 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1605 uinfo->count = 2;
1606 uinfo->value.enumerated.items = 4;
1607 if (uinfo->value.enumerated.item > 3)
1608 uinfo->value.enumerated.item = 3;
1609 if (!strcmp(chip->card->driver, "GUS MAX"))
1610 ptexts = gusmax_texts;
1611 switch (chip->hardware) {
1612 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1613 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1615 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1616 return 0;
1619 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1621 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1622 unsigned long flags;
1624 spin_lock_irqsave(&chip->reg_lock, flags);
1625 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1626 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1627 spin_unlock_irqrestore(&chip->reg_lock, flags);
1628 return 0;
1631 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1633 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1634 unsigned long flags;
1635 unsigned short left, right;
1636 int change;
1638 if (ucontrol->value.enumerated.item[0] > 3 ||
1639 ucontrol->value.enumerated.item[1] > 3)
1640 return -EINVAL;
1641 left = ucontrol->value.enumerated.item[0] << 6;
1642 right = ucontrol->value.enumerated.item[1] << 6;
1643 spin_lock_irqsave(&chip->reg_lock, flags);
1644 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1645 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1646 change = left != chip->image[CS4231_LEFT_INPUT] ||
1647 right != chip->image[CS4231_RIGHT_INPUT];
1648 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1649 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1650 spin_unlock_irqrestore(&chip->reg_lock, flags);
1651 return change;
1654 int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1656 int mask = (kcontrol->private_value >> 16) & 0xff;
1658 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1659 uinfo->count = 1;
1660 uinfo->value.integer.min = 0;
1661 uinfo->value.integer.max = mask;
1662 return 0;
1665 int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1667 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1668 unsigned long flags;
1669 int reg = kcontrol->private_value & 0xff;
1670 int shift = (kcontrol->private_value >> 8) & 0xff;
1671 int mask = (kcontrol->private_value >> 16) & 0xff;
1672 int invert = (kcontrol->private_value >> 24) & 0xff;
1674 spin_lock_irqsave(&chip->reg_lock, flags);
1675 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1676 spin_unlock_irqrestore(&chip->reg_lock, flags);
1677 if (invert)
1678 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1679 return 0;
1682 int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1684 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1685 unsigned long flags;
1686 int reg = kcontrol->private_value & 0xff;
1687 int shift = (kcontrol->private_value >> 8) & 0xff;
1688 int mask = (kcontrol->private_value >> 16) & 0xff;
1689 int invert = (kcontrol->private_value >> 24) & 0xff;
1690 int change;
1691 unsigned short val;
1693 val = (ucontrol->value.integer.value[0] & mask);
1694 if (invert)
1695 val = mask - val;
1696 val <<= shift;
1697 spin_lock_irqsave(&chip->reg_lock, flags);
1698 val = (chip->image[reg] & ~(mask << shift)) | val;
1699 change = val != chip->image[reg];
1700 snd_cs4231_out(chip, reg, val);
1701 spin_unlock_irqrestore(&chip->reg_lock, flags);
1702 return change;
1705 int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1707 int mask = (kcontrol->private_value >> 24) & 0xff;
1709 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1710 uinfo->count = 2;
1711 uinfo->value.integer.min = 0;
1712 uinfo->value.integer.max = mask;
1713 return 0;
1716 int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1718 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1719 unsigned long flags;
1720 int left_reg = kcontrol->private_value & 0xff;
1721 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1722 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1723 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1724 int mask = (kcontrol->private_value >> 24) & 0xff;
1725 int invert = (kcontrol->private_value >> 22) & 1;
1727 spin_lock_irqsave(&chip->reg_lock, flags);
1728 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1729 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1730 spin_unlock_irqrestore(&chip->reg_lock, flags);
1731 if (invert) {
1732 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1733 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1735 return 0;
1738 int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1740 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1741 unsigned long flags;
1742 int left_reg = kcontrol->private_value & 0xff;
1743 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1744 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1745 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1746 int mask = (kcontrol->private_value >> 24) & 0xff;
1747 int invert = (kcontrol->private_value >> 22) & 1;
1748 int change;
1749 unsigned short val1, val2;
1751 val1 = ucontrol->value.integer.value[0] & mask;
1752 val2 = ucontrol->value.integer.value[1] & mask;
1753 if (invert) {
1754 val1 = mask - val1;
1755 val2 = mask - val2;
1757 val1 <<= shift_left;
1758 val2 <<= shift_right;
1759 spin_lock_irqsave(&chip->reg_lock, flags);
1760 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1761 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1762 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1763 snd_cs4231_out(chip, left_reg, val1);
1764 snd_cs4231_out(chip, right_reg, val2);
1765 spin_unlock_irqrestore(&chip->reg_lock, flags);
1766 return change;
1769 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1770 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1771 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1772 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1773 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1774 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1775 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1776 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1777 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1778 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1779 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1780 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1781 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1782 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1784 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1785 .name = "Capture Source",
1786 .info = snd_cs4231_info_mux,
1787 .get = snd_cs4231_get_mux,
1788 .put = snd_cs4231_put_mux,
1790 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1791 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1792 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1795 int snd_cs4231_mixer(struct snd_cs4231 *chip)
1797 struct snd_card *card;
1798 unsigned int idx;
1799 int err;
1801 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1803 card = chip->card;
1805 strcpy(card->mixername, chip->pcm->name);
1807 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1808 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1809 return err;
1811 return 0;
1814 EXPORT_SYMBOL(snd_cs4231_out);
1815 EXPORT_SYMBOL(snd_cs4231_in);
1816 EXPORT_SYMBOL(snd_cs4236_ext_out);
1817 EXPORT_SYMBOL(snd_cs4236_ext_in);
1818 EXPORT_SYMBOL(snd_cs4231_mce_up);
1819 EXPORT_SYMBOL(snd_cs4231_mce_down);
1820 EXPORT_SYMBOL(snd_cs4231_interrupt);
1821 EXPORT_SYMBOL(snd_cs4231_chip_id);
1822 EXPORT_SYMBOL(snd_cs4231_create);
1823 EXPORT_SYMBOL(snd_cs4231_pcm);
1824 EXPORT_SYMBOL(snd_cs4231_mixer);
1825 EXPORT_SYMBOL(snd_cs4231_timer);
1826 EXPORT_SYMBOL(snd_cs4231_info_single);
1827 EXPORT_SYMBOL(snd_cs4231_get_single);
1828 EXPORT_SYMBOL(snd_cs4231_put_single);
1829 EXPORT_SYMBOL(snd_cs4231_info_double);
1830 EXPORT_SYMBOL(snd_cs4231_get_double);
1831 EXPORT_SYMBOL(snd_cs4231_put_double);
1834 * INIT part
1837 static int __init alsa_cs4231_init(void)
1839 return 0;
1842 static void __exit alsa_cs4231_exit(void)
1846 module_init(alsa_cs4231_init)
1847 module_exit(alsa_cs4231_exit)