2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <sound/driver.h>
37 #include <linux/delay.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
54 #define HANA_FILENAME "emu/hana.fw"
55 #define DOCK_FILENAME "emu/audio_dock.fw"
56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60 MODULE_FIRMWARE(HANA_FILENAME
);
61 MODULE_FIRMWARE(DOCK_FILENAME
);
62 MODULE_FIRMWARE(EMU1010B_FILENAME
);
63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME
);
64 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME
);
67 /*************************************************************************
69 *************************************************************************/
71 void snd_emu10k1_voice_init(struct snd_emu10k1
* emu
, int ch
)
73 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
74 snd_emu10k1_ptr_write(emu
, IP
, ch
, 0);
75 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0xffff);
76 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0xffff);
77 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
78 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
79 snd_emu10k1_ptr_write(emu
, CCR
, ch
, 0);
81 snd_emu10k1_ptr_write(emu
, PSST
, ch
, 0);
82 snd_emu10k1_ptr_write(emu
, DSL
, ch
, 0x10);
83 snd_emu10k1_ptr_write(emu
, CCCA
, ch
, 0);
84 snd_emu10k1_ptr_write(emu
, Z1
, ch
, 0);
85 snd_emu10k1_ptr_write(emu
, Z2
, ch
, 0);
86 snd_emu10k1_ptr_write(emu
, FXRT
, ch
, 0x32100000);
88 snd_emu10k1_ptr_write(emu
, ATKHLDM
, ch
, 0);
89 snd_emu10k1_ptr_write(emu
, DCYSUSM
, ch
, 0);
90 snd_emu10k1_ptr_write(emu
, IFATN
, ch
, 0xffff);
91 snd_emu10k1_ptr_write(emu
, PEFE
, ch
, 0);
92 snd_emu10k1_ptr_write(emu
, FMMOD
, ch
, 0);
93 snd_emu10k1_ptr_write(emu
, TREMFRQ
, ch
, 24); /* 1 Hz */
94 snd_emu10k1_ptr_write(emu
, FM2FRQ2
, ch
, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu
, TEMPENV
, ch
, 0);
97 /*** these are last so OFF prevents writing ***/
98 snd_emu10k1_ptr_write(emu
, LFOVAL2
, ch
, 0);
99 snd_emu10k1_ptr_write(emu
, LFOVAL1
, ch
, 0);
100 snd_emu10k1_ptr_write(emu
, ATKHLDV
, ch
, 0);
101 snd_emu10k1_ptr_write(emu
, ENVVOL
, ch
, 0);
102 snd_emu10k1_ptr_write(emu
, ENVVAL
, ch
, 0);
104 /* Audigy extra stuffs */
106 snd_emu10k1_ptr_write(emu
, 0x4c, ch
, 0); /* ?? */
107 snd_emu10k1_ptr_write(emu
, 0x4d, ch
, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu
, 0x4e, ch
, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu
, 0x4f, ch
, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu
, A_FXRT1
, ch
, 0x03020100);
111 snd_emu10k1_ptr_write(emu
, A_FXRT2
, ch
, 0x3f3f3f3f);
112 snd_emu10k1_ptr_write(emu
, A_SENDAMOUNTS
, ch
, 0);
116 static unsigned int spi_dac_init
[] = {
140 static unsigned int i2c_adc_init
[][2] = {
141 { 0x17, 0x00 }, /* Reset */
142 { 0x07, 0x00 }, /* Timeout */
143 { 0x0b, 0x22 }, /* Interface control */
144 { 0x0c, 0x22 }, /* Master mode control */
145 { 0x0d, 0x08 }, /* Powerdown control */
146 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
147 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
148 { 0x10, 0x7b }, /* ALC Control 1 */
149 { 0x11, 0x00 }, /* ALC Control 2 */
150 { 0x12, 0x32 }, /* ALC Control 3 */
151 { 0x13, 0x00 }, /* Noise gate control */
152 { 0x14, 0xa6 }, /* Limiter control */
153 { 0x15, ADC_MUX_2
}, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
156 static int snd_emu10k1_init(struct snd_emu10k1
*emu
, int enable_ir
, int resume
)
158 unsigned int silent_page
;
162 /* disable audio and lock cache */
163 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
,
166 /* reset recording buffers */
167 snd_emu10k1_ptr_write(emu
, MICBS
, 0, ADCBS_BUFSIZE_NONE
);
168 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
169 snd_emu10k1_ptr_write(emu
, FXBS
, 0, ADCBS_BUFSIZE_NONE
);
170 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
171 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
172 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
174 /* disable channel interrupt */
175 outl(0, emu
->port
+ INTE
);
176 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
177 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
178 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
179 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
182 /* set SPDIF bypass mode */
183 snd_emu10k1_ptr_write(emu
, SPBYPASS
, 0, SPBYPASS_FORMAT
);
184 /* enable rear left + rear right AC97 slots */
185 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_REAR_RIGHT
|
189 /* init envelope engine */
190 for (ch
= 0; ch
< NUM_G
; ch
++)
191 snd_emu10k1_voice_init(emu
, ch
);
193 snd_emu10k1_ptr_write(emu
, SPCS0
, 0, emu
->spdif_bits
[0]);
194 snd_emu10k1_ptr_write(emu
, SPCS1
, 0, emu
->spdif_bits
[1]);
195 snd_emu10k1_ptr_write(emu
, SPCS2
, 0, emu
->spdif_bits
[2]);
197 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
198 /* Hacks for Alice3 to work independent of haP16V driver */
199 //Setup SRCMulti_I2S SamplingRate
200 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
203 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 snd_emu10k1_ptr20_write(emu
, SRCSel
, 0, 0x14);
207 /* Setup SRCMulti Input Audio Enable */
208 /* Use 0xFFFFFFFF to enable P16V sounds. */
209 snd_emu10k1_ptr20_write(emu
, SRCMULTI_ENABLE
, 0, 0xFFFFFFFF);
211 /* Enabled Phased (8-channel) P16V playback */
212 outl(0x0201, emu
->port
+ HCFG2
);
213 /* Set playback routing. */
214 snd_emu10k1_ptr20_write(emu
, CAPTURE_P16V_SOURCE
, 0, 0x78e4);
216 if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 Value */
217 /* Hacks for Alice3 to work independent of haP16V driver */
218 snd_printk(KERN_INFO
"Audigy2 value: Special config.\n");
219 //Setup SRCMulti_I2S SamplingRate
220 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
223 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
225 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
226 outl(0x600000, emu
->port
+ 0x20);
227 outl(0x14, emu
->port
+ 0x24);
229 /* Setup SRCMulti Input Audio Enable */
230 outl(0x7b0000, emu
->port
+ 0x20);
231 outl(0xFF000000, emu
->port
+ 0x24);
233 /* Setup SPDIF Out Audio Enable */
234 /* The Audigy 2 Value has a separate SPDIF out,
235 * so no need for a mixer switch
237 outl(0x7a0000, emu
->port
+ 0x20);
238 outl(0xFF000000, emu
->port
+ 0x24);
239 tmp
= inl(emu
->port
+ A_IOCFG
) & ~0x8; /* Clear bit 3 */
240 outl(tmp
, emu
->port
+ A_IOCFG
);
242 if (emu
->card_capabilities
->spi_dac
) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245 size
= ARRAY_SIZE(spi_dac_init
);
246 for (n
= 0; n
< size
; n
++)
247 snd_emu10k1_spi_write(emu
, spi_dac_init
[n
]);
249 snd_emu10k1_ptr20_write(emu
, 0x60, 0, 0x10);
252 * GPIO1: Speakers-enabled.
255 * GPIO4: IEC958 Output on.
260 outl(0x76, emu
->port
+ A_IOCFG
); /* Windows uses 0x3f76 */
263 if (emu
->card_capabilities
->i2c_adc
) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
266 snd_emu10k1_ptr20_write(emu
, P17V_I2S_SRC_SEL
, 0, 0x2020205f);
267 tmp
= inl(emu
->port
+ A_IOCFG
);
268 outl(tmp
| 0x4, emu
->port
+ A_IOCFG
); /* Set bit 2 for mic input */
269 tmp
= inl(emu
->port
+ A_IOCFG
);
270 size
= ARRAY_SIZE(i2c_adc_init
);
271 for (n
= 0; n
< size
; n
++)
272 snd_emu10k1_i2c_write(emu
, i2c_adc_init
[n
][0], i2c_adc_init
[n
][1]);
273 for (n
=0; n
< 4; n
++) {
274 emu
->i2c_capture_volume
[n
][0]= 0xcf;
275 emu
->i2c_capture_volume
[n
][1]= 0xcf;
281 snd_emu10k1_ptr_write(emu
, PTB
, 0, emu
->ptb_pages
.addr
);
282 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 4); /* taken from original driver */
285 silent_page
= (emu
->silent_page
.addr
<< 1) | MAP_PTI_MASK
;
286 for (ch
= 0; ch
< NUM_G
; ch
++) {
287 snd_emu10k1_ptr_write(emu
, MAPA
, ch
, silent_page
);
288 snd_emu10k1_ptr_write(emu
, MAPB
, ch
, silent_page
);
291 if (emu
->card_capabilities
->emu1010
) {
292 outl(HCFG_AUTOMUTE_ASYNC
|
294 HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
302 } else if (emu
->audigy
) {
303 if (emu
->revision
== 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE
|
305 HCFG_AC3ENABLE_CDSPDIF
|
306 HCFG_AC3ENABLE_GPSPDIF
|
307 HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
309 outl(HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
312 } else if (emu
->model
== 0x20 ||
313 emu
->model
== 0xc400 ||
314 (emu
->model
== 0x21 && emu
->revision
< 6))
315 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
, emu
->port
+ HCFG
);
317 // With on-chip joystick
318 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
320 if (enable_ir
) { /* enable IR for SB Live */
321 if (emu
->card_capabilities
->emu1010
) {
322 ; /* Disable all access to A_IOCFG for the emu1010 */
323 } else if (emu
->card_capabilities
->i2c_adc
) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325 } else if (emu
->audigy
) {
326 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
327 outl(reg
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
329 outl(reg
| A_IOCFG_GPOUT1
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
331 outl(reg
, emu
->port
+ A_IOCFG
);
333 unsigned int reg
= inl(emu
->port
+ HCFG
);
334 outl(reg
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
336 outl(reg
| HCFG_GPOUT1
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
338 outl(reg
, emu
->port
+ HCFG
);
342 if (emu
->card_capabilities
->emu1010
) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
344 } else if (emu
->card_capabilities
->i2c_adc
) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 } else if (emu
->audigy
) { /* enable analog output */
347 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
348 outl(reg
| A_IOCFG_GPOUT0
, emu
->port
+ A_IOCFG
);
354 static void snd_emu10k1_audio_enable(struct snd_emu10k1
*emu
)
357 * Enable the audio bit
359 outl(inl(emu
->port
+ HCFG
) | HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
361 /* Enable analog/digital outs on audigy */
362 if (emu
->card_capabilities
->emu1010
) {
363 ; /* Disable all access to A_IOCFG for the emu1010 */
364 } else if (emu
->card_capabilities
->i2c_adc
) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
366 } else if (emu
->audigy
) {
367 outl(inl(emu
->port
+ A_IOCFG
) & ~0x44, emu
->port
+ A_IOCFG
);
369 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu
->port
+ A_IOCFG
) | 0x0040, emu
->port
+ A_IOCFG
);
374 } else if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 value */
375 /* Unmute Analog now. */
376 outl(inl(emu
->port
+ A_IOCFG
) | 0x0060, emu
->port
+ A_IOCFG
);
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu
->port
+ A_IOCFG
) | 0x0080, emu
->port
+ A_IOCFG
);
386 /* FIXME: the following routine disables LiveDrive-II !! */
389 tmp
= inl(emu
->port
+ HCFG
);
390 if (tmp
& (HCFG_GPINPUT0
| HCFG_GPINPUT1
)) {
391 outl(tmp
|0x800, emu
->port
+ HCFG
);
393 if (tmp
!= (inl(emu
->port
+ HCFG
) & ~0x800)) {
395 outl(tmp
, emu
->port
+ HCFG
);
401 snd_emu10k1_intr_enable(emu
, INTE_PCIERRORENABLE
);
404 int snd_emu10k1_done(struct snd_emu10k1
* emu
)
408 outl(0, emu
->port
+ INTE
);
413 for (ch
= 0; ch
< NUM_G
; ch
++)
414 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
415 for (ch
= 0; ch
< NUM_G
; ch
++) {
416 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0);
417 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0);
418 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
419 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu
, MICBS
, 0, 0);
424 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
425 snd_emu10k1_ptr_write(emu
, FXBS
, 0, 0);
426 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
427 snd_emu10k1_ptr_write(emu
, FXWC
, 0, 0);
428 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
429 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
430 snd_emu10k1_ptr_write(emu
, TCBS
, 0, TCBS_BUFFSIZE_16K
);
431 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
433 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, A_DBG_SINGLE_STEP
);
435 snd_emu10k1_ptr_write(emu
, DBG
, 0, EMU10K1_DBG_SINGLE_STEP
);
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
439 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
440 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
441 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
445 snd_emu10k1_ptr_write(emu
, PTB
, 0, 0);
450 /*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
454 /* In A1 Silicon, these bits are in the HC register */
455 #define HOOKN_BIT (1L << 12)
456 #define HANDN_BIT (1L << 11)
457 #define PULSEN_BIT (1L << 10)
459 #define EC_GDI1 (1 << 13)
460 #define EC_GDI0 (1 << 14)
462 #define EC_NUM_CONTROL_BITS 20
464 #define EC_AC3_DATA_SELN 0x0001L
465 #define EC_EE_DATA_SEL 0x0002L
466 #define EC_EE_CNTRL_SELN 0x0004L
467 #define EC_EECLK 0x0008L
468 #define EC_EECS 0x0010L
469 #define EC_EESDO 0x0020L
470 #define EC_TRIM_CSN 0x0040L
471 #define EC_TRIM_SCLK 0x0080L
472 #define EC_TRIM_SDATA 0x0100L
473 #define EC_TRIM_MUTEN 0x0200L
474 #define EC_ADCCAL 0x0400L
475 #define EC_ADCRSTN 0x0800L
476 #define EC_DACCAL 0x1000L
477 #define EC_DACMUTEN 0x2000L
478 #define EC_LEDN 0x4000L
480 #define EC_SPDIF0_SEL_SHIFT 15
481 #define EC_SPDIF1_SEL_SHIFT 17
482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
492 /* Addresses for special values stored in to EEPROM */
493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
497 #define EC_LAST_PROMFILE_ADDR 0x2f
499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
507 /* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509 * offset problem. Weird.
511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
515 #define EC_DEFAULT_ADC_GAIN 0xC4C4
516 #define EC_DEFAULT_SPDIF0_SEL 0x0
517 #define EC_DEFAULT_SPDIF1_SEL 0x4
519 /**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
527 static void snd_emu10k1_ecard_write(struct snd_emu10k1
* emu
, unsigned int value
)
529 unsigned short count
;
531 unsigned long hc_port
;
532 unsigned int hc_value
;
534 hc_port
= emu
->port
+ HCFG
;
535 hc_value
= inl(hc_port
) & ~(HOOKN_BIT
| HANDN_BIT
| PULSEN_BIT
);
536 outl(hc_value
, hc_port
);
538 for (count
= 0; count
< EC_NUM_CONTROL_BITS
; count
++) {
540 /* Set up the value */
541 data
= ((value
& 0x1) ? PULSEN_BIT
: 0);
544 outl(hc_value
| data
, hc_port
);
546 /* Clock the shift register */
547 outl(hc_value
| data
| HANDN_BIT
, hc_port
);
548 outl(hc_value
| data
, hc_port
);
552 outl(hc_value
| HOOKN_BIT
, hc_port
);
553 outl(hc_value
, hc_port
);
556 /**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1
* emu
,
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
576 for (bit
= (1 << 15); bit
; bit
>>= 1) {
579 value
= emu
->ecard_ctrl
& ~(EC_TRIM_CSN
| EC_TRIM_SDATA
);
582 value
|= EC_TRIM_SDATA
;
585 snd_emu10k1_ecard_write(emu
, value
);
586 snd_emu10k1_ecard_write(emu
, value
| EC_TRIM_SCLK
);
587 snd_emu10k1_ecard_write(emu
, value
);
590 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
593 static int snd_emu10k1_ecard_init(struct snd_emu10k1
* emu
)
595 unsigned int hc_value
;
597 /* Set up the initial settings */
598 emu
->ecard_ctrl
= EC_RAW_RUN_MODE
|
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL
) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL
);
602 /* Step 0: Set the codec type in the hardware control register
603 * and enable audio output */
604 hc_value
= inl(emu
->port
+ HCFG
);
605 outl(hc_value
| HCFG_AUDIOENABLE
| HCFG_CODECFORMAT_I2S
, emu
->port
+ HCFG
);
606 inl(emu
->port
+ HCFG
);
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu
, EC_DACCAL
| EC_LEDN
| EC_TRIM_CSN
);
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
617 snd_emu10k1_wait(emu
, 48000);
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu
, EC_DEFAULT_ADC_GAIN
);
633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1
* emu
)
635 unsigned long special_port
;
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
641 special_port
= emu
->port
+ 0x38;
642 value
= inl(special_port
);
643 outl(0x00d00000, special_port
);
644 value
= inl(special_port
);
645 outl(0x00d00001, special_port
);
646 value
= inl(special_port
);
647 outl(0x00d0005f, special_port
);
648 value
= inl(special_port
);
649 outl(0x00d0007f, special_port
);
650 value
= inl(special_port
);
651 outl(0x0090007f, special_port
);
652 value
= inl(special_port
);
654 snd_emu10k1_ptr20_write(emu
, TINA2_VOLUME
, 0, 0xfefefefe); /* Defaults to 0x30303030 */
658 static int snd_emu1010_load_firmware(struct snd_emu10k1
* emu
, const char * filename
)
664 const struct firmware
*fw_entry
;
666 if ((err
= request_firmware(&fw_entry
, filename
, &emu
->pci
->dev
)) != 0) {
667 snd_printk(KERN_ERR
"firmware: %s not found. Err=%d\n",filename
, err
);
670 snd_printk(KERN_INFO
"firmware size=0x%zx\n", fw_entry
->size
);
672 if (fw_entry
->size
!= 0x133a4) {
673 snd_printk(KERN_ERR
"firmware: %s wrong size.\n",filename
);
678 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
679 /* GPIO7 -> FPGA PGMN
682 * FPGA CONFIG OFF -> FPGA PGMN
684 outl(0x00, emu
->port
+ A_IOCFG
); /* Set PGMN low for 1uS. */
686 outl(0x80, emu
->port
+ A_IOCFG
); /* Leave bit 7 set during netlist setup. */
687 udelay(100); /* Allow FPGA memory to clean */
688 for(n
= 0; n
< fw_entry
->size
; n
++) {
689 value
=fw_entry
->data
[n
];
690 for(i
= 0; i
< 8; i
++) {
695 outl(reg
, emu
->port
+ A_IOCFG
);
696 outl(reg
| 0x40, emu
->port
+ A_IOCFG
);
699 /* After programming, set GPIO bit 4 high again. */
700 outl(0x10, emu
->port
+ A_IOCFG
);
703 release_firmware(fw_entry
);
707 int emu1010_firmware_thread(void *data
) {
708 struct snd_emu10k1
* emu
= data
;
714 /* Delay to allow Audio Dock to settle */
716 if (kthread_should_stop())
718 snd_emu1010_fpga_read(emu
, EMU_HANA_IRQ_STATUS
, &tmp
); /* IRQ Status */
719 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
); /* OPTIONS: Which cards are attached to the EMU */
720 if (reg
& EMU_HANA_OPTION_DOCK_OFFLINE
) {
721 /* Audio Dock attached */
722 /* Return to Audio Dock programming mode */
723 snd_printk(KERN_INFO
"emu1010: Loading Audio Dock Firmware\n");
724 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, EMU_HANA_FPGA_CONFIG_AUDIODOCK
);
725 if (emu
->card_capabilities
->emu1010
== 1) {
726 if ((err
= snd_emu1010_load_firmware(emu
, DOCK_FILENAME
)) != 0) {
729 } else if (emu
->card_capabilities
->emu1010
== 2) {
730 if ((err
= snd_emu1010_load_firmware(emu
, MICRO_DOCK_FILENAME
)) != 0) {
733 } else if (emu
->card_capabilities
->emu1010
== 3) {
734 if ((err
= snd_emu1010_load_firmware(emu
, MICRO_DOCK_FILENAME
)) != 0) {
739 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, 0 );
740 snd_emu1010_fpga_read(emu
, EMU_HANA_IRQ_STATUS
, ®
);
741 snd_printk(KERN_INFO
"emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg
);
742 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
743 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
744 snd_printk(KERN_INFO
"emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg
);
745 if ((reg
& 0x1f) != 0x15) {
746 /* FPGA failed to be programmed */
747 snd_printk(KERN_INFO
"emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg
);
751 snd_printk(KERN_INFO
"emu1010: Audio Dock Firmware loaded\n");
752 snd_emu1010_fpga_read(emu
, EMU_DOCK_MAJOR_REV
, &tmp
);
753 snd_emu1010_fpga_read(emu
, EMU_DOCK_MINOR_REV
, &tmp2
);
754 snd_printk("Audio Dock ver:%d.%d\n",tmp
,tmp2
);
755 /* Sync clocking between 1010 and Dock */
756 /* Allow DLL to settle */
758 /* Unmute all. Default is muted after a firmware load */
759 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, EMU_UNMUTE
);
767 * EMU-1010 - details found out from this driver, official MS Win drivers,
770 * Audigy2 (aka Alice2):
771 * ---------------------
772 * * communication over PCI
773 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
774 * to 2 x 16-bit, using internal DSP instructions
775 * * slave mode, clock supplied by HANA
776 * * linked to HANA using:
777 * 32 x 32-bit serial EMU32 output channels
778 * 16 x EMU32 input channels
779 * (?) x I2S I/O channels (?)
783 * * provides all (?) physical inputs and outputs of the card
784 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
785 * * provides clock signal for the card and Alice2
786 * * two crystals - for 44.1kHz and 48kHz multiples
787 * * provides internal routing of signal sources to signal destinations
788 * * inputs/outputs to Alice2 - see above
790 * Current status of the driver:
791 * ----------------------------
792 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
793 * * PCM device nb. 2:
794 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
795 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
797 static int snd_emu10k1_emu1010_init(struct snd_emu10k1
* emu
)
804 snd_printk(KERN_INFO
"emu1010: Special config.\n");
805 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
806 * Lock Sound Memory Cache, Lock Tank Memory Cache,
809 outl(0x0005a00c, emu
->port
+ HCFG
);
810 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
811 * Lock Tank Memory Cache,
814 outl(0x0005a004, emu
->port
+ HCFG
);
815 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
818 outl(0x0005a000, emu
->port
+ HCFG
);
819 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
822 outl(0x0005a000, emu
->port
+ HCFG
);
824 /* Disable 48Volt power to Audio Dock */
825 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, 0 );
827 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
828 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
829 snd_printdd("reg1=0x%x\n",reg
);
830 if ((reg
& 0x3f) == 0x15) {
831 /* FPGA netlist already present so clear it */
832 /* Return to programming mode */
834 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, 0x02 );
836 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
837 snd_printdd("reg2=0x%x\n",reg
);
838 if ((reg
& 0x3f) == 0x15) {
839 /* FPGA failed to return to programming mode */
840 snd_printk(KERN_INFO
"emu1010: FPGA failed to return to programming mode\n");
843 snd_printk(KERN_INFO
"emu1010: EMU_HANA_ID=0x%x\n",reg
);
844 if (emu
->card_capabilities
->emu1010
== 1) {
845 if ((err
= snd_emu1010_load_firmware(emu
, HANA_FILENAME
)) != 0) {
846 snd_printk(KERN_INFO
"emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME
);
849 } else if (emu
->card_capabilities
->emu1010
== 2) {
850 if ((err
= snd_emu1010_load_firmware(emu
, EMU1010B_FILENAME
)) != 0) {
851 snd_printk(KERN_INFO
"emu1010: Loading Firmware file %s failed\n", EMU1010B_FILENAME
);
854 } else if (emu
->card_capabilities
->emu1010
== 3) {
855 if ((err
= snd_emu1010_load_firmware(emu
, EMU1010_NOTEBOOK_FILENAME
)) != 0) {
856 snd_printk(KERN_INFO
"emu1010: Loading Firmware file %s failed\n", EMU1010_NOTEBOOK_FILENAME
);
861 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
862 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
863 if ((reg
& 0x3f) != 0x15) {
864 /* FPGA failed to be programmed */
865 snd_printk(KERN_INFO
"emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg
);
869 snd_printk(KERN_INFO
"emu1010: Hana Firmware loaded\n");
870 snd_emu1010_fpga_read(emu
, EMU_HANA_MAJOR_REV
, &tmp
);
871 snd_emu1010_fpga_read(emu
, EMU_HANA_MINOR_REV
, &tmp2
);
872 snd_printk("Hana ver:%d.%d\n",tmp
,tmp2
);
873 /* Enable 48Volt power to Audio Dock */
874 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, EMU_HANA_DOCK_PWR_ON
);
876 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
877 snd_printk(KERN_INFO
"emu1010: Card options=0x%x\n",reg
);
878 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
879 snd_printk(KERN_INFO
"emu1010: Card options=0x%x\n",reg
);
880 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTICAL_TYPE
, &tmp
);
881 /* Optical -> ADAT I/O */
885 emu
->emu1010
.optical_in
= 1; /* IN_ADAT */
886 emu
->emu1010
.optical_out
= 1; /* IN_ADAT */
888 tmp
= (emu
->emu1010
.optical_in
? EMU_HANA_OPTICAL_IN_ADAT
: 0) |
889 (emu
->emu1010
.optical_out
? EMU_HANA_OPTICAL_OUT_ADAT
: 0);
890 snd_emu1010_fpga_write(emu
, EMU_HANA_OPTICAL_TYPE
, tmp
);
891 snd_emu1010_fpga_read(emu
, EMU_HANA_ADC_PADS
, &tmp
);
892 /* Set no attenuation on Audio Dock pads. */
893 snd_emu1010_fpga_write(emu
, EMU_HANA_ADC_PADS
, 0x00 );
894 emu
->emu1010
.adc_pads
= 0x00;
895 snd_emu1010_fpga_read(emu
, EMU_HANA_DOCK_MISC
, &tmp
);
896 /* Unmute Audio dock DACs, Headphone source DAC-4. */
897 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_MISC
, 0x30 );
898 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12 );
899 snd_emu1010_fpga_read(emu
, EMU_HANA_DAC_PADS
, &tmp
);
901 snd_emu1010_fpga_write(emu
, EMU_HANA_DAC_PADS
, 0x0f );
902 emu
->emu1010
.dac_pads
= 0x0f;
903 snd_emu1010_fpga_read(emu
, EMU_HANA_DOCK_MISC
, &tmp
);
904 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_MISC
, 0x30 );
905 snd_emu1010_fpga_read(emu
, EMU_HANA_SPDIF_MODE
, &tmp
);
906 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
907 snd_emu1010_fpga_write(emu
, EMU_HANA_SPDIF_MODE
, 0x10 );
909 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19 );
911 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c );
912 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
913 /* IRQ Enable: All off */
914 snd_emu1010_fpga_write(emu
, EMU_HANA_IRQ_ENABLE
, 0x00 );
916 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
917 snd_printk(KERN_INFO
"emu1010: Card options3=0x%x\n",reg
);
918 /* Default WCLK set to 48kHz. */
919 snd_emu1010_fpga_write(emu
, EMU_HANA_DEFCLOCK
, 0x00 );
920 /* Word Clock source, Internal 48kHz x1 */
921 snd_emu1010_fpga_write(emu
, EMU_HANA_WCLOCK
, EMU_HANA_WCLOCK_INT_48K
);
922 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
923 /* Audio Dock LEDs. */
924 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12 );
928 snd_emu1010_fpga_link_dst_src_write(emu
,
929 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_HAMOA_ADC_LEFT1
);
930 snd_emu1010_fpga_link_dst_src_write(emu
,
931 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_HAMOA_ADC_RIGHT1
);
932 snd_emu1010_fpga_link_dst_src_write(emu
,
933 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HAMOA_ADC_LEFT2
);
934 snd_emu1010_fpga_link_dst_src_write(emu
,
935 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HAMOA_ADC_RIGHT2
);
939 snd_emu1010_fpga_link_dst_src_write(emu
,
940 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_HAMOA_ADC_LEFT1
);
941 snd_emu1010_fpga_link_dst_src_write(emu
,
942 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_HAMOA_ADC_RIGHT1
);
943 snd_emu1010_fpga_link_dst_src_write(emu
,
944 EMU_DST_ALICE2_EMU32_2
, EMU_SRC_HAMOA_ADC_LEFT2
);
945 snd_emu1010_fpga_link_dst_src_write(emu
,
946 EMU_DST_ALICE2_EMU32_3
, EMU_SRC_HAMOA_ADC_RIGHT2
);
947 snd_emu1010_fpga_link_dst_src_write(emu
,
948 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HAMOA_ADC_LEFT3
);
949 snd_emu1010_fpga_link_dst_src_write(emu
,
950 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HAMOA_ADC_RIGHT3
);
951 snd_emu1010_fpga_link_dst_src_write(emu
,
952 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_HAMOA_ADC_LEFT4
);
953 snd_emu1010_fpga_link_dst_src_write(emu
,
954 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_HAMOA_ADC_RIGHT4
);
958 snd_emu1010_fpga_link_dst_src_write(emu
,
959 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_DOCK_MIC_A1
);
960 snd_emu1010_fpga_link_dst_src_write(emu
,
961 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_DOCK_MIC_B1
);
962 snd_emu1010_fpga_link_dst_src_write(emu
,
963 EMU_DST_ALICE2_EMU32_2
, EMU_SRC_HAMOA_ADC_LEFT2
);
964 snd_emu1010_fpga_link_dst_src_write(emu
,
965 EMU_DST_ALICE2_EMU32_3
, EMU_SRC_HAMOA_ADC_LEFT2
);
966 snd_emu1010_fpga_link_dst_src_write(emu
,
967 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_DOCK_ADC1_LEFT1
);
968 snd_emu1010_fpga_link_dst_src_write(emu
,
969 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_DOCK_ADC1_RIGHT1
);
970 snd_emu1010_fpga_link_dst_src_write(emu
,
971 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_DOCK_ADC2_LEFT1
);
972 snd_emu1010_fpga_link_dst_src_write(emu
,
973 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_DOCK_ADC2_RIGHT1
);
974 /* Pavel Hofman - setting defaults for 8 more capture channels
975 * Defaults only, users will set their own values anyways, let's
979 snd_emu1010_fpga_link_dst_src_write(emu
,
980 EMU_DST_ALICE2_EMU32_8
, EMU_SRC_DOCK_MIC_A1
);
981 snd_emu1010_fpga_link_dst_src_write(emu
,
982 EMU_DST_ALICE2_EMU32_9
, EMU_SRC_DOCK_MIC_B1
);
983 snd_emu1010_fpga_link_dst_src_write(emu
,
984 EMU_DST_ALICE2_EMU32_A
, EMU_SRC_HAMOA_ADC_LEFT2
);
985 snd_emu1010_fpga_link_dst_src_write(emu
,
986 EMU_DST_ALICE2_EMU32_B
, EMU_SRC_HAMOA_ADC_LEFT2
);
987 snd_emu1010_fpga_link_dst_src_write(emu
,
988 EMU_DST_ALICE2_EMU32_C
, EMU_SRC_DOCK_ADC1_LEFT1
);
989 snd_emu1010_fpga_link_dst_src_write(emu
,
990 EMU_DST_ALICE2_EMU32_D
, EMU_SRC_DOCK_ADC1_RIGHT1
);
991 snd_emu1010_fpga_link_dst_src_write(emu
,
992 EMU_DST_ALICE2_EMU32_E
, EMU_SRC_DOCK_ADC2_LEFT1
);
993 snd_emu1010_fpga_link_dst_src_write(emu
,
994 EMU_DST_ALICE2_EMU32_F
, EMU_SRC_DOCK_ADC2_RIGHT1
);
998 snd_emu1010_fpga_link_dst_src_write(emu
,
999 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HANA_ADAT
);
1000 snd_emu1010_fpga_link_dst_src_write(emu
,
1001 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HANA_ADAT
+ 1);
1002 snd_emu1010_fpga_link_dst_src_write(emu
,
1003 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_HANA_ADAT
+ 2);
1004 snd_emu1010_fpga_link_dst_src_write(emu
,
1005 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_HANA_ADAT
+ 3);
1006 snd_emu1010_fpga_link_dst_src_write(emu
,
1007 EMU_DST_ALICE2_EMU32_8
, EMU_SRC_HANA_ADAT
+ 4);
1008 snd_emu1010_fpga_link_dst_src_write(emu
,
1009 EMU_DST_ALICE2_EMU32_9
, EMU_SRC_HANA_ADAT
+ 5);
1010 snd_emu1010_fpga_link_dst_src_write(emu
,
1011 EMU_DST_ALICE2_EMU32_A
, EMU_SRC_HANA_ADAT
+ 6);
1012 snd_emu1010_fpga_link_dst_src_write(emu
,
1013 EMU_DST_ALICE2_EMU32_B
, EMU_SRC_HANA_ADAT
+ 7);
1014 snd_emu1010_fpga_link_dst_src_write(emu
,
1015 EMU_DST_ALICE2_EMU32_C
, EMU_SRC_DOCK_MIC_A1
);
1016 snd_emu1010_fpga_link_dst_src_write(emu
,
1017 EMU_DST_ALICE2_EMU32_D
, EMU_SRC_DOCK_MIC_B1
);
1018 snd_emu1010_fpga_link_dst_src_write(emu
,
1019 EMU_DST_ALICE2_EMU32_E
, EMU_SRC_HAMOA_ADC_LEFT2
);
1020 snd_emu1010_fpga_link_dst_src_write(emu
,
1021 EMU_DST_ALICE2_EMU32_F
, EMU_SRC_HAMOA_ADC_LEFT2
);
1023 for (i
= 0;i
< 0x20; i
++ ) {
1024 /* AudioDock Elink <- Silence */
1025 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0100+i
, EMU_SRC_SILENCE
);
1027 for (i
= 0;i
< 4; i
++) {
1028 /* Hana SPDIF Out <- Silence */
1029 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0200+i
, EMU_SRC_SILENCE
);
1031 for (i
= 0;i
< 7; i
++) {
1032 /* Hamoa DAC <- Silence */
1033 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0300+i
, EMU_SRC_SILENCE
);
1035 for (i
= 0;i
< 7; i
++) {
1036 /* Hana ADAT Out <- Silence */
1037 snd_emu1010_fpga_link_dst_src_write(emu
, EMU_DST_HANA_ADAT
+ i
, EMU_SRC_SILENCE
);
1039 snd_emu1010_fpga_link_dst_src_write(emu
,
1040 EMU_DST_ALICE_I2S0_LEFT
, EMU_SRC_DOCK_ADC1_LEFT1
);
1041 snd_emu1010_fpga_link_dst_src_write(emu
,
1042 EMU_DST_ALICE_I2S0_RIGHT
, EMU_SRC_DOCK_ADC1_RIGHT1
);
1043 snd_emu1010_fpga_link_dst_src_write(emu
,
1044 EMU_DST_ALICE_I2S1_LEFT
, EMU_SRC_DOCK_ADC2_LEFT1
);
1045 snd_emu1010_fpga_link_dst_src_write(emu
,
1046 EMU_DST_ALICE_I2S1_RIGHT
, EMU_SRC_DOCK_ADC2_RIGHT1
);
1047 snd_emu1010_fpga_link_dst_src_write(emu
,
1048 EMU_DST_ALICE_I2S2_LEFT
, EMU_SRC_DOCK_ADC3_LEFT1
);
1049 snd_emu1010_fpga_link_dst_src_write(emu
,
1050 EMU_DST_ALICE_I2S2_RIGHT
, EMU_SRC_DOCK_ADC3_RIGHT1
);
1051 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x01 ); // Unmute all
1053 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, &tmp
);
1055 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1056 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1059 outl(0x0000a000, emu
->port
+ HCFG
);
1060 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1061 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1062 * Un-Mute all codecs.
1064 outl(0x0000a001, emu
->port
+ HCFG
);
1066 /* Initial boot complete. Now patches */
1068 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, &tmp
);
1069 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19 ); /* MIDI Route */
1070 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c ); /* Unknown */
1071 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19 ); /* MIDI Route */
1072 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c ); /* Unknown */
1073 snd_emu1010_fpga_read(emu
, EMU_HANA_SPDIF_MODE
, &tmp
);
1074 snd_emu1010_fpga_write(emu
, EMU_HANA_SPDIF_MODE
, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1076 /* Start Micro/Audio Dock firmware loader thread */
1077 emu
->emu1010
.firmware_thread
= kthread_create(&emu1010_firmware_thread
,
1079 "emu1010_firmware");
1080 wake_up_process(emu
->emu1010
.firmware_thread
);
1083 snd_emu1010_fpga_link_dst_src_write(emu
,
1084 EMU_DST_HAMOA_DAC_LEFT1
, EMU_SRC_ALICE_EMU32B
+ 2); /* ALICE2 bus 0xa2 */
1085 snd_emu1010_fpga_link_dst_src_write(emu
,
1086 EMU_DST_HAMOA_DAC_RIGHT1
, EMU_SRC_ALICE_EMU32B
+ 3); /* ALICE2 bus 0xa3 */
1087 snd_emu1010_fpga_link_dst_src_write(emu
,
1088 EMU_DST_HANA_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 2); /* ALICE2 bus 0xb2 */
1089 snd_emu1010_fpga_link_dst_src_write(emu
,
1090 EMU_DST_HANA_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 3); /* ALICE2 bus 0xb3 */
1092 /* Default outputs */
1093 snd_emu1010_fpga_link_dst_src_write(emu
,
1094 EMU_DST_DOCK_DAC1_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1095 emu
->emu1010
.output_source
[0] = 21;
1096 snd_emu1010_fpga_link_dst_src_write(emu
,
1097 EMU_DST_DOCK_DAC1_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1098 emu
->emu1010
.output_source
[1] = 22;
1099 snd_emu1010_fpga_link_dst_src_write(emu
,
1100 EMU_DST_DOCK_DAC2_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 2);
1101 emu
->emu1010
.output_source
[2] = 23;
1102 snd_emu1010_fpga_link_dst_src_write(emu
,
1103 EMU_DST_DOCK_DAC2_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 3);
1104 emu
->emu1010
.output_source
[3] = 24;
1105 snd_emu1010_fpga_link_dst_src_write(emu
,
1106 EMU_DST_DOCK_DAC3_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 4);
1107 emu
->emu1010
.output_source
[4] = 25;
1108 snd_emu1010_fpga_link_dst_src_write(emu
,
1109 EMU_DST_DOCK_DAC3_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 5);
1110 emu
->emu1010
.output_source
[5] = 26;
1111 snd_emu1010_fpga_link_dst_src_write(emu
,
1112 EMU_DST_DOCK_DAC4_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 6);
1113 emu
->emu1010
.output_source
[6] = 27;
1114 snd_emu1010_fpga_link_dst_src_write(emu
,
1115 EMU_DST_DOCK_DAC4_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 7);
1116 emu
->emu1010
.output_source
[7] = 28;
1117 snd_emu1010_fpga_link_dst_src_write(emu
,
1118 EMU_DST_DOCK_PHONES_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1119 emu
->emu1010
.output_source
[8] = 21;
1120 snd_emu1010_fpga_link_dst_src_write(emu
,
1121 EMU_DST_DOCK_PHONES_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1122 emu
->emu1010
.output_source
[9] = 22;
1123 snd_emu1010_fpga_link_dst_src_write(emu
,
1124 EMU_DST_DOCK_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1125 emu
->emu1010
.output_source
[10] = 21;
1126 snd_emu1010_fpga_link_dst_src_write(emu
,
1127 EMU_DST_DOCK_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1128 emu
->emu1010
.output_source
[11] = 22;
1129 snd_emu1010_fpga_link_dst_src_write(emu
,
1130 EMU_DST_HANA_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1131 emu
->emu1010
.output_source
[12] = 21;
1132 snd_emu1010_fpga_link_dst_src_write(emu
,
1133 EMU_DST_HANA_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1134 emu
->emu1010
.output_source
[13] = 22;
1135 snd_emu1010_fpga_link_dst_src_write(emu
,
1136 EMU_DST_HAMOA_DAC_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1137 emu
->emu1010
.output_source
[14] = 21;
1138 snd_emu1010_fpga_link_dst_src_write(emu
,
1139 EMU_DST_HAMOA_DAC_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1140 emu
->emu1010
.output_source
[15] = 22;
1141 snd_emu1010_fpga_link_dst_src_write(emu
,
1142 EMU_DST_HANA_ADAT
, EMU_SRC_ALICE_EMU32A
+ 0); /* ALICE2 bus 0xa0 */
1143 emu
->emu1010
.output_source
[16] = 21;
1144 snd_emu1010_fpga_link_dst_src_write(emu
,
1145 EMU_DST_HANA_ADAT
+ 1, EMU_SRC_ALICE_EMU32A
+ 1);
1146 emu
->emu1010
.output_source
[17] = 22;
1147 snd_emu1010_fpga_link_dst_src_write(emu
,
1148 EMU_DST_HANA_ADAT
+ 2, EMU_SRC_ALICE_EMU32A
+ 2);
1149 emu
->emu1010
.output_source
[18] = 23;
1150 snd_emu1010_fpga_link_dst_src_write(emu
,
1151 EMU_DST_HANA_ADAT
+ 3, EMU_SRC_ALICE_EMU32A
+ 3);
1152 emu
->emu1010
.output_source
[19] = 24;
1153 snd_emu1010_fpga_link_dst_src_write(emu
,
1154 EMU_DST_HANA_ADAT
+ 4, EMU_SRC_ALICE_EMU32A
+ 4);
1155 emu
->emu1010
.output_source
[20] = 25;
1156 snd_emu1010_fpga_link_dst_src_write(emu
,
1157 EMU_DST_HANA_ADAT
+ 5, EMU_SRC_ALICE_EMU32A
+ 5);
1158 emu
->emu1010
.output_source
[21] = 26;
1159 snd_emu1010_fpga_link_dst_src_write(emu
,
1160 EMU_DST_HANA_ADAT
+ 6, EMU_SRC_ALICE_EMU32A
+ 6);
1161 emu
->emu1010
.output_source
[22] = 27;
1162 snd_emu1010_fpga_link_dst_src_write(emu
,
1163 EMU_DST_HANA_ADAT
+ 7, EMU_SRC_ALICE_EMU32A
+ 7);
1164 emu
->emu1010
.output_source
[23] = 28;
1166 /* TEMP: Select SPDIF in/out */
1167 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1169 /* TEMP: Select 48kHz SPDIF out */
1170 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x0); /* Mute all */
1171 snd_emu1010_fpga_write(emu
, EMU_HANA_DEFCLOCK
, 0x0); /* Default fallback clock 48kHz */
1172 /* Word Clock source, Internal 48kHz x1 */
1173 snd_emu1010_fpga_write(emu
, EMU_HANA_WCLOCK
, EMU_HANA_WCLOCK_INT_48K
);
1174 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1175 emu
->emu1010
.internal_clock
= 1; /* 48000 */
1176 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12);/* Set LEDs on Audio Dock */
1177 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x1); /* Unmute all */
1178 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1179 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1180 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1185 * Create the EMU10K1 instance
1189 static int alloc_pm_buffer(struct snd_emu10k1
*emu
);
1190 static void free_pm_buffer(struct snd_emu10k1
*emu
);
1193 static int snd_emu10k1_free(struct snd_emu10k1
*emu
)
1195 if (emu
->port
) { /* avoid access to already used hardware */
1196 snd_emu10k1_fx8010_tram_setup(emu
, 0);
1197 snd_emu10k1_done(emu
);
1198 /* remove reserved page */
1199 if (emu
->reserved_page
) {
1200 snd_emu10k1_synth_free(emu
, (struct snd_util_memblk
*)emu
->reserved_page
);
1201 emu
->reserved_page
= NULL
;
1203 snd_emu10k1_free_efx(emu
);
1205 if (emu
->card_capabilities
->emu1010
) {
1206 /* Disable 48Volt power to Audio Dock */
1207 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, 0 );
1208 kthread_stop(emu
->emu1010
.firmware_thread
);
1211 snd_util_memhdr_free(emu
->memhdr
);
1212 if (emu
->silent_page
.area
)
1213 snd_dma_free_pages(&emu
->silent_page
);
1214 if (emu
->ptb_pages
.area
)
1215 snd_dma_free_pages(&emu
->ptb_pages
);
1216 vfree(emu
->page_ptr_table
);
1217 vfree(emu
->page_addr_table
);
1219 free_pm_buffer(emu
);
1222 free_irq(emu
->irq
, emu
);
1224 pci_release_regions(emu
->pci
);
1225 if (emu
->card_capabilities
->ca0151_chip
) /* P16V */
1227 pci_disable_device(emu
->pci
);
1232 static int snd_emu10k1_dev_free(struct snd_device
*device
)
1234 struct snd_emu10k1
*emu
= device
->device_data
;
1235 return snd_emu10k1_free(emu
);
1238 static struct snd_emu_chip_details emu_chip_details
[] = {
1239 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1240 /* Tested by James@superbug.co.uk 3rd July 2005 */
1243 * ADC: Philips 1361T
1247 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10011102,
1248 .driver
= "Audigy2", .name
= "Audigy 2 Value [SB0400]",
1254 /* Audigy4 (Not PRO) SB0610 */
1255 /* Tested by James@superbug.co.uk 4th April 2006 */
1261 * 3: 0 - Digital Out, 1 - Line in
1269 * A: Green jack sense (Front)
1271 * C: Black jack sense (Rear/Side Right)
1272 * D: Yellow jack sense (Center/LFE/Side Left)
1276 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1280 /* Mic input not tested.
1281 * Analog CD input not tested
1282 * Digital Out not tested.
1284 * Audio output 5.1 working. Side outputs not working.
1286 /* DSP: CA10300-IAT LF
1287 * DAC: Cirrus Logic CS4382-KQZ
1288 * ADC: Philips 1361T
1289 * AC97: Sigmatel STAC9750
1292 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10211102,
1293 .driver
= "Audigy2", .name
= "Audigy 4 [SB0610]",
1298 .adc_1361t
= 1, /* 24 bit capture instead of 16bit */
1300 /* Audigy 2 ZS Notebook Cardbus card.*/
1301 /* Tested by James@superbug.co.uk 6th November 2006 */
1302 /* Audio output 7.1/Headphones working.
1303 * Digital output working. (AC3 not checked, only PCM)
1304 * Audio Mic/Line inputs working.
1305 * Digital input not tested.
1308 * DAC: Wolfson WM8768/WM8568
1309 * ADC: Wolfson WM8775
1313 /* Tested by James@superbug.co.uk 4th April 2006 */
1317 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1318 * 2: Analog input 0 = line in, 1 = mic in
1320 * 4: Digital output 0 = off, 1 = on.
1325 * All bits 1 (0x3fxx) means nothing plugged in.
1326 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1327 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1328 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1332 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x20011102,
1333 .driver
= "Audigy2", .name
= "Audigy 2 ZS Notebook [SB0530]",
1337 .ca_cardbus_chip
= 1,
1341 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x42011102,
1342 .driver
= "Audigy2", .name
= "E-mu 1010 Notebook [MAEM8950]",
1346 .ca_cardbus_chip
= 1,
1349 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x40041102,
1350 .driver
= "Audigy2", .name
= "E-mu 1010b PCI [MAEM????]",
1356 {.vendor
= 0x1102, .device
= 0x0008,
1357 .driver
= "Audigy2", .name
= "Audigy 2 Value [Unknown]",
1362 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
1363 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40011102,
1364 .driver
= "Audigy2", .name
= "E-mu 1010 [4001]",
1370 /* Tested by James@superbug.co.uk 3rd July 2005 */
1371 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20071102,
1372 .driver
= "Audigy2", .name
= "Audigy 4 PRO [SB0380]",
1380 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1381 /* The 0x20061102 does have SB0350 written on it
1382 * Just like 0x20021102
1384 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20061102,
1385 .driver
= "Audigy2", .name
= "Audigy 2 [SB0350b]",
1393 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20021102,
1394 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0350]",
1402 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20011102,
1403 .driver
= "Audigy2", .name
= "Audigy 2 ZS [2001]",
1412 /* Tested by James@superbug.co.uk 3rd July 2005 */
1415 * ADC: Philips 1361T
1419 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10071102,
1420 .driver
= "Audigy2", .name
= "Audigy 2 [SB0240]",
1427 .adc_1361t
= 1, /* 24 bit capture instead of 16bit */
1429 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10051102,
1430 .driver
= "Audigy2", .name
= "Audigy 2 EX [1005]",
1437 /* Dell OEM/Creative Labs Audigy 2 ZS */
1438 /* See ALSA bug#1365 */
1439 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10031102,
1440 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0353]",
1448 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10021102,
1449 .driver
= "Audigy2", .name
= "Audigy 2 Platinum [SB0240P]",
1456 .adc_1361t
= 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1458 {.vendor
= 0x1102, .device
= 0x0004, .revision
= 0x04,
1459 .driver
= "Audigy2", .name
= "Audigy 2 [Unknown]",
1466 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00531102,
1467 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
1472 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00521102,
1473 .driver
= "Audigy", .name
= "Audigy 1 ES [SB0160]",
1479 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00511102,
1480 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
1485 {.vendor
= 0x1102, .device
= 0x0004,
1486 .driver
= "Audigy", .name
= "Audigy 1 [Unknown]",
1491 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806B1102,
1492 .driver
= "EMU10K1", .name
= "SBLive! [SB0105]",
1497 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806A1102,
1498 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0103]",
1503 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80691102,
1504 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0101]",
1509 /* Tested by ALSA bug#1680 26th December 2005 */
1510 /* note: It really has SB0220 written on the card. */
1511 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80661102,
1512 .driver
= "EMU10K1", .name
= "SB Live 5.1 Dell OEM [SB0220]",
1517 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1518 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80651102,
1519 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
1524 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x100a1102,
1525 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
1530 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80641102,
1531 .driver
= "EMU10K1", .name
= "SB Live 5.1",
1536 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1537 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80611102,
1538 .driver
= "EMU10K1", .name
= "SBLive 5.1 [SB0060]",
1541 .ac97_chip
= 2, /* ac97 is optional; both SBLive 5.1 and platinum
1542 * share the same IDs!
1545 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80511102,
1546 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4850]",
1551 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80401102,
1552 .driver
= "EMU10K1", .name
= "SBLive! Platinum [CT4760P]",
1556 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80321102,
1557 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4871]",
1562 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80311102,
1563 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4831]",
1568 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80281102,
1569 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4870]",
1574 /* Tested by James@superbug.co.uk 3rd July 2005 */
1575 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80271102,
1576 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4832]",
1581 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80261102,
1582 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4830]",
1587 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80231102,
1588 .driver
= "EMU10K1", .name
= "SB PCI512 [CT4790]",
1593 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80221102,
1594 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4780]",
1599 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x40011102,
1600 .driver
= "EMU10K1", .name
= "E-mu APS [4001]",
1604 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00211102,
1605 .driver
= "EMU10K1", .name
= "SBLive! [CT4620]",
1610 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00201102,
1611 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4670]",
1616 {.vendor
= 0x1102, .device
= 0x0002,
1617 .driver
= "EMU10K1", .name
= "SB Live [Unknown]",
1622 { } /* terminator */
1625 int __devinit
snd_emu10k1_create(struct snd_card
*card
,
1626 struct pci_dev
* pci
,
1627 unsigned short extin_mask
,
1628 unsigned short extout_mask
,
1629 long max_cache_bytes
,
1632 struct snd_emu10k1
** remu
)
1634 struct snd_emu10k1
*emu
;
1637 unsigned int silent_page
;
1638 const struct snd_emu_chip_details
*c
;
1639 static struct snd_device_ops ops
= {
1640 .dev_free
= snd_emu10k1_dev_free
,
1645 /* enable PCI device */
1646 if ((err
= pci_enable_device(pci
)) < 0)
1649 emu
= kzalloc(sizeof(*emu
), GFP_KERNEL
);
1651 pci_disable_device(pci
);
1655 spin_lock_init(&emu
->reg_lock
);
1656 spin_lock_init(&emu
->emu_lock
);
1657 spin_lock_init(&emu
->voice_lock
);
1658 spin_lock_init(&emu
->synth_lock
);
1659 spin_lock_init(&emu
->memblk_lock
);
1660 mutex_init(&emu
->fx8010
.lock
);
1661 INIT_LIST_HEAD(&emu
->mapped_link_head
);
1662 INIT_LIST_HEAD(&emu
->mapped_order_link_head
);
1666 emu
->get_synth_voice
= NULL
;
1667 /* read revision & serial */
1668 emu
->revision
= pci
->revision
;
1669 pci_read_config_dword(pci
, PCI_SUBSYSTEM_VENDOR_ID
, &emu
->serial
);
1670 pci_read_config_word(pci
, PCI_SUBSYSTEM_ID
, &emu
->model
);
1671 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci
->vendor
, pci
->device
, emu
->serial
, emu
->model
);
1673 for (c
= emu_chip_details
; c
->vendor
; c
++) {
1674 if (c
->vendor
== pci
->vendor
&& c
->device
== pci
->device
) {
1676 if (c
->subsystem
&& (c
->subsystem
== subsystem
) ) {
1680 if (c
->subsystem
&& (c
->subsystem
!= emu
->serial
) )
1682 if (c
->revision
&& c
->revision
!= emu
->revision
)
1688 if (c
->vendor
== 0) {
1689 snd_printk(KERN_ERR
"emu10k1: Card not recognised\n");
1691 pci_disable_device(pci
);
1694 emu
->card_capabilities
= c
;
1695 if (c
->subsystem
&& !subsystem
)
1696 snd_printdd("Sound card name=%s\n", c
->name
);
1698 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1699 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
, c
->subsystem
);
1701 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1702 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
);
1704 if (!*card
->id
&& c
->id
) {
1706 strlcpy(card
->id
, c
->id
, sizeof(card
->id
));
1708 for (i
= 0; i
< snd_ecards_limit
; i
++) {
1709 if (snd_cards
[i
] && !strcmp(snd_cards
[i
]->id
, card
->id
))
1712 if (i
>= snd_ecards_limit
)
1715 if (n
>= SNDRV_CARDS
)
1717 snprintf(card
->id
, sizeof(card
->id
), "%s_%d", c
->id
, n
);
1721 is_audigy
= emu
->audigy
= c
->emu10k2_chip
;
1723 /* set the DMA transfer mask */
1724 emu
->dma_mask
= is_audigy
? AUDIGY_DMA_MASK
: EMU10K1_DMA_MASK
;
1725 if (pci_set_dma_mask(pci
, emu
->dma_mask
) < 0 ||
1726 pci_set_consistent_dma_mask(pci
, emu
->dma_mask
) < 0) {
1727 snd_printk(KERN_ERR
"architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu
->dma_mask
);
1729 pci_disable_device(pci
);
1733 emu
->gpr_base
= A_FXGPREGBASE
;
1735 emu
->gpr_base
= FXGPREGBASE
;
1737 if ((err
= pci_request_regions(pci
, "EMU10K1")) < 0) {
1739 pci_disable_device(pci
);
1742 emu
->port
= pci_resource_start(pci
, 0);
1744 if (request_irq(pci
->irq
, snd_emu10k1_interrupt
, IRQF_SHARED
,
1749 emu
->irq
= pci
->irq
;
1751 emu
->max_cache_pages
= max_cache_bytes
>> PAGE_SHIFT
;
1752 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1753 32 * 1024, &emu
->ptb_pages
) < 0) {
1758 emu
->page_ptr_table
= vmalloc(emu
->max_cache_pages
* sizeof(void *));
1759 emu
->page_addr_table
= vmalloc(emu
->max_cache_pages
*
1760 sizeof(unsigned long));
1761 if (emu
->page_ptr_table
== NULL
|| emu
->page_addr_table
== NULL
) {
1766 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1767 EMUPAGESIZE
, &emu
->silent_page
) < 0) {
1771 emu
->memhdr
= snd_util_memhdr_new(emu
->max_cache_pages
* PAGE_SIZE
);
1772 if (emu
->memhdr
== NULL
) {
1776 emu
->memhdr
->block_extra_size
= sizeof(struct snd_emu10k1_memblk
) -
1777 sizeof(struct snd_util_memblk
);
1779 pci_set_master(pci
);
1781 emu
->fx8010
.fxbus_mask
= 0x303f;
1782 if (extin_mask
== 0)
1783 extin_mask
= 0x3fcf;
1784 if (extout_mask
== 0)
1785 extout_mask
= 0x7fff;
1786 emu
->fx8010
.extin_mask
= extin_mask
;
1787 emu
->fx8010
.extout_mask
= extout_mask
;
1788 emu
->enable_ir
= enable_ir
;
1790 if (emu
->card_capabilities
->ca_cardbus_chip
) {
1791 if ((err
= snd_emu10k1_cardbus_init(emu
)) < 0)
1794 if (emu
->card_capabilities
->ecard
) {
1795 if ((err
= snd_emu10k1_ecard_init(emu
)) < 0)
1797 } else if (emu
->card_capabilities
->emu1010
) {
1798 if ((err
= snd_emu10k1_emu1010_init(emu
)) < 0) {
1799 snd_emu10k1_free(emu
);
1803 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1804 does not support this, it shouldn't do any harm */
1805 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1808 /* initialize TRAM setup */
1809 emu
->fx8010
.itram_size
= (16 * 1024)/2;
1810 emu
->fx8010
.etram_pages
.area
= NULL
;
1811 emu
->fx8010
.etram_pages
.bytes
= 0;
1814 * Init to 0x02109204 :
1815 * Clock accuracy = 0 (1000ppm)
1816 * Sample Rate = 2 (48kHz)
1817 * Audio Channel = 1 (Left of 2)
1818 * Source Number = 0 (Unspecified)
1819 * Generation Status = 1 (Original for Cat Code 12)
1820 * Cat Code = 12 (Digital Signal Mixer)
1822 * Emphasis = 0 (None)
1823 * CP = 1 (Copyright unasserted)
1824 * AN = 0 (Audio data)
1827 emu
->spdif_bits
[0] = emu
->spdif_bits
[1] =
1828 emu
->spdif_bits
[2] = SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
1829 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
1830 SPCS_GENERATIONSTATUS
| 0x00001200 |
1831 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
;
1833 emu
->reserved_page
= (struct snd_emu10k1_memblk
*)
1834 snd_emu10k1_synth_alloc(emu
, 4096);
1835 if (emu
->reserved_page
)
1836 emu
->reserved_page
->map_locked
= 1;
1838 /* Clear silent pages and set up pointers */
1839 memset(emu
->silent_page
.area
, 0, PAGE_SIZE
);
1840 silent_page
= emu
->silent_page
.addr
<< 1;
1841 for (idx
= 0; idx
< MAXPAGES
; idx
++)
1842 ((u32
*)emu
->ptb_pages
.area
)[idx
] = cpu_to_le32(silent_page
| idx
);
1844 /* set up voice indices */
1845 for (idx
= 0; idx
< NUM_G
; idx
++) {
1846 emu
->voices
[idx
].emu
= emu
;
1847 emu
->voices
[idx
].number
= idx
;
1850 if ((err
= snd_emu10k1_init(emu
, enable_ir
, 0)) < 0)
1853 if ((err
= alloc_pm_buffer(emu
)) < 0)
1857 /* Initialize the effect engine */
1858 if ((err
= snd_emu10k1_init_efx(emu
)) < 0)
1860 snd_emu10k1_audio_enable(emu
);
1862 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, emu
, &ops
)) < 0)
1865 #ifdef CONFIG_PROC_FS
1866 snd_emu10k1_proc_init(emu
);
1869 snd_card_set_dev(card
, &pci
->dev
);
1874 snd_emu10k1_free(emu
);
1879 static unsigned char saved_regs
[] = {
1880 CPF
, PTRX
, CVCF
, VTFT
, Z1
, Z2
, PSST
, DSL
, CCCA
, CCR
, CLP
,
1881 FXRT
, MAPA
, MAPB
, ENVVOL
, ATKHLDV
, DCYSUSV
, LFOVAL1
, ENVVAL
,
1882 ATKHLDM
, DCYSUSM
, LFOVAL2
, IP
, IFATN
, PEFE
, FMMOD
, TREMFRQ
, FM2FRQ2
,
1883 TEMPENV
, ADCCR
, FXWC
, MICBA
, ADCBA
, FXBA
,
1884 MICBS
, ADCBS
, FXBS
, CDCS
, GPSCS
, SPCS0
, SPCS1
, SPCS2
,
1885 SPBYPASS
, AC97SLOT
, CDSRCS
, GPSRCS
, ZVSRCS
, MICIDX
, ADCIDX
, FXIDX
,
1888 static unsigned char saved_regs_audigy
[] = {
1889 A_ADCIDX
, A_MICIDX
, A_FXWC1
, A_FXWC2
, A_SAMPLE_RATE
,
1890 A_FXRT2
, A_SENDAMOUNTS
, A_FXRT1
,
1894 static int __devinit
alloc_pm_buffer(struct snd_emu10k1
*emu
)
1898 size
= ARRAY_SIZE(saved_regs
);
1900 size
+= ARRAY_SIZE(saved_regs_audigy
);
1901 emu
->saved_ptr
= vmalloc(4 * NUM_G
* size
);
1902 if (! emu
->saved_ptr
)
1904 if (snd_emu10k1_efx_alloc_pm_buffer(emu
) < 0)
1906 if (emu
->card_capabilities
->ca0151_chip
&&
1907 snd_p16v_alloc_pm_buffer(emu
) < 0)
1912 static void free_pm_buffer(struct snd_emu10k1
*emu
)
1914 vfree(emu
->saved_ptr
);
1915 snd_emu10k1_efx_free_pm_buffer(emu
);
1916 if (emu
->card_capabilities
->ca0151_chip
)
1917 snd_p16v_free_pm_buffer(emu
);
1920 void snd_emu10k1_suspend_regs(struct snd_emu10k1
*emu
)
1926 val
= emu
->saved_ptr
;
1927 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1928 for (i
= 0; i
< NUM_G
; i
++, val
++)
1929 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1931 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1932 for (i
= 0; i
< NUM_G
; i
++, val
++)
1933 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1936 emu
->saved_a_iocfg
= inl(emu
->port
+ A_IOCFG
);
1937 emu
->saved_hcfg
= inl(emu
->port
+ HCFG
);
1940 void snd_emu10k1_resume_init(struct snd_emu10k1
*emu
)
1942 if (emu
->card_capabilities
->ca_cardbus_chip
)
1943 snd_emu10k1_cardbus_init(emu
);
1944 if (emu
->card_capabilities
->ecard
)
1945 snd_emu10k1_ecard_init(emu
);
1946 else if (emu
->card_capabilities
->emu1010
)
1947 snd_emu10k1_emu1010_init(emu
);
1949 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1950 snd_emu10k1_init(emu
, emu
->enable_ir
, 1);
1953 void snd_emu10k1_resume_regs(struct snd_emu10k1
*emu
)
1959 snd_emu10k1_audio_enable(emu
);
1961 /* resore for spdif */
1963 outl(emu
->saved_a_iocfg
, emu
->port
+ A_IOCFG
);
1964 outl(emu
->saved_hcfg
, emu
->port
+ HCFG
);
1966 val
= emu
->saved_ptr
;
1967 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1968 for (i
= 0; i
< NUM_G
; i
++, val
++)
1969 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);
1971 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1972 for (i
= 0; i
< NUM_G
; i
++, val
++)
1973 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);